Add status page and merge private

This commit is contained in:
kholdfuzion 2020-12-30 11:42:28 -06:00
parent 3858440e14
commit 045df04316
826 changed files with 25643 additions and 246762 deletions

108
.github/workflows/main.yml vendored Normal file
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@ -0,0 +1,108 @@
name: GE-CI
on:
push:
branches: master
paths-ignore:
- 'tools/**'
pull_request:
branches: master
# Allows you to run this workflow manually from the Actions tab
workflow_dispatch:
jobs:
buildus:
runs-on: ubuntu-18.04
steps:
- uses: actions/checkout@v2
- name: Install Depedencies
run: |
sudo apt update
sudo apt install binutils-mips-linux-gnu make
- name: Get US File
env:
FILE_US: ${{ secrets.SECRET_FILE_US }}
run: wget -O baserom.u.z64 $FILE_US
- name: Extract US Assets
run: ./extract_baserom.u.sh
- name: Make US
run: make -j VERSION=US
- name: Make report
run: make -C tools/report
- name: Stats
run: python3 tools/ge-stats.py --version us --report
#git diff HEAD^ HEAD --name-only
# expected args
# 1481 15854 12774 232276 564 1312 652 20330 15471 269772 49 336 tools/report/index.html "src/game/bond.c"
# Replace this with Git push to repo
# but somehow avoid loop
#- uses: actions/download-artifact@v2
# with:
# name: my-artifact
# path: tools/report/index.html
- name: Upload output files
uses: dmnemec/copy_file_to_another_repo_action@v1.0.4
env:
API_TOKEN_GITHUB: ${{ secrets.API_TOKEN_GITHUB }}
API_TOKEN_USER: ${{ secrets.API_TOKEN_USER }}
API_TOKEN_EMAIL: ${{ secrets.API_TOKEN_EMAIL }}
with:
destination_repo: 'kholdfuzion/goldeneyestatus'
user_email: $API_TOKEN_EMAIL
user_name: $API_TOKEN_USER
source_file: |
tools/report/cursor.cur
tools/report/index.html
tools/report/sfx.ogg
tools/report/background.jpg
buildjp:
runs-on: ubuntu-18.04
steps:
- uses: actions/checkout@v2
- name: Install Depedencies
run: |
sudo apt update
sudo apt install binutils-mips-linux-gnu make
- name: Get US File
env:
FILE_US: ${{ secrets.SECRET_FILE_US }}
run: wget -O baserom.u.z64 $FILE_US
- name: Get JP File
env:
FILE_JP: ${{ secrets.SECRET_FILE_JP }}
run: wget -O baserom.j.z64 $FILE_JP
- name: Extract US Assets
run: ./extract_baserom.u.sh
- name: Extract JP Assets
run: ./extract_diff.j.sh
- name: Make JP
run: make -j VERSION=JP
- name: Stats
run: python3 tools/ge-stats.py --version jp
#need way of telling report that JAP passed/failed

4
.gitignore vendored
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@ -6,6 +6,7 @@
*.rz
*.tmp
*.z64
*.o
/.vs
021990.bin
0219D0.bin
@ -47,3 +48,6 @@ ge007.j.elf
ge007.u.bin
ge007.u.elf
lib/libultra_rom.a
tools/aaa_rip/aaa_rip
tools/extractor/extractor
notes/

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@ -83,8 +83,10 @@ CODEFILES := $(foreach dir,src,$(wildcard $(dir)/*.c))
CODEOBJECTS := $(foreach file,$(CODEFILES),$(BUILD_DIR)/$(file:.c=.o))
LIBULTRA := lib/libultra_rom.a
ULTRAFILES := $(foreach dir,src/libultra,$(wildcard $(dir)/*.s))
ULTRAOBJECTS := $(foreach file,$(ULTRAFILES),$(BUILD_DIR)/$(file:.s=.o))
ULTRAFILES_S := $(foreach dir,src/libultra,$(wildcard $(dir)/*.s))
ULTRAFILES_C := $(foreach dir,src/libultra,$(wildcard $(dir)/*.c))
ULTRAOBJECTS := $(foreach file,$(ULTRAFILES_S),$(BUILD_DIR)/$(file:.s=.o)) \
$(foreach file,$(ULTRAFILES_C),$(BUILD_DIR)/$(file:.c=.o))
GAMEFILES := $(foreach dir,src/game,$(wildcard $(dir)/*.c))
GAMEOBJECTS := $(foreach file,$(GAMEFILES),$(BUILD_DIR)/$(file:.c=.o))
@ -124,7 +126,8 @@ OBJECTS := $(RSPOBJECTS) $(CODEOBJECTS) $(GAMEOBJECTS) $(RZOBJECTS) $(OBSEGMENT)
INCLUDE := -I . -I include -I include/ultra64 -I src -I src/game -I src/inflate
CC := $(QEMU_IRIX) -silent -L $(IRIX_ROOT) $(IRIX_ROOT)/usr/bin/cc
CFLAGS := -Wo,-loopunroll,0 -Wab,-r4300_mul -non_shared -G 0 -Xcpluscomm $(CFLAGWARNING) -woff 819,820,852,821,838 -signed $(INCLUDE) -mips2 $(LCDEFS)
CFLAGS := 0 -Wab,-r4300_mul -non_shared -G 0 -Xcpluscomm $(CFLAGWARNING) -woff 819,820,852,821,838 -signed $(INCLUDE) -mips2 $(LCDEFS) -DTARGET_N64
CFLAGS_LIBULTRA := 0 -Wab,-r4300_mul -non_shared -G 0 -Xcpluscomm $(CFLAGWARNING) -woff 819,820,852,821,838 -signed $(INCLUDE) -mips2 $(LCDEFS) -DTARGET_N64
LD := $(TOOLCHAIN)ld
LD_SCRIPT := ge007.$(COUNTRYCODE).ld
@ -156,6 +159,9 @@ clean:
$(HEADEROBJECTS) $(BOOTOBJECTS) $(CODEOBJECTS) $(GAMEOBJECTS) $(RZOBJECTS) \
$(OBSEG_OBJECTS) $(OBSEG_RZ) $(ROMOBJECTS) $(RAMROM_OBJECTS) $(FONT_OBJECTS) $(MUSIC_OBJECTS) $(IMAGE_OBJS) $(MUSIC_RZ_FILES) $(RSPOBJECTS)
$(BUILD_DIR)/src/libultra/%.o: src/libultra/%.c
$(CC) -c $(CFLAGS_LIBULTRA) -o $@ $<
$(BUILD_DIR)/rsp/%.bin: rsp/*.s
$(ARMIPS) -sym $@.sym -strequ CODE_FILE $(BUILD_DIR)/rsp/$*.bin -strequ DATA_FILE $(BUILD_DIR)/rsp/$*_data.bin $<

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@ -1,7 +1,7 @@
#include "ultra64.h"
#include "bondconstants.h"
#include "bondtypes.h"
#include <gbi.h>
#include "PR/gbi.h"
struct sGlobalImageTable GlobalImageTable = {
{ //globalDL_0x000

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@ -31,7 +31,7 @@ struct portal_data_table_entry
u16 control_bytes;
};
struct xyzpoint
struct coord
{
float x;
float y;
@ -45,7 +45,7 @@ struct portal_3_point
char padding1;
char padding2;
char padding3;
struct xyzpoint points[3];
struct coord points[3];
};
struct portal_4_point
@ -54,7 +54,7 @@ struct portal_4_point
char padding1;
char padding2;
char padding3;
struct xyzpoint points[4];
struct coord points[4];
};
struct portal_5_point
@ -63,7 +63,7 @@ struct portal_5_point
char padding1;
char padding2;
char padding3;
struct xyzpoint points[5];
struct coord points[5];
};
struct portal_6_point
@ -72,7 +72,7 @@ struct portal_6_point
char padding1;
char padding2;
char padding3;
struct xyzpoint points[6];
struct coord points[6];
};
extern struct room_data_table_entry room_data_table[];

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@ -8,7 +8,7 @@ struct BriefStruct UbrieftraZ = {
TEXT(LTRA, 3) /* Moneypenny */
},
{ /* Objectives (Text and Difficult) */
{TEXT(LTRA, 4), DIFFICULTY_AGENT}, /* Destroy break units */
{TEXT(LTRA, 4), DIFFICULTY_AGENT}, /* Destroy brake units */
{TEXT(LTRA, 5), DIFFICULTY_AGENT}, /* Rescue Natalya */
{TEXT(LTRA, 6), DIFFICULTY_SECRET}, /* Locate Janus secret base */
{TEXT(LTRA, 7), DIFFICULTY_00}, /* Crack Boris' password */

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@ -19,7 +19,7 @@ if [ "$DOALL" == "1" ] || [ $1 == 'files' ]; then
fi
if [ "$DOALL" == "1" ] || [ $1 == 'images' ]; then
while IFS=, read -r offset size name
while IFS=, read -r offset size name compressed extract
do
echo "removing $name"
rm -f $name

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@ -1,40 +1,83 @@
#!/bin/bash
if [ -z "$1" ]; then
DOALL="1"
echo "Processing Everything"
#set defaults
DOALL="1"
BASEROM="baserom.u.z64"
clear
if [ -z "$2" ]; then
if [ -z "$1" ]; then
#No Args
echo "Processing Everything"
elif [ "$1" = "files" ] || [ "$1" = "images" ]; then
#Arg1 is "files" or "images"
DOALL="0"
echo "Processing $1 Only"
else
#Arg1 is ROM
BASEROM=$1
echo "Processing Everything using $BASEROM"
fi
else
BASEROM=$2
if [ "$1" = "files" ] || [ "$1" != "images" ]; then
#Arg1 is "files" or "images
DOALL="0"
echo "Processing $1 Only using $BASEROM"
else
echo "Processing Everything using $BASEROM"
fi
fi
true="1"
mkdir assets assets/font assets/images assets/images/split assets/music assets/ramrom assets/obseg assets/obseg/bg assets/obseg/brief assets/obseg/chr assets/obseg/gun assets/obseg/prop assets/obseg/setup assets/obseg/setup/u assets/obseg/stan assets/obseg/text assets/obseg/text/u
DIRs='assets assets/font assets/images assets/images/split assets/music assets/ramrom assets/obseg assets/obseg/bg assets/obseg/brief assets/obseg/chr assets/obseg/gun assets/obseg/prop assets/obseg/setup assets/obseg/setup/u assets/obseg/stan assets/obseg/text assets/obseg/text/u'
for DIR in $DIRs
do
# if dir not exist, make
if [ ! -d $DIR ]; then
mkdir $DIR
fi
done
#build/rebuild extractor
[ ! -x tools/extractor/extractor ] && make -C tools/extractor
if [ "$DOALL" == "1" ] || [ $1 == 'files' ]; then
echo "Processing Files"
while IFS=, read -r offset size name compressed extract
do
if [ "$extract" == "$true" ]; then
if [ "$compressed" == "$true" ]; then
echo "Extracting compressed $name, $size bytes..."
dd bs=1 skip=$offset count=$size if=baserom.u.z64 of=$name status=none
# Add the gZip Header to a new file using the name given in command
echo -n -e \\x1F\\x8B\\x08\\x00\\x00\\x00\\x00\\x00\\x02\\x03 > $name.temp
# Add the contents of the compressed file minus the 1172 to the new file
cat $name | tail --bytes=+3 >> $name.temp
# copy the new file over the old compressed file
cat $name.temp > $name.zip
# decompress the Z file to the filename given in the command
cat $name.zip | gzip --quiet --decompress > $name.bin
# remove the compressed Z file
rm $name.temp $name.zip $name
echo "Successfully Decompressed $name"
if [ -x tools/extractor/extractor ]; then
tools/extractor/extractor "$BASEROM" filelist.u.csv
else
while IFS=, read -r offset size name compressed extract
do
if [ "$extract" == "$true" ]; then
if [ "$compressed" == "$true" ]; then
echo "Extracting compressed $name, $size bytes..."
dd bs=1 skip=$offset count=$size if="$BASEROM" of=$name status=none
# Add the gZip Header to a new file using the name given in command
echo -n -e \\x1F\\x8B\\x08\\x00\\x00\\x00\\x00\\x00\\x02\\x03 > $name.temp
# Add the contents of the compressed file minus the 1172 to the new file
cat $name | tail --bytes=+3 >> $name.temp
# copy the new file over the old compressed file
cat $name.temp > $name.zip
# decompress the Z file to the filename given in the command
cat $name.zip | gzip --quiet --decompress > $name
# remove the compressed Z file
rm $name.temp $name.zip
echo "Successfully Decompressed $name"
else
echo "Extracting uncompressed $name, $size bytes..."
dd bs=1 skip=$offset count=$size if="$BASEROM" of=$name status=none
echo "Successfully Extracted $name"
fi
else
echo "Extracting uncompressed $name, $size bytes..."
dd bs=1 skip=$offset count=$size if=baserom.u.z64 of=$name status=none
echo "Successfully Extracted $name"
echo "skip $name"
fi
else
echo "skip $name"
fi
done < filelist.u.csv
done < filelist.u.csv
fi
#filelist.u.csv should follow pattern of:
#offset,size,name,compressed,extract
#formatting matters, no comments, no extra lines, unix line endings only
@ -42,15 +85,19 @@ if [ "$DOALL" == "1" ] || [ $1 == 'files' ]; then
fi
if [ "$DOALL" == "1" ] || [ $1 == 'images' ]; then
echo "Processing Imagess"
while IFS=, read -r offset size name
do
echo "Extracting $name, $size bytes..."
dd bs=1 skip=$offset count=$size if=baserom.u.z64 of=$name status=none
echo "Successfully Extracted $name"
done < imagelist.u.csv
echo "Processing Images"
if [ -x tools/extractor/extractor ]; then
tools/extractor/extractor "$BASEROM" imagelist.u.csv
else
while IFS=, read -r offset size name
do
echo "Extracting $name, $size bytes..."
dd bs=1 skip=$offset count=$size if="$BASEROM" of=$name status=none
echo "Successfully Extracted $name"
done < imagelist.u.csv
fi
#imageslist.u.csv should follow pattern of:
#offset,size,name
#offset,size,name,compressed,extract
#formatting matters, no comments, no extra lines, unix line endings only
#and always end with a newline
fi

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453
include/PR/R4300.h Normal file
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@ -0,0 +1,453 @@
/**************************************************************************
* *
* Copyright (C) 1995, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
/**************************************************************************
*
* $Revision: 1.13 $
* $Date: 1997/02/11 08:15:34 $
* $Source: /disk6/Master/cvsmdev2/PR/include/R4300.h,v $
*
**************************************************************************/
#ifndef __R4300_H__
#define __R4300_H__
#include <PR/ultratypes.h>
/*
* Segment base addresses and sizes
*/
#define KUBASE 0
#define KUSIZE 0x80000000
#define K0BASE 0x80000000
#define K0SIZE 0x20000000
#define K1BASE 0xA0000000
#define K1SIZE 0x20000000
#define K2BASE 0xC0000000
#define K2SIZE 0x20000000
/*
* Exception vectors
*/
#define SIZE_EXCVEC 0x80 /* Size of an exc. vec */
#define UT_VEC K0BASE /* utlbmiss vector */
#define R_VEC (K1BASE+0x1fc00000) /* reset vector */
#define XUT_VEC (K0BASE+0x80) /* extended address tlbmiss */
#define ECC_VEC (K0BASE+0x100) /* Ecc exception vector */
#define E_VEC (K0BASE+0x180) /* Gen. exception vector */
/*
* Address conversion macros
*/
#ifdef _LANGUAGE_ASSEMBLY
#define K0_TO_K1(x) ((x)|0xA0000000) /* kseg0 to kseg1 */
#define K1_TO_K0(x) ((x)&0x9FFFFFFF) /* kseg1 to kseg0 */
#define K0_TO_PHYS(x) ((x)&0x1FFFFFFF) /* kseg0 to physical */
#define K1_TO_PHYS(x) ((x)&0x1FFFFFFF) /* kseg1 to physical */
#define KDM_TO_PHYS(x) ((x)&0x1FFFFFFF) /* direct mapped to physical */
#define PHYS_TO_K0(x) ((x)|0x80000000) /* physical to kseg0 */
#define PHYS_TO_K1(x) ((x)|0xA0000000) /* physical to kseg1 */
#else /* _LANGUAGE_C */
#define K0_TO_K1(x) ((u32)(x)|0xA0000000) /* kseg0 to kseg1 */
#define K1_TO_K0(x) ((u32)(x)&0x9FFFFFFF) /* kseg1 to kseg0 */
#define K0_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* kseg0 to physical */
#define K1_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* kseg1 to physical */
#define KDM_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* direct mapped to physical */
#define PHYS_TO_K0(x) ((u32)(x)|0x80000000) /* physical to kseg0 */
#define PHYS_TO_K1(x) ((u32)(x)|0xA0000000) /* physical to kseg1 */
#endif /* _LANGUAGE_ASSEMBLY */
/*
* Address predicates
*/
#define IS_KSEG0(x) ((u32)(x) >= K0BASE && (u32)(x) < K1BASE)
#define IS_KSEG1(x) ((u32)(x) >= K1BASE && (u32)(x) < K2BASE)
#define IS_KSEGDM(x) ((u32)(x) >= K0BASE && (u32)(x) < K2BASE)
#define IS_KSEG2(x) ((u32)(x) >= K2BASE && (u32)(x) < KPTE_SHDUBASE)
#define IS_KPTESEG(x) ((u32)(x) >= KPTE_SHDUBASE)
#define IS_KUSEG(x) ((u32)(x) < K0BASE)
/*
* TLB size constants
*/
#define NTLBENTRIES 31 /* entry 31 is reserved by rdb */
#define TLBHI_VPN2MASK 0xffffe000
#define TLBHI_VPN2SHIFT 13
#define TLBHI_PIDMASK 0xff
#define TLBHI_PIDSHIFT 0
#define TLBHI_NPID 255 /* 255 to fit in 8 bits */
#define TLBLO_PFNMASK 0x3fffffc0
#define TLBLO_PFNSHIFT 6
#define TLBLO_CACHMASK 0x38 /* cache coherency algorithm */
#define TLBLO_CACHSHIFT 3
#define TLBLO_UNCACHED 0x10 /* not cached */
#define TLBLO_NONCOHRNT 0x18 /* Cacheable non-coherent */
#define TLBLO_EXLWR 0x28 /* Exclusive write */
#define TLBLO_D 0x4 /* writeable */
#define TLBLO_V 0x2 /* valid bit */
#define TLBLO_G 0x1 /* global access bit */
#define TLBINX_PROBE 0x80000000
#define TLBINX_INXMASK 0x3f
#define TLBINX_INXSHIFT 0
#define TLBRAND_RANDMASK 0x3f
#define TLBRAND_RANDSHIFT 0
#define TLBWIRED_WIREDMASK 0x3f
#define TLBCTXT_BASEMASK 0xff800000
#define TLBCTXT_BASESHIFT 23
#define TLBCTXT_BASEBITS 9
#define TLBCTXT_VPNMASK 0x7ffff0
#define TLBCTXT_VPNSHIFT 4
#define TLBPGMASK_4K 0x0
#define TLBPGMASK_16K 0x6000
#define TLBPGMASK_64K 0x1e000
/*
* Status register
*/
#define SR_CUMASK 0xf0000000 /* coproc usable bits */
#define SR_CU3 0x80000000 /* Coprocessor 3 usable */
#define SR_CU2 0x40000000 /* Coprocessor 2 usable */
#define SR_CU1 0x20000000 /* Coprocessor 1 usable */
#define SR_CU0 0x10000000 /* Coprocessor 0 usable */
#define SR_RP 0x08000000 /* Reduced power (quarter speed) */
#define SR_FR 0x04000000 /* MIPS III FP register mode */
#define SR_RE 0x02000000 /* Reverse endian */
#define SR_ITS 0x01000000 /* Instruction trace support */
#define SR_BEV 0x00400000 /* Use boot exception vectors */
#define SR_TS 0x00200000 /* TLB shutdown */
#define SR_SR 0x00100000 /* Soft reset occured */
#define SR_CH 0x00040000 /* Cache hit for last 'cache' op */
#define SR_CE 0x00020000 /* Create ECC */
#define SR_DE 0x00010000 /* ECC of parity does not cause error */
/*
* Interrupt enable bits
* (NOTE: bits set to 1 enable the corresponding level interrupt)
*/
#define SR_IMASK 0x0000ff00 /* Interrupt mask */
#define SR_IMASK8 0x00000000 /* mask level 8 */
#define SR_IMASK7 0x00008000 /* mask level 7 */
#define SR_IMASK6 0x0000c000 /* mask level 6 */
#define SR_IMASK5 0x0000e000 /* mask level 5 */
#define SR_IMASK4 0x0000f000 /* mask level 4 */
#define SR_IMASK3 0x0000f800 /* mask level 3 */
#define SR_IMASK2 0x0000fc00 /* mask level 2 */
#define SR_IMASK1 0x0000fe00 /* mask level 1 */
#define SR_IMASK0 0x0000ff00 /* mask level 0 */
#define SR_IBIT8 0x00008000 /* bit level 8 */
#define SR_IBIT7 0x00004000 /* bit level 7 */
#define SR_IBIT6 0x00002000 /* bit level 6 */
#define SR_IBIT5 0x00001000 /* bit level 5 */
#define SR_IBIT4 0x00000800 /* bit level 4 */
#define SR_IBIT3 0x00000400 /* bit level 3 */
#define SR_IBIT2 0x00000200 /* bit level 2 */
#define SR_IBIT1 0x00000100 /* bit level 1 */
#define SR_IMASKSHIFT 8
#define SR_KX 0x00000080 /* extended-addr TLB vec in kernel */
#define SR_SX 0x00000040 /* xtended-addr TLB vec supervisor */
#define SR_UX 0x00000020 /* xtended-addr TLB vec in user mode */
#define SR_KSU_MASK 0x00000018 /* mode mask */
#define SR_KSU_USR 0x00000010 /* user mode */
#define SR_KSU_SUP 0x00000008 /* supervisor mode */
#define SR_KSU_KER 0x00000000 /* kernel mode */
#define SR_ERL 0x00000004 /* Error level, 1=>cache error */
#define SR_EXL 0x00000002 /* Exception level, 1=>exception */
#define SR_IE 0x00000001 /* interrupt enable, 1=>enable */
/*
* Cause Register
*/
#define CAUSE_BD 0x80000000 /* Branch delay slot */
#define CAUSE_CEMASK 0x30000000 /* coprocessor error */
#define CAUSE_CESHIFT 28
/* Interrupt pending bits */
#define CAUSE_IP8 0x00008000 /* External level 8 pending - COMPARE */
#define CAUSE_IP7 0x00004000 /* External level 7 pending - INT4 */
#define CAUSE_IP6 0x00002000 /* External level 6 pending - INT3 */
#define CAUSE_IP5 0x00001000 /* External level 5 pending - INT2 */
#define CAUSE_IP4 0x00000800 /* External level 4 pending - INT1 */
#define CAUSE_IP3 0x00000400 /* External level 3 pending - INT0 */
#define CAUSE_SW2 0x00000200 /* Software level 2 pending */
#define CAUSE_SW1 0x00000100 /* Software level 1 pending */
#define CAUSE_IPMASK 0x0000FF00 /* Pending interrupt mask */
#define CAUSE_IPSHIFT 8
#define CAUSE_EXCMASK 0x0000007C /* Cause code bits */
#define CAUSE_EXCSHIFT 2
/* Cause register exception codes */
#define EXC_CODE(x) ((x)<<2)
/* Hardware exception codes */
#define EXC_INT EXC_CODE(0) /* interrupt */
#define EXC_MOD EXC_CODE(1) /* TLB mod */
#define EXC_RMISS EXC_CODE(2) /* Read TLB Miss */
#define EXC_WMISS EXC_CODE(3) /* Write TLB Miss */
#define EXC_RADE EXC_CODE(4) /* Read Address Error */
#define EXC_WADE EXC_CODE(5) /* Write Address Error */
#define EXC_IBE EXC_CODE(6) /* Instruction Bus Error */
#define EXC_DBE EXC_CODE(7) /* Data Bus Error */
#define EXC_SYSCALL EXC_CODE(8) /* SYSCALL */
#define EXC_BREAK EXC_CODE(9) /* BREAKpoint */
#define EXC_II EXC_CODE(10) /* Illegal Instruction */
#define EXC_CPU EXC_CODE(11) /* CoProcessor Unusable */
#define EXC_OV EXC_CODE(12) /* OVerflow */
#define EXC_TRAP EXC_CODE(13) /* Trap exception */
#define EXC_VCEI EXC_CODE(14) /* Virt. Coherency on Inst. fetch */
#define EXC_FPE EXC_CODE(15) /* Floating Point Exception */
#define EXC_WATCH EXC_CODE(23) /* Watchpoint reference */
#define EXC_VCED EXC_CODE(31) /* Virt. Coherency on data read */
/* C0_PRID Defines */
#define C0_IMPMASK 0xff00
#define C0_IMPSHIFT 8
#define C0_REVMASK 0xff
#define C0_MAJREVMASK 0xf0
#define C0_MAJREVSHIFT 4
#define C0_MINREVMASK 0xf
/*
* Coprocessor 0 operations
*/
#define C0_READI 0x1 /* read ITLB entry addressed by C0_INDEX */
#define C0_WRITEI 0x2 /* write ITLB entry addressed by C0_INDEX */
#define C0_WRITER 0x6 /* write ITLB entry addressed by C0_RAND */
#define C0_PROBE 0x8 /* probe for ITLB entry addressed by TLBHI */
#define C0_RFE 0x10 /* restore for exception */
/*
* 'cache' instruction definitions
*/
/* Target cache */
#define CACH_PI 0x0 /* specifies primary inst. cache */
#define CACH_PD 0x1 /* primary data cache */
#define CACH_SI 0x2 /* secondary instruction cache */
#define CACH_SD 0x3 /* secondary data cache */
/* Cache operations */
#define C_IINV 0x0 /* index invalidate (inst, 2nd inst) */
#define C_IWBINV 0x0 /* index writeback inval (d, sd) */
#define C_ILT 0x4 /* index load tag (all) */
#define C_IST 0x8 /* index store tag (all) */
#define C_CDX 0xc /* create dirty exclusive (d, sd) */
#define C_HINV 0x10 /* hit invalidate (all) */
#define C_HWBINV 0x14 /* hit writeback inv. (d, sd) */
#define C_FILL 0x14 /* fill (i) */
#define C_HWB 0x18 /* hit writeback (i, d, sd) */
#define C_HSV 0x1c /* hit set virt. (si, sd) */
/*
* Cache size definitions
*/
#define ICACHE_SIZE 0x4000 /* 16K */
#define ICACHE_LINESIZE 32 /* 8 words */
#define ICACHE_LINEMASK (ICACHE_LINESIZE-1)
#define DCACHE_SIZE 0x2000 /* 8K */
#define DCACHE_LINESIZE 16 /* 4 words */
#define DCACHE_LINEMASK (DCACHE_LINESIZE-1)
/*
* C0_CONFIG register definitions
*/
#define CONFIG_CM 0x80000000 /* 1 == Master-Checker enabled */
#define CONFIG_EC 0x70000000 /* System Clock ratio */
#define CONFIG_EC_1_1 0x6 /* System Clock ratio 1 :1 */
#define CONFIG_EC_3_2 0x7 /* System Clock ratio 1.5 :1 */
#define CONFIG_EC_2_1 0x0 /* System Clock ratio 2 :1 */
#define CONFIG_EC_3_1 0x1 /* System Clock ratio 3 :1 */
#define CONFIG_EP 0x0f000000 /* Transmit Data Pattern */
#define CONFIG_SB 0x00c00000 /* Secondary cache block size */
#define CONFIG_SS 0x00200000 /* Split scache: 0 == I&D combined */
#define CONFIG_SW 0x00100000 /* scache port: 0==128, 1==64 */
#define CONFIG_EW 0x000c0000 /* System Port width: 0==64, 1==32 */
#define CONFIG_SC 0x00020000 /* 0 -> 2nd cache present */
#define CONFIG_SM 0x00010000 /* 0 -> Dirty Shared Coherency enabled*/
#define CONFIG_BE 0x00008000 /* Endian-ness: 1 --> BE */
#define CONFIG_EM 0x00004000 /* 1 -> ECC mode, 0 -> parity */
#define CONFIG_EB 0x00002000 /* Block order:1->sequent,0->subblock */
#define CONFIG_IC 0x00000e00 /* Primary Icache size */
#define CONFIG_DC 0x000001c0 /* Primary Dcache size */
#define CONFIG_IB 0x00000020 /* Icache block size */
#define CONFIG_DB 0x00000010 /* Dcache block size */
#define CONFIG_CU 0x00000008 /* Update on Store-conditional */
#define CONFIG_K0 0x00000007 /* K0SEG Coherency algorithm */
#define CONFIG_UNCACHED 0x00000002 /* K0 is uncached */
#define CONFIG_NONCOHRNT 0x00000003
#define CONFIG_COHRNT_EXLWR 0x00000005
#define CONFIG_SB_SHFT 22 /* shift SB to bit position 0 */
#define CONFIG_IC_SHFT 9 /* shift IC to bit position 0 */
#define CONFIG_DC_SHFT 6 /* shift DC to bit position 0 */
#define CONFIG_BE_SHFT 15 /* shift BE to bit position 0 */
/*
* C0_TAGLO definitions for setting/getting cache states and physaddr bits
*/
#define SADDRMASK 0xFFFFE000 /* 31..13 -> scache paddr bits 35..17 */
#define SVINDEXMASK 0x00000380 /* 9..7: prim virt index bits 14..12 */
#define SSTATEMASK 0x00001c00 /* bits 12..10 hold scache line state */
#define SINVALID 0x00000000 /* invalid --> 000 == state 0 */
#define SCLEANEXCL 0x00001000 /* clean exclusive --> 100 == state 4 */
#define SDIRTYEXCL 0x00001400 /* dirty exclusive --> 101 == state 5 */
#define SECC_MASK 0x0000007f /* low 7 bits are ecc for the tag */
#define SADDR_SHIFT 4 /* shift STagLo (31..13) to 35..17 */
#define PADDRMASK 0xFFFFFF00 /* PTagLo31..8->prim paddr bits35..12 */
#define PADDR_SHIFT 4 /* roll bits 35..12 down to 31..8 */
#define PSTATEMASK 0x00C0 /* bits 7..6 hold primary line state */
#define PINVALID 0x0000 /* invalid --> 000 == state 0 */
#define PCLEANEXCL 0x0080 /* clean exclusive --> 10 == state 2 */
#define PDIRTYEXCL 0x00C0 /* dirty exclusive --> 11 == state 3 */
#define PPARITY_MASK 0x0001 /* low bit is parity bit (even). */
/*
* C0_CACHE_ERR definitions.
*/
#define CACHERR_ER 0x80000000 /* 0: inst ref, 1: data ref */
#define CACHERR_EC 0x40000000 /* 0: primary, 1: secondary */
#define CACHERR_ED 0x20000000 /* 1: data error */
#define CACHERR_ET 0x10000000 /* 1: tag error */
#define CACHERR_ES 0x08000000 /* 1: external ref, e.g. snoop*/
#define CACHERR_EE 0x04000000 /* error on SysAD bus */
#define CACHERR_EB 0x02000000 /* complicated, see spec. */
#define CACHERR_EI 0x01000000 /* complicated, see spec. */
#define CACHERR_SIDX_MASK 0x003ffff8 /* secondary cache index */
#define CACHERR_PIDX_MASK 0x00000007 /* primary cache index */
#define CACHERR_PIDX_SHIFT 12 /* bits 2..0 are paddr14..12 */
/* R4000 family supports hardware watchpoints:
* C0_WATCHLO:
* bits 31..3 are bits 31..3 of physaddr to watch
* bit 2: reserved; must be written as 0.
* bit 1: when set causes a watchpoint trap on load accesses to paddr.
* bit 0: when set traps on stores to paddr;
* C0_WATCHHI
* bits 31..4 are reserved and must be written as zeros.
* bits 3..0 are bits 35..32 of the physaddr to watch
*/
#define WATCHLO_WTRAP 0x00000001
#define WATCHLO_RTRAP 0x00000002
#define WATCHLO_ADDRMASK 0xfffffff8
#define WATCHLO_VALIDMASK 0xfffffffb
#define WATCHHI_VALIDMASK 0x0000000f
/*
* Coprocessor 0 registers
*/
#ifdef _LANGUAGE_ASSEMBLY
#define C0_INX $0
#define C0_RAND $1
#define C0_ENTRYLO0 $2
#define C0_ENTRYLO1 $3
#define C0_CONTEXT $4
#define C0_PAGEMASK $5 /* page mask */
#define C0_WIRED $6 /* # wired entries in tlb */
#define C0_BADVADDR $8
#define C0_COUNT $9 /* free-running counter */
#define C0_ENTRYHI $10
#define C0_SR $12
#define C0_CAUSE $13
#define C0_EPC $14
#define C0_PRID $15 /* revision identifier */
#define C0_COMPARE $11 /* counter comparison reg. */
#define C0_CONFIG $16 /* hardware configuration */
#define C0_LLADDR $17 /* load linked address */
#define C0_WATCHLO $18 /* watchpoint */
#define C0_WATCHHI $19 /* watchpoint */
#define C0_ECC $26 /* S-cache ECC and primary parity */
#define C0_CACHE_ERR $27 /* cache error status */
#define C0_TAGLO $28 /* cache operations */
#define C0_TAGHI $29 /* cache operations */
#define C0_ERROR_EPC $30 /* ECC error prg. counter */
# else /* ! _LANGUAGE_ASSEMBLY */
#define C0_INX 0
#define C0_RAND 1
#define C0_ENTRYLO0 2
#define C0_ENTRYLO1 3
#define C0_CONTEXT 4
#define C0_PAGEMASK 5 /* page mask */
#define C0_WIRED 6 /* # wired entries in tlb */
#define C0_BADVADDR 8
#define C0_COUNT 9 /* free-running counter */
#define C0_ENTRYHI 10
#define C0_SR 12
#define C0_CAUSE 13
#define C0_EPC 14
#define C0_PRID 15 /* revision identifier */
#define C0_COMPARE 11 /* counter comparison reg. */
#define C0_CONFIG 16 /* hardware configuration */
#define C0_LLADDR 17 /* load linked address */
#define C0_WATCHLO 18 /* watchpoint */
#define C0_WATCHHI 19 /* watchpoint */
#define C0_ECC 26 /* S-cache ECC and primary parity */
#define C0_CACHE_ERR 27 /* cache error status */
#define C0_TAGLO 28 /* cache operations */
#define C0_TAGHI 29 /* cache operations */
#define C0_ERROR_EPC 30 /* ECC error prg. counter */
#endif /* _LANGUAGE_ASSEMBLY */
/*
* floating-point status register
*/
#define FPCSR_FS 0x01000000 /* flush denorm to zero */
#define FPCSR_C 0x00800000 /* condition bit */
#define FPCSR_CE 0x00020000 /* cause: unimplemented operation */
#define FPCSR_CV 0x00010000 /* cause: invalid operation */
#define FPCSR_CZ 0x00008000 /* cause: division by zero */
#define FPCSR_CO 0x00004000 /* cause: overflow */
#define FPCSR_CU 0x00002000 /* cause: underflow */
#define FPCSR_CI 0x00001000 /* cause: inexact operation */
#define FPCSR_EV 0x00000800 /* enable: invalid operation */
#define FPCSR_EZ 0x00000400 /* enable: division by zero */
#define FPCSR_EO 0x00000200 /* enable: overflow */
#define FPCSR_EU 0x00000100 /* enable: underflow */
#define FPCSR_EI 0x00000080 /* enable: inexact operation */
#define FPCSR_FV 0x00000040 /* flag: invalid operation */
#define FPCSR_FZ 0x00000020 /* flag: division by zero */
#define FPCSR_FO 0x00000010 /* flag: overflow */
#define FPCSR_FU 0x00000008 /* flag: underflow */
#define FPCSR_FI 0x00000004 /* flag: inexact operation */
#define FPCSR_RM_MASK 0x00000003 /* rounding mode mask */
#define FPCSR_RM_RN 0x00000000 /* round to nearest */
#define FPCSR_RM_RZ 0x00000001 /* round to zero */
#define FPCSR_RM_RP 0x00000002 /* round to positive infinity */
#define FPCSR_RM_RM 0x00000003 /* round to negative infinity */
#endif /* __R4300_H */

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#ifndef _ABI_H_
#define _ABI_H_
/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
/**************************************************************************
*
* $Revision: 1.32 $
* $Date: 1997/02/11 08:16:37 $
* $Source: /exdisk2/cvs/N64OS/Master/cvsmdev2/PR/include/abi.h,v $
*
**************************************************************************/
/*
* Header file for the Audio Binary Interface.
* This is included in the Media Binary Interface file
* mbi.h.
*
* This file follows the framework used for graphics.
*
*/
/* Audio commands: */
#define A_SPNOOP 0
#define A_ADPCM 1
#define A_CLEARBUFF 2
#define A_RESAMPLE 5
#define A_SETBUFF 8
#define A_DMEMMOVE 10
#define A_LOADADPCM 11
#define A_MIXER 12
#define A_INTERLEAVE 13
#define A_SETLOOP 15
#ifndef VERSION_SH
#define A_ENVMIXER 3
#define A_LOADBUFF 4
#define A_RESAMPLE 5
#define A_SAVEBUFF 6
#define A_SEGMENT 7
#define A_SETVOL 9
#define A_POLEF 14
#else
#define A_ADDMIXER 4
#define A_RESAMPLE_ZOH 6
#define A_INTERL 17
#define A_ENVSETUP1 18
#define A_ENVMIXER 19
#define A_LOADBUFF 20
#define A_SAVEBUFF 21
#define A_ENVSETUP2 22
#define A_UNK_23 23
#define A_HILOGAIN 24
#define A_UNK_25 25
#define A_DUPLICATE 26
#define A_FILTER 27
#endif
#define ACMD_SIZE 32
/*
* Audio flags
*/
#define A_INIT 0x01
#define A_CONTINUE 0x00
#define A_LOOP 0x02
#define A_OUT 0x02
#define A_LEFT 0x02
#define A_RIGHT 0x00
#define A_VOL 0x04
#define A_RATE 0x00
#define A_AUX 0x08
#define A_NOAUX 0x00
#define A_MAIN 0x00
#define A_MIX 0x10
/*
* BEGIN C-specific section: (typedef's)
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/*
* Data Structures.
*/
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int gain:16;
unsigned int addr;
} Aadpcm;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int gain:16;
unsigned int addr;
} Apolef;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int pad1:16;
unsigned int addr;
} Aenvelope;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:8;
unsigned int dmem:16;
unsigned int pad2:16;
unsigned int count:16;
} Aclearbuff;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:8;
unsigned int pad2:16;
unsigned int inL:16;
unsigned int inR:16;
} Ainterleave;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:24;
unsigned int addr;
} Aloadbuff;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int pad1:16;
unsigned int addr;
} Aenvmixer;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int gain:16;
unsigned int dmemi:16;
unsigned int dmemo:16;
} Amixer;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int dmem2:16;
unsigned int addr;
} Apan;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int pitch:16;
unsigned int addr;
} Aresample;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int pad1:16;
unsigned int addr;
} Areverb;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:24;
unsigned int addr;
} Asavebuff;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:24;
unsigned int pad2:2;
unsigned int number:4;
unsigned int base:24;
} Asegment;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int dmemin:16;
unsigned int dmemout:16;
unsigned int count:16;
} Asetbuff;
typedef struct {
unsigned int cmd:8;
unsigned int flags:8;
unsigned int vol:16;
unsigned int voltgt:16;
unsigned int volrate:16;
} Asetvol;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:8;
unsigned int dmemin:16;
unsigned int dmemout:16;
unsigned int count:16;
} Admemmove;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:8;
unsigned int count:16;
unsigned int addr;
} Aloadadpcm;
typedef struct {
unsigned int cmd:8;
unsigned int pad1:8;
unsigned int pad2:16;
unsigned int addr;
} Asetloop;
/*
* Generic Acmd Packet
*/
typedef struct {
uintptr_t w0;
uintptr_t w1;
} Awords;
typedef union {
Awords words;
#if IS_BIG_ENDIAN && !IS_64_BIT
Aadpcm adpcm;
Apolef polef;
Aclearbuff clearbuff;
Aenvelope envelope;
Ainterleave interleave;
Aloadbuff loadbuff;
Aenvmixer envmixer;
Aresample resample;
Areverb reverb;
Asavebuff savebuff;
Asegment segment;
Asetbuff setbuff;
Asetvol setvol;
Admemmove dmemmove;
Aloadadpcm loadadpcm;
Amixer mixer;
Asetloop setloop;
#endif
long long int force_union_align; /* dummy, force alignment */
} Acmd;
/*
* ADPCM State
*/
typedef short ADPCM_STATE[16];
/*
* Pole filter state
*/
typedef short POLEF_STATE[4];
/*
* Resampler state
*/
typedef short RESAMPLE_STATE[16];
/*
* Resampler constants
*/
#define UNITY_PITCH 0x8000
#define MAX_RATIO 1.99996 /* within .03 cents of +1 octave */
/*
* Enveloper/Mixer state
*/
typedef short ENVMIX_STATE[40];
/*
* Macros to assemble the audio command list
*/
/*
* Info about parameters:
*
* A "count" in the following macros is always measured in bytes.
*
* All volumes/gains are in Q1.15 signed fixed point numbers:
* 0x8000 is the minimum volume (-100%), negating the audio curve.
* 0x0000 is silent.
* 0x7fff is maximum volume (99.997%).
*
* All DRAM addresses refer to segmented addresses. A segment table shall
* first be set up by calling aSegment for each segment. When a DRAM
* address is later used as parameter, the 8 high bits will be an index
* to the segment table and the lower 24 bits are added to the base address
* stored in the segment table for this entry. The result is the physical address.
*
* Transfers to/from DRAM are executed using DMA and hence follow these restrictions:
* All DRAM addresses should be aligned by 8 bytes, or they will be
* rounded down to the nearest multiple of 8 bytes.
* All DRAM lengths should be aligned by 8 bytes, or they will be
* rounded up to the nearest multiple of 8 bytes.
*/
/*
* Decompresses ADPCM data.
* Possible flags: A_INIT and A_LOOP.
*
* First set up internal data in DMEM:
* aLoadADPCM(cmd++, nEntries * 16, physicalAddressOfBook)
* aSetLoop(cmd++, physicalAddressOfLoopState) (if A_LOOP is set)
*
* Then before this command, call:
* aSetBuffer(cmd++, 0, in, out, count)
*
* Note: count will be rounded up to the nearest multiple of 32 bytes.
*
* ADPCM decompression works on a block of 16 (uncompressed) samples.
* The previous 2 samples and 9 bytes of input are decompressed to
* 16 new samples using the code book previously loaded.
*
* Before the algorithm starts, the previous 16 samples are loaded according to flag:
* A_INIT: all zeros
* A_LOOP: the address set by aSetLoop
* no flags: the DRAM address in the s parameter
* These 16 samples are immediately copied to the destination address.
*
* The result of "count" bytes will be written after these 16 initial samples.
* The last 16 samples written to the destination will also be written to
* the state address in DRAM.
*/
#define aADPCMdec(pkt, f, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_ADPCM, 24, 8) | _SHIFTL(f, 16, 8); \
_a->words.w1 = (uintptr_t)(s); \
}
#define aADPCM_23(pkt, f, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_UNK_23, 24, 8) | _SHIFTL(f, 16, 8); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Not used in SM64.
*/
#define aPoleFilter(pkt, f, g, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_POLEF, 24, 8) | _SHIFTL(f, 16, 8) | \
_SHIFTL(g, 0, 16)); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Clears DMEM data, where d is address and c is count, by writing zeros.
*
* Note: c is rounded up to the nearest multiple of 16 bytes.
*/
#define aClearBuffer(pkt, d, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_CLEARBUFF, 24, 8) | _SHIFTL(d, 0, 24); \
_a->words.w1 = (uintptr_t)(c); \
}
/*
* Mixes an envelope with mono sound into 2 or 4 channels.
* Possible flags: A_INIT, A_AUX (indicates that 4 channels should be used).
*
* Before this command, call:
* aSetBuffer(cmd++, 0, inBuf, dryLeft, count)
* aSetBuffer(cmd++, A_AUX, dryRight, wetLeft, wetRight)
*
* The first time (A_INIT is set), volume also needs to be set:
* aSetVolume(cmd++, A_VOL | A_LEFT, initialVolumeLeft, 0, 0)
* aSetVolume(cmd++, A_VOL | A_RIGHT, initialVolumeRight, 0, 0)
* aSetVolume32(cmd++, A_RATE | A_LEFT, targetVolumeLeft, rampLeft)
* aSetVolume32(cmd++, A_RATE | A_RIGHT, targetVolumeRight, rampRight)
* aSetVolume(cmd++, A_AUX, dryVolume, 0, wetVolume)
*
* This command will now mix samples in inBuf into the destination buffers (dry and wet),
* but with the volume increased (or decreased) from initial volumes to target volumes,
* with the specified ramp rate. Once the target volume is reached, the volume stays
* at that level. Before the samples are finally mixed (added) into the destination
* buffers (dry and wet), the volume is changed according to dryVolume and wetVolume.
*
* Note: count will be rounded up to the nearest multiple of 16 bytes.
* Note: the wet channels are used for reverb.
*
*/
#define aEnvMixer(pkt, f, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_ENVMIXER, 24, 8) | _SHIFTL(f, 16, 8); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Interleaves two mono channels into stereo.
*
* First call:
* aSetBuffer(cmd++, 0, 0, output, count)
*
* The count refers to the size of each input. Hence 2 * count bytes will be written out.
* A left sample will be placed before the right sample.
*
* Note: count will be rounded up to the nearest multiple of 16 bytes.
*/
#define aInterleave(pkt, l, r) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_INTERLEAVE, 24, 8); \
_a->words.w1 = _SHIFTL(l, 16, 16) | _SHIFTL(r, 0, 16); \
}
/*
* Loads a buffer from DRAM to DMEM.
*
* First call:
* aSetBuffer(cmd++, 0, in, 0, count)
*
* The in parameter to aSetBuffer is the destination in DMEM and the
* s parameter to this command is the source in DRAM.
*/
#define aLoadBuffer(pkt, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_LOADBUFF, 24, 8); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Mixes audio.
* Possible flags: no flags used, although parameter present.
*
* First call:
* aSetBuffer(cmd++, 0, 0, 0, count)
*
* Input and output addresses are taken from the i and o parameters.
* The volume with which the input is changed is taken from the g parameter.
* After the volume of the input samples have been changed, the result
* is added to the output.
*
* Note: count will be rounded up to the nearest multiple of 32 bytes.
*/
#define aMix(pkt, f, g, i, o) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_MIXER, 24, 8) | _SHIFTL(f, 16, 8) | \
_SHIFTL(g, 0, 16)); \
_a->words.w1 = _SHIFTL(i,16, 16) | _SHIFTL(o, 0, 16); \
}
// Not present in the audio microcode.
#define aPan(pkt, f, d, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_PAN, 24, 8) | _SHIFTL(f, 16, 8) | \
_SHIFTL(d, 0, 16)); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Resamples audio.
* Possible flags: A_INIT, A_OUT? (not used in SM64).
*
* First call:
* aSetBuffer(cmd++, 0, in, out, count)
*
* This command resamples the audio using the given frequency ratio (pitch)
* using a filter that uses a window of 4 source samples. This can be used
* either for just resampling audio to be able to be played back at a different
* sample rate, or to change the pitch if the result is played back at
* the same sample rate as the input.
*
* The frequency ratio is given in UQ1.15 fixed point format.
* For no change in frequency, use pitch 0x8000.
* For 1 octave up or downsampling to (roughly) half number of samples, use pitch 0xffff.
* For 1 octave down or upsampling to double as many samples, use pitch 0x4000.
*
* Note: count represents the number of output sample bytes and is rounded up to
* the nearest multiple of 16 bytes.
*
* The state consists of the four following source samples when the algorithm stopped as
* well as a fractional position, and is initialized to all zeros if A_INIT is given.
* Otherwise it is loaded from DRAM at address s.
*
* The algorithm starts by writing the four source samples from the state (or zero)
* to just before the input address given. It then creates one output sample by examining
* the four next source samples and then moving the source position zero or more
* samples forward. The first output sample (when A_INIT is given) is always 0.
*
* When "count" bytes have been written, the following four source samples
* are written to the state in DRAM as well as a fractional position.
*/
#define aResample(pkt, f, p, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_RESAMPLE, 24, 8) | _SHIFTL(f, 16, 8) |\
_SHIFTL(p, 0, 16)); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Stores a buffer in DMEM to DRAM.
*
* First call:
* aSetBuffer(cmd++, 0, 0, out, count)
*
* The out parameter to aSetBuffer is the source in DMEM and the
* s parameter to this command is the destination in DRAM.
*/
#define aSaveBuffer(pkt, s) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_SAVEBUFF, 24, 8); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Sets up an entry in the segment table.
*
* The s parameter is a segment index, 0 to 15.
* The b parameter is the base offset.
*/
#define aSegment(pkt, s, b) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_SEGMENT, 24, 8); \
_a->words.w1 = _SHIFTL(s, 24, 8) | _SHIFTL(b, 0, 24); \
}
/*
* Sets internal DMEM buffer addresses used for later commands.
* See each command for how to use aSetBuffer.
*/
#define aSetBuffer(pkt, f, i, o, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_SETBUFF, 24, 8) | _SHIFTL(f, 16, 8) | \
_SHIFTL(i, 0, 16)); \
_a->words.w1 = _SHIFTL(o, 16, 16) | _SHIFTL(c, 0, 16); \
}
#define aInterl(pkt, f, i, o, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_INTERL, 24, 8) | _SHIFTL(f, 16, 8) | \
_SHIFTL(i, 0, 16)); \
_a->words.w1 = _SHIFTL(o, 16, 16) | _SHIFTL(c, 0, 16); \
}
/*
* Sets internal volume parameters.
* See aEnvMixer for more info.
*/
#define aSetVolume(pkt, f, v, t, r) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_SETVOL, 24, 8) | _SHIFTL(f, 16, 16) | \
_SHIFTL(v, 0, 16)); \
_a->words.w1 = _SHIFTL(t, 16, 16) | _SHIFTL(r, 0, 16); \
}
/*
* Sets the address to ADPCM loop state.
*
* The a parameter is a DRAM address.
* See aADPCMdec for more info.
*/
#define aSetLoop(pkt, a) \
{ \
Acmd *_a = (Acmd *)pkt; \
_a->words.w0 = _SHIFTL(A_SETLOOP, 24, 8); \
_a->words.w1 = (uintptr_t)(a); \
}
/*
* Copies memory in DMEM.
*
* Copies c bytes from address i to address o.
*
* Note: count is rounded up to the nearest multiple of 16 bytes.
*
* Note: This acts as memcpy where 16 bytes are moved at a time, therefore
* if input and output overlap, output address should be less than input address.
*/
#define aDMEMMove(pkt, i, o, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_DMEMMOVE, 24, 8) | _SHIFTL(i, 0, 24); \
_a->words.w1 = _SHIFTL(o, 16, 16) | _SHIFTL(c, 0, 16); \
}
/*
* Loads ADPCM book from DRAM into DMEM.
*
* This command loads ADPCM table entries from DRAM to DMEM.
*
* The count parameter c should be a multiple of 16 bytes.
* The d parameter is a DRAM address.
*/
#define aLoadADPCM(pkt, c, d) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_LOADADPCM, 24, 8) | _SHIFTL(c, 0, 24); \
_a->words.w1 = (uintptr_t) (d); \
}
// This is a version of aSetVolume which takes a single 32-bit parameter
// instead of two 16-bit ones. According to AziAudio, it is used to set
// ramping values when neither bit 4 nor bit 8 is set in the flags parameter.
// It does not appear in the official abi.h header.
/*
* Sets internal volume parameters.
* See aEnvMixer for more info.
*/
#define aSetVolume32(pkt, f, v, tr) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_SETVOL, 24, 8) | _SHIFTL(f, 16, 16) | \
_SHIFTL(v, 0, 16)); \
_a->words.w1 = (uintptr_t)(tr); \
}
#ifdef VERSION_SH
#undef aLoadBuffer
#undef aSaveBuffer
#undef aMix
#undef aEnvMixer
#undef aInterleave
/*
* Mix two tracks by simple clamped addition.
*
* s: DMEM source track 1
* d: DMEM source track 2 and destination
* c: number of bytes to write (rounded down to 16 byte alignment)
*/
#define aAddMixer(pkt, s, d, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_ADDMIXER, 24, 8) | \
_SHIFTL((c) >> 4, 16, 8) | _SHIFTL(0x7fff, 0, 16)); \
_a->words.w1 = (_SHIFTL(s, 16, 16) | _SHIFTL(d, 0, 16)); \
}
/*
* Loads a buffer from DRAM to DMEM.
*
* s: DRAM source
* d: DMEM destination
* c: number of bytes to copy (rounded down to 16 byte alignment)
*/
#define aLoadBuffer(pkt, s, d, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_LOADBUFF, 24, 8) | \
_SHIFTL((c) >> 4, 16, 8) | _SHIFTL(d, 0, 16); \
_a->words.w1 = (uintptr_t)(s); \
}
/*
* Stores a buffer from DMEM to DRAM.
*
* s: DMEM source
* d: DRAM destination
* c: number of bytes to copy (rounded down to 16 byte alignment)
*/
#define aSaveBuffer(pkt, s, d, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_SAVEBUFF, 24, 8) | \
_SHIFTL((c) >> 4, 16, 8) | _SHIFTL(s, 0, 16); \
_a->words.w1 = (uintptr_t)(d); \
}
/*
* Duplicates 128 bytes of data a number of times.
*
* 128 bytes are read from source DMEM address s.
* Then c identical copies of these bytes are written to DMEM address d.
*/
#define aDuplicate(pkt, s, d, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_DUPLICATE, 24, 8) | \
_SHIFTL(c, 16, 8) | _SHIFTL(s, 0, 16)); \
_a->words.w1 = (_SHIFTL(d, 16, 16) | _SHIFTL(0x80, 0, 16)); \
}
/*
* Fast resample.
*
* Before this command, call:
* aSetBuffer(cmd++, 0, in, out, count)
*
* This works like the other resample command but just takes the "nearest" sample,
* instead of a function of the four nearest samples.
*/
#define aResampleZoh(pkt, pitch, start_fract) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_RESAMPLE_ZOH, 24, 8) | \
_SHIFTL(pitch, 0, 16)); \
_a->words.w1 = _SHIFTL(start_fract, 0, 16); \
}
/*
* Mixes audio.
*
* Input and output addresses are taken from the i and o parameters.
* The volume with which the input is changed is taken from the g parameter.
* After the volume of the input samples have been changed, the result
* is added to the output.
*
* Note: count is first rounded down to the nearest multiple of 16 bytes
* and then rounded up to the nearest multiple of 32 bytes.
*/
#define aMix(pkt, g, i, o, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_MIXER, 24, 8) | \
_SHIFTL((c) >> 4, 16, 8) | _SHIFTL(g, 0, 16)); \
_a->words.w1 = _SHIFTL(i, 16, 16) | _SHIFTL(o, 0, 16); \
}
#define aEnvSetup1(pkt, a, b, c, d) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_ENVSETUP1, 24, 8) | \
_SHIFTL(a, 16, 8) | _SHIFTL(b, 0, 16)); \
_a->words.w1 = _SHIFTL(c, 16, 16) | _SHIFTL(d, 0, 16); \
}
#define aEnvSetup2(pkt, volLeft, volRight) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_ENVSETUP2, 24, 8); \
_a->words.w1 = _SHIFTL(volLeft, 16, 16) | \
_SHIFTL(volRight, 0, 16); \
}
#define aEnvMixer(pkt, inBuf, nSamples, bit1, bit2, bit3, dryLeft, dryRight, wetLeft, wetRight) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_ENVMIXER, 24, 8) | \
_SHIFTL((inBuf) >> 4, 16, 8) | \
_SHIFTL(nSamples, 8, 8)) | \
_SHIFTL(bit1, 2, 1) | _SHIFTL(bit2, 1, 1) | \
_SHIFTL(bit3, 0, 1); \
_a->words.w1 = _SHIFTL((dryLeft) >> 4, 24, 8) | \
_SHIFTL((dryRight) >> 4, 16, 8) | \
_SHIFTL((wetLeft) >> 4, 8, 8) | \
_SHIFTL((wetRight) >> 4, 0, 8); \
}
#define aInterleave(pkt, o, l, r, c) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_INTERLEAVE, 24, 8) | \
_SHIFTL((c) >> 4, 16, 8) | _SHIFTL(o, 0, 16); \
_a->words.w1 = _SHIFTL(l, 16, 16) | _SHIFTL(r, 0, 16); \
}
// countOrBuf meaning depends on flag
#define aFilter(pkt, f, countOrBuf, addr) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_FILTER, 24, 8) | _SHIFTL((f), 16, 8) | \
_SHIFTL((countOrBuf), 0, 16); \
_a->words.w1 = (uintptr_t)(addr); \
}
#define aHilogain(pkt, id, buflen, i) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = _SHIFTL(A_HILOGAIN, 24, 8) | \
_SHIFTL((id), 16, 8) | _SHIFTL((buflen), 0, 16); \
_a->words.w1 = _SHIFTL((i), 16, 16); \
}
#define aUnknown25(pkt, f, g, i, o) \
{ \
Acmd *_a = (Acmd *)pkt; \
\
_a->words.w0 = (_SHIFTL(A_UNK_25, 24, 8) | \
_SHIFTL((f), 16, 8) | _SHIFTL((g), 0, 16)); \
_a->words.w1 = _SHIFTL((i), 16, 16) | _SHIFTL((o), 0, 16); \
}
#endif
#endif /* _LANGUAGE_C */
#endif /* !_ABI_H_ */

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/*---------------------------------------------------------------------
Copyright (C) 1997, Nintendo.
File gs2dex.h
Coded by Yoshitaka Yasumoto. Jul 31, 1997.
Modified by
Comments Header file for S2DEX ucode.
$Id: gs2dex.h,v 1.21 1998/05/28 00:14:49 has Exp $
---------------------------------------------------------------------*/
#ifndef _GS2DEX_H_
#define _GS2DEX_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
/*===========================================================================*
* Macro
*===========================================================================*/
#define GS_CALC_DXT(line) (((1<< G_TX_DXT_FRAC)-1)/(line)+1)
#define GS_PIX2TMEM(pix, siz) ((pix)>>(4-(siz)))
#define GS_PIX2DXT(pix, siz) GS_CALC_DXT(GS_PIX2TMEM((pix), (siz)))
/*===========================================================================*
* Data structures for S2DEX microcode
*===========================================================================*/
/*---------------------------------------------------------------------------*
* Background
*---------------------------------------------------------------------------*/
#define G_BGLT_LOADBLOCK 0x0033
#define G_BGLT_LOADTILE 0xfff4
#define G_BG_FLAG_FLIPS 0x01
#define G_BG_FLAG_FLIPT 0x10
/* Non scalable background plane */
typedef struct {
u16 imageX; /* x-coordinate of upper-left position of texture (u10.5) */
u16 imageW; /* width of the texture (u10.2) */
s16 frameX; /* upper-left position of transferred frame (s10.2) */
u16 frameW; /* width of transferred frame (u10.2) */
u16 imageY; /* y-coordinate of upper-left position of texture (u10.5) */
u16 imageH; /* height of the texture (u10.2) */
s16 frameY; /* upper-left position of transferred frame (s10.2) */
u16 frameH; /* height of transferred frame (u10.2) */
u64 *imagePtr; /* texture source address on DRAM */
u16 imageLoad; /* which to use, LoadBlock or LoadTile */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u16 imagePal; /* pallet number */
u16 imageFlip; /* right & left image inversion (Inverted by G_BG_FLAG_FLIPS) */
/* The following is set in the initialization routine guS2DInitBg(). There is no need for the user to set it. */
u16 tmemW; /* TMEM width and Word size of frame 1 line.
At LoadBlock, GS_PIX2TMEM(imageW/4,imageSiz)
At LoadTile GS_PIX2TMEM(frameW/4,imageSiz)+1 */
u16 tmemH; /* height of TMEM loadable at a time (s13.2) 4 times value
When the normal texture, 512/tmemW*4
When the CI texture, 256/tmemW*4 */
u16 tmemLoadSH; /* SH value
At LoadBlock, tmemSize/2-1
At LoadTile, tmemW*16-1 */
u16 tmemLoadTH; /* TH value or Stride value
At LoadBlock, GS_CALC_DXT(tmemW)
At LoadTile, tmemH-1 */
u16 tmemSizeW; /* skip value of imagePtr for image 1-line
At LoadBlock, tmemW*2
At LoadTile, GS_PIX2TMEM(imageW/4,imageSiz)*2 */
u16 tmemSize; /* skip value of imagePtr for 1-loading
= tmemSizeW*tmemH */
} uObjBg_t; /* 40 bytes */
/* Scalable background plane */
typedef struct {
u16 imageX; /* x-coordinate of upper-left position of texture (u10.5) */
u16 imageW; /* width of texture (u10.2) */
s16 frameX; /* upper-left position of transferred frame (s10.2) */
u16 frameW; /* width of transferred frame (u10.2) */
u16 imageY; /* y-coordinate of upper-left position of texture (u10.5) */
u16 imageH; /* height of texture (u10.2) */
s16 frameY; /* upper-left position of transferred frame (s10.2) */
u16 frameH; /* height of transferred frame (u10.2) */
u64 *imagePtr; /* texture source address on DRAM */
u16 imageLoad; /* Which to use, LoadBlock or LoadTile? */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u16 imagePal; /* pallet number */
u16 imageFlip; /* right & left image inversion (Inverted by G_BG_FLAG_FLIPS) */
u16 scaleW; /* scale value of X-direction (u5.10) */
u16 scaleH; /* scale value of Y-direction (u5.10) */
s32 imageYorig; /* start point of drawing on image (s20.5) */
u8 padding[4];
} uObjScaleBg_t; /* 40 bytes */
typedef union {
uObjBg_t b;
uObjScaleBg_t s;
long long int force_structure_alignment;
} uObjBg;
/*---------------------------------------------------------------------------*
* 2D Objects
*---------------------------------------------------------------------------*/
#define G_OBJ_FLAG_FLIPS 1<<0 /* inversion to S-direction */
#define G_OBJ_FLAG_FLIPT 1<<4 /* nversion to T-direction */
typedef struct {
s16 objX; /* s10.2 OBJ x-coordinate of upper-left end */
u16 scaleW; /* u5.10 Scaling of u5.10 width direction */
u16 imageW; /* u10.5 width of u10.5 texture (length of S-direction) */
u16 paddingX; /* Unused - Always 0 */
s16 objY; /* s10.2 OBJ y-coordinate of s10.2 OBJ upper-left end */
u16 scaleH; /* u5.10 Scaling of u5.10 height direction */
u16 imageH; /* u10.5 height of u10.5 texture (length of T-direction) */
u16 paddingY; /* Unused - Always 0 */
u16 imageStride; /* folding width of texel (In units of 64bit word) */
u16 imageAdrs; /* texture header position in TMEM (In units of 64bit word) */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u8 imagePal; /* pallet number (0-7) */
u8 imageFlags; /* The display flag - G_OBJ_FLAG_FLIP* */
} uObjSprite_t; /* 24 bytes */
typedef union {
uObjSprite_t s;
long long int force_structure_alignment;
} uObjSprite;
/*---------------------------------------------------------------------------*
* 2D Matrix
*---------------------------------------------------------------------------*/
typedef struct {
s32 A, B, C, D; /* s15.16 */
s16 X, Y; /* s10.2 */
u16 BaseScaleX; /* u5.10 */
u16 BaseScaleY; /* u5.10 */
} uObjMtx_t; /* 24 bytes */
typedef union {
uObjMtx_t m;
long long int force_structure_alignment;
} uObjMtx;
typedef struct {
s16 X, Y; /* s10.2 */
u16 BaseScaleX; /* u5.10 */
u16 BaseScaleY; /* u5.10 */
} uObjSubMtx_t; /* 8 bytes */
typedef union {
uObjSubMtx_t m;
long long int force_structure_alignment;
} uObjSubMtx;
/*---------------------------------------------------------------------------*
* Loading into TMEM
*---------------------------------------------------------------------------*/
#define G_OBJLT_TXTRBLOCK 0x00001033
#define G_OBJLT_TXTRTILE 0x00fc1034
#define G_OBJLT_TLUT 0x00000030
#define GS_TB_TSIZE(pix,siz) (GS_PIX2TMEM((pix),(siz))-1)
#define GS_TB_TLINE(pix,siz) (GS_CALC_DXT(GS_PIX2TMEM((pix),(siz))))
typedef struct {
u32 type; /* G_OBJLT_TXTRBLOCK divided into types */
u64 *image; /* texture source address on DRAM */
u16 tmem; /* loaded TMEM word address (8byteWORD) */
u16 tsize; /* Texture size, Specified by macro GS_TB_TSIZE() */
u16 tline; /* width of Texture 1-line, Specified by macro GS_TB_TLINE() */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12) */
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrBlock_t; /* 24 bytes */
#define GS_TT_TWIDTH(pix,siz) ((GS_PIX2TMEM((pix), (siz))<<2)-1)
#define GS_TT_THEIGHT(pix,siz) (((pix)<<2)-1)
typedef struct {
u32 type; /* G_OBJLT_TXTRTILE divided into types */
u64 *image; /* texture source address on DRAM */
u16 tmem; /* loaded TMEM word address (8byteWORD)*/
u16 twidth; /* width of Texture (Specified by macro GS_TT_TWIDTH()) */
u16 theight; /* height of Texture (Specified by macro GS_TT_THEIGHT()) */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12) */
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrTile_t; /* 24 bytes */
#define GS_PAL_HEAD(head) ((head)+256)
#define GS_PAL_NUM(num) ((num)-1)
typedef struct {
u32 type; /* G_OBJLT_TLUT divided into types */
u64 *image; /* texture source address on DRAM */
u16 phead; /* pallet number of load header (Between 256 and 511) */
u16 pnum; /* loading pallet number -1 */
u16 zero; /* Assign 0 all the time */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12)*/
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrTLUT_t; /* 24 bytes */
typedef union {
uObjTxtrBlock_t block;
uObjTxtrTile_t tile;
uObjTxtrTLUT_t tlut;
long long int force_structure_alignment;
} uObjTxtr;
/*---------------------------------------------------------------------------*
* Loading into TMEM & 2D Objects
*---------------------------------------------------------------------------*/
typedef struct {
uObjTxtr txtr;
uObjSprite sprite;
} uObjTxSprite; /* 48 bytes */
/*===========================================================================*
* GBI Commands for S2DEX microcode
*===========================================================================*/
/* GBI Header */
#ifdef F3DEX_GBI_2
#define G_OBJ_RECTANGLE_R 0xda
#define G_OBJ_MOVEMEM 0xdc
#define G_RDPHALF_0 0xe4
#define G_OBJ_RECTANGLE 0x01
#define G_OBJ_SPRITE 0x02
#define G_SELECT_DL 0x04
#define G_OBJ_LOADTXTR 0x05
#define G_OBJ_LDTX_SPRITE 0x06
#define G_OBJ_LDTX_RECT 0x07
#define G_OBJ_LDTX_RECT_R 0x08
#define G_BG_1CYC 0x09
#define G_BG_COPY 0x0a
#define G_OBJ_RENDERMODE 0x0b
#else
#define G_BG_1CYC 0x01
#define G_BG_COPY 0x02
#define G_OBJ_RECTANGLE 0x03
#define G_OBJ_SPRITE 0x04
#define G_OBJ_MOVEMEM 0x05
#define G_SELECT_DL 0xb0
#define G_OBJ_RENDERMODE 0xb1
#define G_OBJ_RECTANGLE_R 0xb2
#define G_OBJ_LOADTXTR 0xc1
#define G_OBJ_LDTX_SPRITE 0xc2
#define G_OBJ_LDTX_RECT 0xc3
#define G_OBJ_LDTX_RECT_R 0xc4
#define G_RDPHALF_0 0xe4
#endif
/*---------------------------------------------------------------------------*
* Background wrapped screen
*---------------------------------------------------------------------------*/
#define gSPBgRectangle(pkt, m, mptr) gDma0p((pkt),(m),(mptr),0)
#define gsSPBgRectangle(m, mptr) gsDma0p( (m),(mptr),0)
#define gSPBgRectCopy(pkt, mptr) gSPBgRectangle((pkt), G_BG_COPY, (mptr))
#define gsSPBgRectCopy(mptr) gsSPBgRectangle( G_BG_COPY, (mptr))
#define gSPBgRect1Cyc(pkt, mptr) gSPBgRectangle((pkt), G_BG_1CYC, (mptr))
#define gsSPBgRect1Cyc(mptr) gsSPBgRectangle( G_BG_1CYC, (mptr))
/*---------------------------------------------------------------------------*
* 2D Objects
*---------------------------------------------------------------------------*/
#define gSPObjSprite(pkt, mptr) gDma0p((pkt),G_OBJ_SPRITE, (mptr),0)
#define gsSPObjSprite(mptr) gsDma0p( G_OBJ_SPRITE, (mptr),0)
#define gSPObjRectangle(pkt, mptr) gDma0p((pkt),G_OBJ_RECTANGLE, (mptr),0)
#define gsSPObjRectangle(mptr) gsDma0p( G_OBJ_RECTANGLE, (mptr),0)
#define gSPObjRectangleR(pkt, mptr) gDma0p((pkt),G_OBJ_RECTANGLE_R,(mptr),0)
#define gsSPObjRectangleR(mptr) gsDma0p( G_OBJ_RECTANGLE_R,(mptr),0)
/*---------------------------------------------------------------------------*
* 2D Matrix
*---------------------------------------------------------------------------*/
#define gSPObjMatrix(pkt, mptr) gDma1p((pkt),G_OBJ_MOVEMEM,(mptr),0,23)
#define gsSPObjMatrix(mptr) gsDma1p( G_OBJ_MOVEMEM,(mptr),0,23)
#define gSPObjSubMatrix(pkt, mptr) gDma1p((pkt),G_OBJ_MOVEMEM,(mptr),2, 7)
#define gsSPObjSubMatrix(mptr) gsDma1p( G_OBJ_MOVEMEM,(mptr),2, 7)
/*---------------------------------------------------------------------------*
* Loading into TMEM
*---------------------------------------------------------------------------*/
#define gSPObjLoadTxtr(pkt, tptr) gDma0p((pkt),G_OBJ_LOADTXTR, (tptr),23)
#define gsSPObjLoadTxtr(tptr) gsDma0p( G_OBJ_LOADTXTR, (tptr),23)
#define gSPObjLoadTxSprite(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_SPRITE,(tptr),47)
#define gsSPObjLoadTxSprite(tptr) gsDma0p( G_OBJ_LDTX_SPRITE,(tptr),47)
#define gSPObjLoadTxRect(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_RECT, (tptr),47)
#define gsSPObjLoadTxRect(tptr) gsDma0p( G_OBJ_LDTX_RECT, (tptr),47)
#define gSPObjLoadTxRectR(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_RECT_R,(tptr),47)
#define gsSPObjLoadTxRectR(tptr) gsDma0p( G_OBJ_LDTX_RECT_R,(tptr),47)
/*---------------------------------------------------------------------------*
* Select Display List
*---------------------------------------------------------------------------*/
#define gSPSelectDL(pkt, mptr, sid, flag, mask) \
{ gDma1p((pkt), G_RDPHALF_0, (flag), (u32)(mptr) & 0xffff, (sid)); \
gDma1p((pkt), G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_PUSH); }
#define gsSPSelectDL(mptr, sid, flag, mask) \
{ gsDma1p(G_RDPHALF_0, (flag), (u32)(mptr) & 0xffff, (sid)); \
gsDma1p(G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_PUSH); }
#define gSPSelectBranchDL(pkt, mptr, sid, flag, mask) \
{ gDma1p((pkt), G_RDPHALF_0, (flag), (u32)(mptr) & 0xffff, (sid)); \
gDma1p((pkt), G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_NOPUSH); }
#define gsSPSelectBranchDL(mptr, sid, flag, mask) \
{ gsDma1p(G_RDPHALF_0, (flag), (u32)(mptr) & 0xffff, (sid)); \
gsDma1p(G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_NOPUSH); }
/*---------------------------------------------------------------------------*
* Set general status
*---------------------------------------------------------------------------*/
#define G_MW_GENSTAT 0x08 /* Note that it is the same value of G_MW_FOG */
#define gSPSetStatus(pkt, sid, val) \
gMoveWd((pkt), G_MW_GENSTAT, (sid), (val))
#define gsSPSetStatus(sid, val) \
gsMoveWd( G_MW_GENSTAT, (sid), (val))
/*---------------------------------------------------------------------------*
* Set Object Render Mode
*---------------------------------------------------------------------------*/
#define G_OBJRM_NOTXCLAMP 0x01
#define G_OBJRM_XLU 0x02 /* Ignored */
#define G_OBJRM_ANTIALIAS 0x04 /* Ignored */
#define G_OBJRM_BILERP 0x08
#define G_OBJRM_SHRINKSIZE_1 0x10
#define G_OBJRM_SHRINKSIZE_2 0x20
#define G_OBJRM_WIDEN 0x40
#define gSPObjRenderMode(pkt, mode) gImmp1((pkt),G_OBJ_RENDERMODE,(mode))
#define gsSPObjRenderMode(mode) gsImmp1( G_OBJ_RENDERMODE,(mode))
/*===========================================================================*
* Render Mode Macro
*===========================================================================*/
#define RM_RA_SPRITE(clk) \
AA_EN | CVG_DST_CLAMP | \
CVG_X_ALPHA | ALPHA_CVG_SEL | ZMODE_OPA | TEX_EDGE | \
GBL_c##clk(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
#define G_RM_SPRITE G_RM_OPA_SURF
#define G_RM_SPRITE2 G_RM_OPA_SURF2
#define G_RM_RA_SPRITE RM_RA_SPRITE(1)
#define G_RM_RA_SPRITE2 RM_RA_SPRITE(2)
#define G_RM_AA_SPRITE G_RM_AA_TEX_TERR
#define G_RM_AA_SPRITE2 G_RM_AA_TEX_TERR2
#define G_RM_XLU_SPRITE G_RM_XLU_SURF
#define G_RM_XLU_SPRITE2 G_RM_XLU_SURF2
#define G_RM_AA_XLU_SPRITE G_RM_AA_XLU_SURF
#define G_RM_AA_XLU_SPRITE2 G_RM_AA_XLU_SURF2
/*===========================================================================*
* External functions
*===========================================================================*/
extern u64 gspS2DEX_fifoTextStart[], gspS2DEX_fifoTextEnd[];
extern u64 gspS2DEX_fifoDataStart[], gspS2DEX_fifoDataEnd[];
extern u64 gspS2DEX_fifo_dTextStart[], gspS2DEX_fifo_dTextEnd[];
extern u64 gspS2DEX_fifo_dDataStart[], gspS2DEX_fifo_dDataEnd[];
extern u64 gspS2DEX2_fifoTextStart[], gspS2DEX2_fifoTextEnd[];
extern u64 gspS2DEX2_fifoDataStart[], gspS2DEX2_fifoDataEnd[];
extern u64 gspS2DEX2_xbusTextStart[], gspS2DEX2_xbusTextEnd[];
extern u64 gspS2DEX2_xbusDataStart[], gspS2DEX2_xbusDataEnd[];
extern void guS2DInitBg(uObjBg *);
#ifdef F3DEX_GBI_2
# define guS2DEmuBgRect1Cyc guS2D2EmuBgRect1Cyc /*Wrapper*/
# define guS2DEmuSetScissor guS2D2EmuSetScissor /*Wrapper*/
extern void guS2D2EmuSetScissor(u32, u32, u32, u32, u8);
extern void guS2D2EmuBgRect1Cyc(Gfx **, uObjBg *);
#else
extern void guS2DEmuSetScissor(u32, u32, u32, u32, u8);
extern void guS2DEmuBgRect1Cyc(Gfx **, uObjBg *);
#endif
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* _GS2DEX_H_ */
/*======== End of gs2dex.h ========*/

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@ -1,6 +1,9 @@
#ifndef _ULTRA64_GU_H_
#define _ULTRA64_GU_H_
#include <PR/mbi.h>
#include <PR/ultratypes.h>
#define GU_PI 3.1415926
/* Functions */
@ -18,4 +21,9 @@ void guMtxIdent(Mtx *m);
void guMtxIdentF(float mf[4][4]);
void guMtxL2F(float mf[4][4], Mtx *m);
void guNormalize(float *, float *, float *);
/* Used only in Fast3DEX2 */
void guLookAtReflect (Mtx *m, LookAt *l, float xEye, float yEye, float zEye,
float xAt, float yAt, float zAt,
float xUp, float yUp, float zUp);
#endif

48
include/PR/libaudio.h Normal file
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@ -0,0 +1,48 @@
#ifndef _ULTRA64_LIBAUDIO_H_
#define _ULTRA64_LIBAUDIO_H_
#include "abi.h"
typedef struct
{
u8 *offset;
s32 len;
#ifdef VERSION_SH
s8 magic[2]; // tbl: 0x0204, otherwise: 0x0203
// for ctl (else zeros):
union {
// unused, just for clarification (big endian)
struct {
u8 bank;
u8 ff;
u8 numInstruments;
u8 numDrums;
} as_u8;
// used
struct {
s16 bankAndFf;
s16 numInstrumentsAndDrums;
} as_s16;
} ctl;
#endif
} ALSeqData;
typedef struct
{
#ifndef VERSION_SH
s16 revision;
#endif
s16 seqCount;
#ifdef VERSION_SH
s16 unk2;
u8 *data;
s32 pad[2];
#endif
ALSeqData seqArray[1];
} ALSeqFile;
void alSeqFileNew(ALSeqFile *f, u8 *base);
#endif

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@ -12,6 +12,7 @@
extern u32 osTvType;
extern u32 osRomBase;
extern u32 osResetType;
extern u32 osMemSize;
extern u8 osAppNmiBuffer[64];
extern u64 osClockRate;
#endif /* _LIBULTRA_H */

102
include/PR/mbi.h Normal file
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@ -0,0 +1,102 @@
#ifndef _MBI_H_
#define _MBI_H_
#include "platform_info.h"
/**************************************************************************
* *
* Copyright (C) 1994, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
/**************************************************************************
*
* $Revision: 1.136 $
* $Date: 1999/01/05 13:04:00 $
* $Source: /hosts/gate3/exdisk2/cvs/N64OS/Master/cvsmdev2/PR/include/mbi.h,v $
*
**************************************************************************/
/*
* Header file for the Media Binary Interface
*
* NOTE: This file is included by the RSP microcode, so any C-specific
* constructs must be bracketed by #ifdef _LANGUAGE_C
*
*/
/*
* the SHIFT macros are used to build display list commands, inserting
* bit-fields into a 32-bit word. They take a value, a shift amount,
* and a width.
*
* For the left shift, the lower bits of the value are masked,
* then shifted left.
*
* For the right shift, the value is shifted right, then the lower bits
* are masked.
*
* (NOTE: _SHIFTL(v, 0, 32) won't work, just use an assignment)
*
*/
#define _SHIFTL(v, s, w) \
((unsigned int) (((unsigned int)(v) & ((0x01 << (w)) - 1)) << (s)))
#define _SHIFTR(v, s, w) \
((unsigned int)(((unsigned int)(v) >> (s)) & ((0x01 << (w)) - 1)))
#define _SHIFT _SHIFTL /* old, for compatibility only */
#define G_ON (1)
#define G_OFF (0)
/**************************************************************************
*
* Graphics Binary Interface
*
**************************************************************************/
#include <PR/gbi.h>
/**************************************************************************
*
* Audio Binary Interface
*
**************************************************************************/
#include <PR/abi.h>
/**************************************************************************
*
* Task list
*
**************************************************************************/
#define M_GFXTASK 1
#define M_AUDTASK 2
#define M_VIDTASK 3
#define M_HVQTASK 6
#define M_HVQMTASK 7
/**************************************************************************
*
* Segment macros and definitions
*
**************************************************************************/
#define NUM_SEGMENTS (16)
#define SEGMENT_OFFSET(a) ((unsigned int)(a) & 0x00ffffff)
#define SEGMENT_NUMBER(a) (((unsigned int)(a) << 4) >> 28)
#define SEGMENT_ADDR(num, off) (((num) << 24) + (off))
#ifndef NULL
#define NULL 0
#endif
#endif /* !_MBI_H_ */

92
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@ -0,0 +1,92 @@
/*====================================================================
* os_ai.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_ai.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:04 $
*---------------------------------------------------------------------*/
#ifndef _OS_AI_H_
#define _OS_AI_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Audio interface (Ai) */
extern u32 osAiGetStatus(void);
extern u32 osAiGetLength(void);
extern s32 osAiSetFrequency(u32);
extern s32 osAiSetNextBuffer(void *, u32);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_AI_H_ */

96
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@ -0,0 +1,96 @@
/*====================================================================
* os_cache.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_cache.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:04 $
*---------------------------------------------------------------------*/
#ifndef _OS_CACHE_H_
#define _OS_CACHE_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
#define OS_DCACHE_ROUNDUP_ADDR(x) (void *)(((((u32)(x)+0xf)/0x10)*0x10))
#define OS_DCACHE_ROUNDUP_SIZE(x) (u32)(((((u32)(x)+0xf)/0x10)*0x10))
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Cache operations and macros */
extern void osInvalDCache(void *, size_t);
extern void osInvalICache(void *, size_t);
extern void osWritebackDCache(void *, size_t);
extern void osWritebackDCacheAll(void);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_CACHE_H_ */

207
include/PR/os_cont.h Normal file
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@ -0,0 +1,207 @@
/*====================================================================
* os_cont.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_cont.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:05 $
*---------------------------------------------------------------------*/
#ifndef _OS_CONT_H_
#define _OS_CONT_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#include "os_message.h"
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
/*
* Structure for controllers
*/
typedef struct {
u16 type; /* Controller Type */
u8 status; /* Controller status */
u8 errnum;
}OSContStatus;
typedef struct {
u16 button;
s8 stick_x; /* -80 <= stick_x <= 80 */
s8 stick_y; /* -80 <= stick_y <= 80 */
u8 errnum;
} OSContPad;
typedef struct {
void *address; /* Ram pad Address: 11 bits */
u8 databuffer[32]; /* address of the data buffer */
u8 addressCrc; /* CRC code for address */
u8 dataCrc; /* CRC code for data */
u8 errnum;
} OSContRamIo;
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
/*
* Controllers number
*/
#ifndef _HW_VERSION_1
#define MAXCONTROLLERS 4
#else
#define MAXCONTROLLERS 6
#endif
/* controller errors */
#define CONT_NO_RESPONSE_ERROR 0x8
#define CONT_OVERRUN_ERROR 0x4
#ifdef _HW_VERSION_1
#define CONT_FRAME_ERROR 0x2
#define CONT_COLLISION_ERROR 0x1
#endif
/* Controller type */
#define CONT_ABSOLUTE 0x0001
#define CONT_RELATIVE 0x0002
#define CONT_JOYPORT 0x0004
#define CONT_EEPROM 0x8000
#define CONT_EEP16K 0x4000
#define CONT_TYPE_MASK 0x1f07
#define CONT_TYPE_NORMAL 0x0005
#define CONT_TYPE_MOUSE 0x0002
#define CONT_TYPE_VOICE 0x0100
/* Controller status */
#define CONT_CARD_ON 0x01
#define CONT_CARD_PULL 0x02
#define CONT_ADDR_CRC_ER 0x04
#define CONT_EEPROM_BUSY 0x80
/* Buttons */
#define CONT_A 0x8000
#define CONT_B 0x4000
#define CONT_G 0x2000
#define CONT_START 0x1000
#define CONT_UP 0x0800
#define CONT_DOWN 0x0400
#define CONT_LEFT 0x0200
#define CONT_RIGHT 0x0100
#define CONT_L 0x0020
#define CONT_R 0x0010
#define CONT_E 0x0008
#define CONT_D 0x0004
#define CONT_C 0x0002
#define CONT_F 0x0001
/* Nintendo's official button names */
#define A_BUTTON CONT_A
#define B_BUTTON CONT_B
#define L_TRIG CONT_L
#define R_TRIG CONT_R
#define Z_TRIG CONT_G
#define START_BUTTON CONT_START
#define U_JPAD CONT_UP
#define L_JPAD CONT_LEFT
#define R_JPAD CONT_RIGHT
#define D_JPAD CONT_DOWN
#define U_CBUTTONS CONT_E
#define L_CBUTTONS CONT_C
#define R_CBUTTONS CONT_F
#define D_CBUTTONS CONT_D
/* Controller error number */
#define CONT_ERR_NO_CONTROLLER PFS_ERR_NOPACK /* 1 */
#define CONT_ERR_CONTRFAIL CONT_OVERRUN_ERROR /* 4 */
#define CONT_ERR_INVALID PFS_ERR_INVALID /* 5 */
#define CONT_ERR_DEVICE PFS_ERR_DEVICE /* 11 */
#define CONT_ERR_NOT_READY 12
#define CONT_ERR_VOICE_MEMORY 13
#define CONT_ERR_VOICE_WORD 14
#define CONT_ERR_VOICE_NO_RESPONSE 15
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Controller interface */
extern s32 osContInit(OSMesgQueue *, u8 *, OSContStatus *);
extern s32 osContReset(OSMesgQueue *, OSContStatus *);
extern s32 osContStartQuery(OSMesgQueue *);
extern s32 osContStartReadData(OSMesgQueue *);
#ifndef _HW_VERSION_1
extern s32 osContSetCh(u8);
#endif
extern void osContGetQuery(OSContStatus *);
extern void osContGetReadData(OSContPad *);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_CONT_H_ */

107
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@ -0,0 +1,107 @@
/*====================================================================
* os_eeprom.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_eeprom.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:06 $
*---------------------------------------------------------------------*/
#ifndef _OS_EEPROM_H_
#define _OS_EEPROM_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#include "os_message.h"
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
/* EEPROM TYPE */
#define EEPROM_TYPE_4K 0x01
#define EEPROM_TYPE_16K 0x02
/* definition for EEPROM */
#define EEPROM_MAXBLOCKS 64
#define EEP16K_MAXBLOCKS 256
#define EEPROM_BLOCK_SIZE 8
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* EEPROM interface */
extern s32 osEepromProbe(OSMesgQueue *);
extern s32 osEepromRead(OSMesgQueue *, u8, u8 *);
extern s32 osEepromWrite(OSMesgQueue *, u8, u8 *);
extern s32 osEepromLongRead(OSMesgQueue *, u8, u8 *, int);
extern s32 osEepromLongWrite(OSMesgQueue *, u8, u8 *, int);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_EEPROM_H_ */

119
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@ -0,0 +1,119 @@
/*====================================================================
* os_exception.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_exception.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:07 $
*---------------------------------------------------------------------*/
#ifndef _OS_EXCEPTION_H_
#define _OS_EXCEPTION_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
typedef u32 OSIntMask;
typedef u32 OSHWIntr;
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
/* Flags for debugging purpose */
#define OS_FLAG_CPU_BREAK 1 /* Break exception has occurred */
#define OS_FLAG_FAULT 2 /* CPU fault has occurred */
/* Interrupt masks */
#define OS_IM_NONE 0x00000001
#define OS_IM_SW1 0x00000501
#define OS_IM_SW2 0x00000601
#define OS_IM_CART 0x00000c01
#define OS_IM_PRENMI 0x00001401
#define OS_IM_RDBWRITE 0x00002401
#define OS_IM_RDBREAD 0x00004401
#define OS_IM_COUNTER 0x00008401
#define OS_IM_CPU 0x0000ff01
#define OS_IM_SP 0x00010401
#define OS_IM_SI 0x00020401
#define OS_IM_AI 0x00040401
#define OS_IM_VI 0x00080401
#define OS_IM_PI 0x00100401
#define OS_IM_DP 0x00200401
#define OS_IM_ALL 0x003fff01
#define RCP_IMASK 0x003f0000
#define RCP_IMASKSHIFT 16
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Interrupt operations */
extern OSIntMask osGetIntMask(void);
extern OSIntMask osSetIntMask(OSIntMask);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_EXCEPTION_H_ */

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@ -1,16 +1,19 @@
#ifndef _ULTRA64_OS_INTERNAL_H_
#define _ULTRA64_OS_INTERNAL_H_
#include "PR/os_message.h"
/* Internal functions used by the operating system */
/* Do not include this header in application code */
/* Variables */
//extern u64 osClockRate;
extern u64 osClockRate;
/* Functions */
/*u32 __osProbeTLB(void *);
u32 __osDisableInt(void);
void __osRestoreInt(u32);*/
OSThread *__osGetCurrFaultedThread(void);
#endif

10
include/PR/os_libc.h Normal file
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@ -0,0 +1,10 @@
#ifndef _OS_LIBC_H_
#define _OS_LIBC_H_
#include "ultratypes.h"
// Old deprecated functions from strings.h, replaced by memcpy/memset.
extern void bcopy(const void *, void *, size_t);
extern void bzero(void *, size_t);
#endif /* !_OS_LIBC_H_ */

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@ -0,0 +1,164 @@
/*====================================================================
* os_message.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_message.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:15 $
*---------------------------------------------------------------------*/
#ifndef _OS_MESSAGE_H_
#define _OS_MESSAGE_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#include <PR/os_thread.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
typedef u32 OSEvent;
/*
* Structure for message
*/
typedef void * OSMesg;
/*
* Structure for message queue
*/
typedef struct OSMesgQueue_s {
OSThread *mtqueue; /* Queue to store threads blocked
on empty mailboxes (receive) */
OSThread *fullqueue; /* Queue to store threads blocked
on full mailboxes (send) */
s32 validCount; /* Contains number of valid message */
s32 first; /* Points to first valid message */
s32 msgCount; /* Contains total # of messages */
OSMesg *msg; /* Points to message buffer array */
} OSMesgQueue;
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
/* Events */
#ifdef _FINALROM
#define OS_NUM_EVENTS 15
#else
#define OS_NUM_EVENTS 23
#endif
#define OS_EVENT_SW1 0 /* CPU SW1 interrupt */
#define OS_EVENT_SW2 1 /* CPU SW2 interrupt */
#define OS_EVENT_CART 2 /* Cartridge interrupt: used by rmon */
#define OS_EVENT_COUNTER 3 /* Counter int: used by VI/Timer Mgr */
#define OS_EVENT_SP 4 /* SP task done interrupt */
#define OS_EVENT_SI 5 /* SI (controller) interrupt */
#define OS_EVENT_AI 6 /* AI interrupt */
#define OS_EVENT_VI 7 /* VI interrupt: used by VI/Timer Mgr */
#define OS_EVENT_PI 8 /* PI interrupt: used by PI Manager */
#define OS_EVENT_DP 9 /* DP full sync interrupt */
#define OS_EVENT_CPU_BREAK 10 /* CPU breakpoint: used by rmon */
#define OS_EVENT_SP_BREAK 11 /* SP breakpoint: used by rmon */
#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
#ifndef _FINALROM
#define OS_EVENT_RDB_READ_DONE 15 /* RDB read ok event: used by rmon */
#define OS_EVENT_RDB_LOG_DONE 16 /* read of log data complete */
#define OS_EVENT_RDB_DATA_DONE 17 /* read of hostio data complete */
#define OS_EVENT_RDB_REQ_RAMROM 18 /* host needs ramrom access */
#define OS_EVENT_RDB_FREE_RAMROM 19 /* host is done with ramrom access */
#define OS_EVENT_RDB_DBG_DONE 20
#define OS_EVENT_RDB_FLUSH_PROF 21
#define OS_EVENT_RDB_ACK_PROF 22
#endif
/* Flags to turn blocking on/off when sending/receiving message */
#define OS_MESG_NOBLOCK 0
#define OS_MESG_BLOCK 1
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/* Get count of valid messages in queue */
#define MQ_GET_COUNT(mq) ((mq)->validCount)
/* Figure out if message queue is empty or full */
#define MQ_IS_EMPTY(mq) (MQ_GET_COUNT(mq) == 0)
#define MQ_IS_FULL(mq) (MQ_GET_COUNT(mq) >= (mq)->msgCount)
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Message operations */
extern void osCreateMesgQueue(OSMesgQueue *, OSMesg *, s32);
extern s32 osSendMesg(OSMesgQueue *, OSMesg, s32);
extern s32 osJamMesg(OSMesgQueue *, OSMesg, s32);
extern s32 osRecvMesg(OSMesgQueue *, OSMesg *, s32);
/* Event operations */
extern void osSetEventMesg(OSEvent, OSMesgQueue *, OSMesg);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_MESSAGE_H_ */

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@ -1,11 +1,11 @@
#ifndef _ULTRA64_OS_MISC_H_
#define _ULTRA64_OS_MISC_H_
#include <PR/ultratypes.h>
/* Miscellaneous OS functions */
void osInitialize(void);
u32 osGetCount(void);
u32 osVirtualToPhysical(void *);
uintptr_t osVirtualToPhysical(void *);
#endif

86
include/PR/os_pi.h Normal file
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@ -0,0 +1,86 @@
#ifndef _ULTRA64_PI_H_
#define _ULTRA64_PI_H_
#include <ultra64.h>
/* Ultra64 Parallel Interface */
/* Types */
typedef struct {
#if !defined(VERSION_EU)
u32 errStatus;
#endif
void *dramAddr;
void *C2Addr;
u32 sectorSize;
u32 C1ErrNum;
u32 C1ErrSector[4];
} __OSBlockInfo;
typedef struct {
u32 cmdType; // 0
u16 transferMode; // 4
u16 blockNum; // 6
s32 sectorNum; // 8
uintptr_t devAddr; // c
#if defined(VERSION_EU)
u32 errStatus; //error status added moved to blockinfo
#endif
u32 bmCtlShadow; // 10
u32 seqCtlShadow; // 14
__OSBlockInfo block[2]; // 18
} __OSTranxInfo;
typedef struct OSPiHandle_s {
struct OSPiHandle_s *next;
u8 type;
u8 latency;
u8 pageSize;
u8 relDuration;
u8 pulse;
u8 domain;
u32 baseAddress;
u32 speed;
__OSTranxInfo transferInfo;
} OSPiHandle;
typedef struct {
u8 type;
uintptr_t address;
} OSPiInfo;
typedef struct {
u16 type;
u8 pri;
u8 status;
OSMesgQueue *retQueue;
} OSIoMesgHdr;
typedef struct {
/*0x00*/ OSIoMesgHdr hdr;
/*0x08*/ void *dramAddr;
/*0x0C*/ uintptr_t devAddr;
/*0x10*/ size_t size;
OSPiHandle *piHandle; // from the official definition
} OSIoMesg;
/* Definitions */
#define OS_READ 0 // device -> RDRAM
#define OS_WRITE 1 // device <- RDRAM
#define OS_MESG_PRI_NORMAL 0
#define OS_MESG_PRI_HIGH 1
/* Functions */
s32 osPiStartDma(OSIoMesg *mb, s32 priority, s32 direction, uintptr_t devAddr, void *vAddr,
size_t nbytes, OSMesgQueue *mq);
void osCreatePiManager(OSPri pri, OSMesgQueue *cmdQ, OSMesg *cmdBuf, s32 cmdMsgCnt);
OSMesgQueue *osPiGetCmdQueue(void);
s32 osPiWriteIo(uintptr_t devAddr, u32 data);
s32 osPiReadIo(uintptr_t devAddr, u32 *data);
s32 osPiRawStartDma(s32 dir, u32 cart_addr, void *dram_addr, size_t size);
s32 osEPiRawStartDma(OSPiHandle *piHandle, s32 dir, u32 cart_addr, void *dram_addr, size_t size);
#endif

92
include/PR/os_rdp.h Normal file
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@ -0,0 +1,92 @@
/*====================================================================
* os_rdp.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_rdp.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:16 $
*---------------------------------------------------------------------*/
#ifndef _OS_RDP_H_
#define _OS_RDP_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* Display processor interface (Dp) */
extern u32 osDpGetStatus(void);
extern void osDpSetStatus(u32);
extern void osDpGetCounters(u32 *);
extern s32 osDpSetNextBuffer(void *, u64);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_RDP_H_ */

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@ -1,6 +1,6 @@
#ifndef _ULTRA64_THREAD_H_
#define _ULTRA64_THREAD_H_
#include "ultratypes.h"
/* Recommended priorities for system threads */
#define OS_PRIORITY_MAX 255
#define OS_PRIORITY_VIMGR 254

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@ -1,6 +1,8 @@
#ifndef _ULTRA64_TIME_H_
#define _ULTRA64_TIME_H_
#include "message.h"
#include <PR/ultratypes.h>
#include <PR/os_message.h>
/* Types */
@ -20,6 +22,6 @@ typedef u64 OSTime;
OSTime osGetTime(void);
void osSetTime(OSTime time);
u32 osSetTimer(OSTimer *, OSTime, u64, OSMesgQueue *, OSMesg);
u32 osSetTimer(OSTimer *, OSTime, OSTime, OSMesgQueue *, OSMesg);
#endif

107
include/PR/os_tlb.h Normal file
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@ -0,0 +1,107 @@
/*====================================================================
* os_tlb.h
*
* Copyright 1995, Silicon Graphics, Inc.
* All Rights Reserved.
*
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
* Inc.; the contents of this file may not be disclosed to third
* parties, copied or duplicated in any form, in whole or in part,
* without the prior written permission of Silicon Graphics, Inc.
*
* RESTRICTED RIGHTS LEGEND:
* Use, duplication or disclosure by the Government is subject to
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
* in Technical Data and Computer Software clause at DFARS
* 252.227-7013, and/or in similar or successor clauses in the FAR,
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
* Copyright Laws of the United States.
*====================================================================*/
/*---------------------------------------------------------------------*
Copyright (C) 1998 Nintendo. (Originated by SGI)
$RCSfile: os_tlb.h,v $
$Revision: 1.1 $
$Date: 1998/10/09 08:01:20 $
*---------------------------------------------------------------------*/
#ifndef _OS_TLB_H_
#define _OS_TLB_H_
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
#include <PR/ultratypes.h>
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Type definitions
*
*/
typedef u32 OSPageMask;
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
/**************************************************************************
*
* Global definitions
*
*/
/*
* Page size argument for TLB routines
*/
#define OS_PM_4K 0x0000000
#define OS_PM_16K 0x0006000
#define OS_PM_64K 0x001e000
#define OS_PM_256K 0x007e000
#define OS_PM_1M 0x01fe000
#define OS_PM_4M 0x07fe000
#define OS_PM_16M 0x1ffe000
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
/**************************************************************************
*
* Macro definitions
*
*/
/**************************************************************************
*
* Extern variables
*
*/
/**************************************************************************
*
* Function prototypes
*
*/
/* TLB management routines */
extern void osMapTLB(s32, OSPageMask, void *, u32, u32, s32);
extern void osMapTLBRdb(void);
extern void osUnmapTLB(s32);
extern void osUnmapTLBAll(void);
extern void osSetTLBASID(s32);
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* !_OS_TLB_H_ */

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@ -1,6 +1,9 @@
#ifndef _ULTRA64_VI_H_
#define _ULTRA64_VI_H_
#include <PR/ultratypes.h>
#include <PR/os_message.h>
/* Ultra64 Video Interface */
@ -58,7 +61,7 @@ typedef struct
/* 0x00 */ u16 unk00; //some kind of flags. swap buffer sets to 0x10
/* 0x02 */ u16 retraceCount;
/* 0x04 */ void* buffer;
/* 0x08 */ OSViMode *unk08;
/* 0x08 */ OSViMode *modep;
/* 0x0c */ u32 features;
/* 0x10 */ OSMesgQueue *mq;
/* 0x14 */ OSMesg *msg;
@ -72,6 +75,7 @@ typedef struct
void osCreateViManager(OSPri pri);
void osViSetMode(OSViMode *mode);
void osViSetEvent(OSMesgQueue *mq, OSMesg msg, u32 retraceCount);
void osViBlack(u8 active);
void osViSetSpecialFeatures(u32 func);
void osViSwapBuffer(void *vaddr);
@ -107,36 +111,7 @@ void osViSwapBuffer(void *vaddr);
#define OS_VI_PAL_HPN2 26
#define OS_VI_PAL_HPF2 27
#define OS_VI_MPAL_LPN1 28 /* MPAL - mainly Brazil */
#define OS_VI_MPAL_LPF1 29
#define OS_VI_MPAL_LAN1 30
#define OS_VI_MPAL_LAF1 31
#define OS_VI_MPAL_LPN2 32
#define OS_VI_MPAL_LPF2 33
#define OS_VI_MPAL_LAN2 34
#define OS_VI_MPAL_LAF2 35
#define OS_VI_MPAL_HPN1 36
#define OS_VI_MPAL_HPF1 37
#define OS_VI_MPAL_HAN1 38
#define OS_VI_MPAL_HAF1 39
#define OS_VI_MPAL_HPN2 40
#define OS_VI_MPAL_HPF2 41
#define OS_VI_FPAL_LPN1 42 /* FPAL - Full screen PAL */
#define OS_VI_FPAL_LPF1 43
#define OS_VI_FPAL_LAN1 44
#define OS_VI_FPAL_LAF1 45
#define OS_VI_FPAL_LPN2 46
#define OS_VI_FPAL_LPF2 47
#define OS_VI_FPAL_LAN2 48
#define OS_VI_FPAL_LAF2 49
#define OS_VI_FPAL_HPN1 50
#define OS_VI_FPAL_HPF1 51
#define OS_VI_FPAL_HAN1 52
#define OS_VI_FPAL_HAF1 53
#define OS_VI_FPAL_HPN2 54
#define OS_VI_FPAL_HPF2 55
#define OS_VI_MPAL_LAN1 30
extern OSViMode osViModeTable[]; /* Global VI mode table */

881
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@ -0,0 +1,881 @@
#ifndef _RCP_H_
#define _RCP_H_
/**************************************************************************
* *
* Copyright (C) 1995, Silicon Graphics, Inc. *
* *
* These coded instructions, statements, and computer programs contain *
* unpublished proprietary information of Silicon Graphics, Inc., and *
* are protected by Federal copyright law. They may not be disclosed *
* to third parties or copied or duplicated in any form, in whole or *
* in part, without the prior written consent of Silicon Graphics, Inc. *
* *
**************************************************************************/
/**************************************************************************
*
* File: rcp.h
*
* This file contains register and bit definitions for RCP memory map.
* $Revision: 1.20 $
* $Date: 1997/07/23 08:35:21 $
* $Source: /disk6/Master/cvsmdev2/PR/include/rcp.h,v $
*
**************************************************************************/
#include <PR/R4300.h>
#include <PR/ultratypes.h>
/**********************************************************************
*
* Here is a quick overview of the RCP memory map:
*
0x0000_0000 .. 0x03ef_ffff RDRAM memory
0x03f0_0000 .. 0x03ff_ffff RDRAM registers
RCP registers (see below)
0x0400_0000 .. 0x040f_ffff SP registers
0x0410_0000 .. 0x041f_ffff DP command registers
0x0420_0000 .. 0x042f_ffff DP span registers
0x0430_0000 .. 0x043f_ffff MI registers
0x0440_0000 .. 0x044f_ffff VI registers
0x0450_0000 .. 0x045f_ffff AI registers
0x0460_0000 .. 0x046f_ffff PI registers
0x0470_0000 .. 0x047f_ffff RI registers
0x0480_0000 .. 0x048f_ffff SI registers
0x0490_0000 .. 0x04ff_ffff unused
0x0500_0000 .. 0x05ff_ffff cartridge domain 2
0x0600_0000 .. 0x07ff_ffff cartridge domain 1
0x0800_0000 .. 0x0fff_ffff cartridge domain 2
0x1000_0000 .. 0x1fbf_ffff cartridge domain 1
0x1fc0_0000 .. 0x1fc0_07bf PIF Boot Rom (1984 bytes)
0x1fc0_07c0 .. 0x1fc0_07ff PIF (JoyChannel) RAM (64 bytes)
0x1fc0_0800 .. 0x1fcf_ffff Reserved
0x1fd0_0000 .. 0x7fff_ffff cartridge domain 1
0x8000_0000 .. 0xffff_ffff external SysAD device
The Indy development board use cartridge domain 1:
0x1000_0000 .. 0x10ff_ffff RAMROM
0x1800_0000 .. 0x1800_0003 GIO interrupt (6 bits valid in 4 bytes)
0x1800_0400 .. 0x1800_0403 GIO sync (6 bits valid in 4 bytes)
0x1800_0800 .. 0x1800_0803 CART interrupt (6 bits valid in 4 bytes)
**************************************************************************/
/*************************************************************************
* RDRAM Memory (Assumes that maximum size is 4 MB)
*/
#define RDRAM_0_START 0x00000000
#define RDRAM_0_END 0x001FFFFF
#define RDRAM_1_START 0x00200000
#define RDRAM_1_END 0x003FFFFF
#define RDRAM_START RDRAM_0_START
#define RDRAM_END RDRAM_1_END
/*************************************************************************
* Address predicates
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
#define IS_RDRAM(x) ((unsigned)(x) >= RDRAM_START && \
(unsigned)(x) < RDRAM_END)
#endif
/*************************************************************************
* RDRAM Registers (0x03f0_0000 .. 0x03ff_ffff)
*/
#define RDRAM_BASE_REG 0x03F00000
#define RDRAM_CONFIG_REG (RDRAM_BASE_REG+0x00)
#define RDRAM_DEVICE_TYPE_REG (RDRAM_BASE_REG+0x00)
#define RDRAM_DEVICE_ID_REG (RDRAM_BASE_REG+0x04)
#define RDRAM_DELAY_REG (RDRAM_BASE_REG+0x08)
#define RDRAM_MODE_REG (RDRAM_BASE_REG+0x0c)
#define RDRAM_REF_INTERVAL_REG (RDRAM_BASE_REG+0x10)
#define RDRAM_REF_ROW_REG (RDRAM_BASE_REG+0x14)
#define RDRAM_RAS_INTERVAL_REG (RDRAM_BASE_REG+0x18)
#define RDRAM_MIN_INTERVAL_REG (RDRAM_BASE_REG+0x1c)
#define RDRAM_ADDR_SELECT_REG (RDRAM_BASE_REG+0x20)
#define RDRAM_DEVICE_MANUF_REG (RDRAM_BASE_REG+0x24)
#define RDRAM_0_DEVICE_ID 0
#define RDRAM_1_DEVICE_ID 1
#define RDRAM_RESET_MODE 0
#define RDRAM_ACTIVE_MODE 1
#define RDRAM_STANDBY_MODE 2
#define RDRAM_LENGTH (2*512*2048)
#define RDRAM_0_BASE_ADDRESS (RDRAM_0_DEVICE_ID*RDRAM_LENGTH)
#define RDRAM_1_BASE_ADDRESS (RDRAM_1_DEVICE_ID*RDRAM_LENGTH)
#define RDRAM_0_CONFIG 0x00000
#define RDRAM_1_CONFIG 0x00400
#define RDRAM_GLOBAL_CONFIG 0x80000
/*************************************************************************
* PIF Physical memory map (total size = 2 KB)
*
* Size Description Mode
* 1FC007FF +-------+-----------------+-----+
* | 64 B | JoyChannel RAM | R/W |
* 1FC007C0 +-------+-----------------+-----+
* |1984 B | Boot ROM | * | * = Reserved
* 1FC00000 +-------+-----------------+-----+
*
*/
#define PIF_ROM_START 0x1FC00000
#define PIF_ROM_END 0x1FC007BF
#define PIF_RAM_START 0x1FC007C0
#define PIF_RAM_END 0x1FC007FF
/*************************************************************************
* Controller channel
* Each game controller channel has 4 error bits that are defined in bit 6-7 of
* the Rx and Tx data size area bytes. Programmers need to clear these bits
* when setting the Tx/Rx size area values for a channel
*/
#define CHNL_ERR_NORESP 0x80 /* Bit 7 (Rx): No response error */
#define CHNL_ERR_OVERRUN 0x40 /* Bit 6 (Rx): Overrun error */
#define CHNL_ERR_FRAME 0x80 /* Bit 7 (Tx): Frame error */
#define CHNL_ERR_COLLISION 0x40 /* Bit 6 (Tx): Collision error */
#define CHNL_ERR_MASK 0xC0 /* Bit 6-7: channel errors */
/*************************************************************************
* External device info
*/
#define DEVICE_TYPE_CART 0 /* ROM cartridge */
#define DEVICE_TYPE_BULK 1 /* ROM bulk */
#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */
#define DEVICE_TYPE_SRAM 3 /* SRAM */
/*************************************************************************
* SP Memory
*/
#define SP_DMEM_START 0x04000000 /* read/write */
#define SP_DMEM_END 0x04000FFF
#define SP_IMEM_START 0x04001000 /* read/write */
#define SP_IMEM_END 0x04001FFF
/*************************************************************************
* SP CP0 Registers
*/
#define SP_BASE_REG 0x04040000
/* SP memory address (R/W): [11:0] DMEM/IMEM address; [12] 0=DMEM,1=IMEM */
#define SP_MEM_ADDR_REG (SP_BASE_REG+0x00) /* Master */
/* SP DRAM DMA address (R/W): [23:0] RDRAM address */
#define SP_DRAM_ADDR_REG (SP_BASE_REG+0x04) /* Slave */
/* SP read DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */
/* direction: I/DMEM <- RDRAM */
#define SP_RD_LEN_REG (SP_BASE_REG+0x08) /* R/W: read len */
/* SP write DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */
/* direction: I/DMEM -> RDRAM */
#define SP_WR_LEN_REG (SP_BASE_REG+0x0C) /* R/W: write len */
/* SP status (R/W): [14:0] valid bits; see below for write/read mode */
#define SP_STATUS_REG (SP_BASE_REG+0x10)
/* SP DMA full (R): [0] valid bit; dma full */
#define SP_DMA_FULL_REG (SP_BASE_REG+0x14)
/* SP DMA busy (R): [0] valid bit; dma busy */
#define SP_DMA_BUSY_REG (SP_BASE_REG+0x18)
/* SP semaphore (R/W): Read: [0] semaphore flag (set on read) */
/* Write: [] clear semaphore flag */
#define SP_SEMAPHORE_REG (SP_BASE_REG+0x1C)
/* SP PC (R/W): [11:0] program counter */
#define SP_PC_REG 0x04080000
/* SP MEM address: bit 12 specifies if address is IMEM or DMEM */
#define SP_DMA_DMEM 0x0000 /* Bit 12: 0=DMEM, 1=IMEM */
#define SP_DMA_IMEM 0x1000 /* Bit 12: 0=DMEM, 1=IMEM */
/*
* Values to clear/set bit in status reg (SP_STATUS_REG - write)
*/
#define SP_CLR_HALT 0x00001 /* Bit 0: clear halt */
#define SP_SET_HALT 0x00002 /* Bit 1: set halt */
#define SP_CLR_BROKE 0x00004 /* Bit 2: clear broke */
#define SP_CLR_INTR 0x00008 /* Bit 3: clear intr */
#define SP_SET_INTR 0x00010 /* Bit 4: set intr */
#define SP_CLR_SSTEP 0x00020 /* Bit 5: clear sstep */
#define SP_SET_SSTEP 0x00040 /* Bit 6: set sstep */
#define SP_CLR_INTR_BREAK 0x00080 /* Bit 7: clear intr on break */
#define SP_SET_INTR_BREAK 0x00100 /* Bit 8: set intr on break */
#define SP_CLR_SIG0 0x00200 /* Bit 9: clear signal 0 */
#define SP_SET_SIG0 0x00400 /* Bit 10: set signal 0 */
#define SP_CLR_SIG1 0x00800 /* Bit 11: clear signal 1 */
#define SP_SET_SIG1 0x01000 /* Bit 12: set signal 1 */
#define SP_CLR_SIG2 0x02000 /* Bit 13: clear signal 2 */
#define SP_SET_SIG2 0x04000 /* Bit 14: set signal 2 */
#define SP_CLR_SIG3 0x08000 /* Bit 15: clear signal 3 */
#define SP_SET_SIG3 0x10000 /* Bit 16: set signal 3 */
#define SP_CLR_SIG4 0x20000 /* Bit 17: clear signal 4 */
#define SP_SET_SIG4 0x40000 /* Bit 18: set signal 4 */
#define SP_CLR_SIG5 0x80000 /* Bit 19: clear signal 5 */
#define SP_SET_SIG5 0x100000 /* Bit 20: set signal 5 */
#define SP_CLR_SIG6 0x200000 /* Bit 21: clear signal 6 */
#define SP_SET_SIG6 0x400000 /* Bit 22: set signal 6 */
#define SP_CLR_SIG7 0x800000 /* Bit 23: clear signal 7 */
#define SP_SET_SIG7 0x1000000 /* Bit 24: set signal 7 */
/*
* Patterns to interpret status reg (SP_STATUS_REG - read)
*/
#define SP_STATUS_HALT 0x001 /* Bit 0: halt */
#define SP_STATUS_BROKE 0x002 /* Bit 1: broke */
#define SP_STATUS_DMA_BUSY 0x004 /* Bit 2: dma busy */
#define SP_STATUS_DMA_FULL 0x008 /* Bit 3: dma full */
#define SP_STATUS_IO_FULL 0x010 /* Bit 4: io full */
#define SP_STATUS_SSTEP 0x020 /* Bit 5: single step */
#define SP_STATUS_INTR_BREAK 0x040 /* Bit 6: interrupt on break */
#define SP_STATUS_SIG0 0x080 /* Bit 7: signal 0 set */
#define SP_STATUS_SIG1 0x100 /* Bit 8: signal 1 set */
#define SP_STATUS_SIG2 0x200 /* Bit 9: signal 2 set */
#define SP_STATUS_SIG3 0x400 /* Bit 10: signal 3 set */
#define SP_STATUS_SIG4 0x800 /* Bit 11: signal 4 set */
#define SP_STATUS_SIG5 0x1000 /* Bit 12: signal 5 set */
#define SP_STATUS_SIG6 0x2000 /* Bit 13: signal 6 set */
#define SP_STATUS_SIG7 0x4000 /* Bit 14: signal 7 set */
/*
* Use of SIG bits
*/
#define SP_CLR_YIELD SP_CLR_SIG0
#define SP_SET_YIELD SP_SET_SIG0
#define SP_STATUS_YIELD SP_STATUS_SIG0
#define SP_CLR_YIELDED SP_CLR_SIG1
#define SP_SET_YIELDED SP_SET_SIG1
#define SP_STATUS_YIELDED SP_STATUS_SIG1
#define SP_CLR_TASKDONE SP_CLR_SIG2
#define SP_SET_TASKDONE SP_SET_SIG2
#define SP_STATUS_TASKDONE SP_STATUS_SIG2
#define SP_CLR_RSPSIGNAL SP_CLR_SIG3
#define SP_SET_RSPSIGNAL SP_SET_SIG3
#define SP_STATUS_RSPSIGNAL SP_STATUS_SIG3
#define SP_CLR_CPUSIGNAL SP_CLR_SIG4
#define SP_SET_CPUSIGNAL SP_SET_SIG4
#define SP_STATUS_CPUSIGNAL SP_STATUS_SIG4
/* SP IMEM BIST REG (R/W): [6:0] BIST status bits; see below for detail */
#define SP_IBIST_REG 0x04080004
/*
* Patterns to interpret status reg (SP_BIST_REG - write)
*/
#define SP_IBIST_CHECK 0x01 /* Bit 0: BIST check */
#define SP_IBIST_GO 0x02 /* Bit 1: BIST go */
#define SP_IBIST_CLEAR 0x04 /* Bit 2: BIST clear */
/*
* Patterns to interpret status reg (SP_BIST_REG - read)
*/
/* First 2 bits are same as in write mode:
* Bit 0: BIST check; Bit 1: BIST go
*/
#define SP_IBIST_DONE 0x04 /* Bit 2: BIST done */
#define SP_IBIST_FAILED 0x78 /* Bit [6:3]: BIST fail */
/*************************************************************************
* DP Command Registers
*/
#define DPC_BASE_REG 0x04100000
/* DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address */
#define DPC_START_REG (DPC_BASE_REG+0x00)
/* DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address */
#define DPC_END_REG (DPC_BASE_REG+0x04)
/* DP CMD DMA end (R): [23:0] DMEM/RDRAM current address */
#define DPC_CURRENT_REG (DPC_BASE_REG+0x08)
/* DP CMD status (R/W): [9:0] valid bits - see below for definitions */
#define DPC_STATUS_REG (DPC_BASE_REG+0x0C)
/* DP clock counter (R): [23:0] clock counter */
#define DPC_CLOCK_REG (DPC_BASE_REG+0x10)
/* DP buffer busy counter (R): [23:0] clock counter */
#define DPC_BUFBUSY_REG (DPC_BASE_REG+0x14)
/* DP pipe busy counter (R): [23:0] clock counter */
#define DPC_PIPEBUSY_REG (DPC_BASE_REG+0x18)
/* DP TMEM load counter (R): [23:0] clock counter */
#define DPC_TMEM_REG (DPC_BASE_REG+0x1C)
/*
* Values to clear/set bit in status reg (DPC_STATUS_REG - write)
*/
#define DPC_CLR_XBUS_DMEM_DMA 0x0001 /* Bit 0: clear xbus_dmem_dma */
#define DPC_SET_XBUS_DMEM_DMA 0x0002 /* Bit 1: set xbus_dmem_dma */
#define DPC_CLR_FREEZE 0x0004 /* Bit 2: clear freeze */
#define DPC_SET_FREEZE 0x0008 /* Bit 3: set freeze */
#define DPC_CLR_FLUSH 0x0010 /* Bit 4: clear flush */
#define DPC_SET_FLUSH 0x0020 /* Bit 5: set flush */
#define DPC_CLR_TMEM_CTR 0x0040 /* Bit 6: clear tmem ctr */
#define DPC_CLR_PIPE_CTR 0x0080 /* Bit 7: clear pipe ctr */
#define DPC_CLR_CMD_CTR 0x0100 /* Bit 8: clear cmd ctr */
#define DPC_CLR_CLOCK_CTR 0x0200 /* Bit 9: clear clock ctr */
/*
* Patterns to interpret status reg (DPC_STATUS_REG - read)
*/
#define DPC_STATUS_XBUS_DMEM_DMA 0x001 /* Bit 0: xbus_dmem_dma */
#define DPC_STATUS_FREEZE 0x002 /* Bit 1: freeze */
#define DPC_STATUS_FLUSH 0x004 /* Bit 2: flush */
/*#define DPC_STATUS_FROZEN 0x008*/ /* Bit 3: frozen */
#define DPC_STATUS_START_GCLK 0x008 /* Bit 3: start gclk */
#define DPC_STATUS_TMEM_BUSY 0x010 /* Bit 4: tmem busy */
#define DPC_STATUS_PIPE_BUSY 0x020 /* Bit 5: pipe busy */
#define DPC_STATUS_CMD_BUSY 0x040 /* Bit 6: cmd busy */
#define DPC_STATUS_CBUF_READY 0x080 /* Bit 7: cbuf ready */
#define DPC_STATUS_DMA_BUSY 0x100 /* Bit 8: dma busy */
#define DPC_STATUS_END_VALID 0x200 /* Bit 9: end valid */
#define DPC_STATUS_START_VALID 0x400 /* Bit 10: start valid */
/*************************************************************************
* DP Span Registers
*/
#define DPS_BASE_REG 0x04200000
/* DP tmem bist (R/W): [10:0] BIST status bits; see below for detail */
#define DPS_TBIST_REG (DPS_BASE_REG+0x00)
/* DP span test mode (R/W): [0] Span buffer test access enable */
#define DPS_TEST_MODE_REG (DPS_BASE_REG+0x04)
/* DP span buffer test address (R/W): [6:0] bits; see below for detail */
#define DPS_BUFTEST_ADDR_REG (DPS_BASE_REG+0x08)
/* DP span buffer test data (R/W): [31:0] span buffer data */
#define DPS_BUFTEST_DATA_REG (DPS_BASE_REG+0x0C)
/*
* Patterns to interpret status reg (DPS_TMEM_BIST_REG - write)
*/
#define DPS_TBIST_CHECK 0x01 /* Bit 0: BIST check */
#define DPS_TBIST_GO 0x02 /* Bit 1: BIST go */
#define DPS_TBIST_CLEAR 0x04 /* Bit 2: BIST clear */
/*
* Patterns to interpret status reg (DPS_TMEM_BIST_REG - read)
*/
/* First 2 bits are same as in write mode:
* Bit 0: BIST check; Bit 1: BIST go
*/
#define DPS_TBIST_DONE 0x004 /* Bit 2: BIST done */
#define DPS_TBIST_FAILED 0x7F8 /* Bit [10:3]: BIST fail */
/*************************************************************************
* MIPS Interface (MI) Registers
*/
#define MI_BASE_REG 0x04300000
/*
* MI init mode (W): [6:0] init length, [7] clear init mode, [8] set init mode
* [9/10] clear/set ebus test mode, [11] clear DP interrupt
* (R): [6:0] init length, [7] init mode, [8] ebus test mode
*/
#define MI_INIT_MODE_REG (MI_BASE_REG+0x00)
#define MI_MODE_REG MI_INIT_MODE_REG
/*
* Values to clear/set bit in mode reg (MI_MODE_REG - write)
*/
#define MI_CLR_INIT 0x0080 /* Bit 7: clear init mode */
#define MI_SET_INIT 0x0100 /* Bit 8: set init mode */
#define MI_CLR_EBUS 0x0200 /* Bit 9: clear ebus test */
#define MI_SET_EBUS 0x0400 /* Bit 10: set ebus test mode */
#define MI_CLR_DP_INTR 0x0800 /* Bit 11: clear dp interrupt */
#define MI_CLR_RDRAM 0x1000 /* Bit 12: clear RDRAM reg */
#define MI_SET_RDRAM 0x2000 /* Bit 13: set RDRAM reg mode */
/*
* Patterns to interpret mode reg (MI_MODE_REG - read)
*/
#define MI_MODE_INIT 0x0080 /* Bit 7: init mode */
#define MI_MODE_EBUS 0x0100 /* Bit 8: ebus test mode */
#define MI_MODE_RDRAM 0x0200 /* Bit 9: RDRAM reg mode */
/* MI version (R): [7:0] io, [15:8] rac, [23:16] rdp, [31:24] rsp */
#define MI_VERSION_REG (MI_BASE_REG+0x04)
#define MI_NOOP_REG MI_VERSION_REG
/* MI interrupt (R): [5:0] valid bits - see below for bit patterns */
#define MI_INTR_REG (MI_BASE_REG+0x08)
/*
* MI interrupt mask (W): [11:0] valid bits - see below for bit patterns
* (R): [5:0] valid bits - see below for bit patterns
*/
#define MI_INTR_MASK_REG (MI_BASE_REG+0x0C)
/*
* The following are values to check for interrupt setting (MI_INTR_REG)
*/
#define MI_INTR_SP 0x01 /* Bit 0: SP intr */
#define MI_INTR_SI 0x02 /* Bit 1: SI intr */
#define MI_INTR_AI 0x04 /* Bit 2: AI intr */
#define MI_INTR_VI 0x08 /* Bit 3: VI intr */
#define MI_INTR_PI 0x10 /* Bit 4: PI intr */
#define MI_INTR_DP 0x20 /* Bit 5: DP intr */
/*
* The following are values to clear/set various interrupt bit mask
* They can be ORed together to manipulate multiple bits
* (MI_INTR_MASK_REG - write)
*/
#define MI_INTR_MASK_CLR_SP 0x0001 /* Bit 0: clear SP mask */
#define MI_INTR_MASK_SET_SP 0x0002 /* Bit 1: set SP mask */
#define MI_INTR_MASK_CLR_SI 0x0004 /* Bit 2: clear SI mask */
#define MI_INTR_MASK_SET_SI 0x0008 /* Bit 3: set SI mask */
#define MI_INTR_MASK_CLR_AI 0x0010 /* Bit 4: clear AI mask */
#define MI_INTR_MASK_SET_AI 0x0020 /* Bit 5: set AI mask */
#define MI_INTR_MASK_CLR_VI 0x0040 /* Bit 6: clear VI mask */
#define MI_INTR_MASK_SET_VI 0x0080 /* Bit 7: set VI mask */
#define MI_INTR_MASK_CLR_PI 0x0100 /* Bit 8: clear PI mask */
#define MI_INTR_MASK_SET_PI 0x0200 /* Bit 9: set PI mask */
#define MI_INTR_MASK_CLR_DP 0x0400 /* Bit 10: clear DP mask */
#define MI_INTR_MASK_SET_DP 0x0800 /* Bit 11: set DP mask */
/*
* The following are values to check for interrupt mask setting
* (MI_INTR_MASK_REG - read)
*/
#define MI_INTR_MASK_SP 0x01 /* Bit 0: SP intr mask */
#define MI_INTR_MASK_SI 0x02 /* Bit 1: SI intr mask */
#define MI_INTR_MASK_AI 0x04 /* Bit 2: AI intr mask */
#define MI_INTR_MASK_VI 0x08 /* Bit 3: VI intr mask */
#define MI_INTR_MASK_PI 0x10 /* Bit 4: PI intr mask */
#define MI_INTR_MASK_DP 0x20 /* Bit 5: DP intr mask */
/*************************************************************************
* Video Interface (VI) Registers
*/
#define VI_BASE_REG 0x04400000
/* VI status/control (R/W): [15-0] valid bits:
* [1:0] = type[1:0] (pixel size)
* 0: blank (no data, no sync)
* 1: reserved
* 2: 5/5/5/3 ("16" bit)
* 3: 8/8/8/8 (32 bit)
* [2] = gamma_dither_enable (normally on, unless "special effect")
* [3] = gamma_enable (normally on, unless MPEG/JPEG)
* [4] = divot_enable (normally on if antialiased, unless decal lines)
* [5] = reserved - always off
* [6] = serrate (always on if interlaced, off if not)
* [7] = reserved - diagnostics only
* [9:8] = anti-alias (aa) mode[1:0]
* 0: aa & resamp (always fetch extra lines)
* 1: aa & resamp (fetch extra lines if needed)
* 2: resamp only (treat as all fully covered)
* 3: neither (replicate pixels, no interpolate)
* [11] = reserved - diagnostics only
* [15:12] = reserved
*
*/
#define VI_STATUS_REG (VI_BASE_REG+0x00)
#define VI_CONTROL_REG VI_STATUS_REG
/* VI origin (R/W): [23:0] frame buffer origin in bytes */
#define VI_ORIGIN_REG (VI_BASE_REG+0x04)
#define VI_DRAM_ADDR_REG VI_ORIGIN_REG
/* VI width (R/W): [11:0] frame buffer line width in pixels */
#define VI_WIDTH_REG (VI_BASE_REG+0x08)
#define VI_H_WIDTH_REG VI_WIDTH_REG
/* VI vertical intr (R/W): [9:0] interrupt when current half-line = V_INTR */
#define VI_INTR_REG (VI_BASE_REG+0x0C)
#define VI_V_INTR_REG VI_INTR_REG
/*
* VI current vertical line (R/W): [9:0] current half line, sampled once per
* line (the lsb of V_CURRENT is constant within a field, and in
* interlaced modes gives the field number - which is constant for non-
* interlaced modes)
* - Any write to this register will clear interrupt line
*/
#define VI_CURRENT_REG (VI_BASE_REG+0x10)
#define VI_V_CURRENT_LINE_REG VI_CURRENT_REG
/*
* VI video timing (R/W): [ 7: 0] horizontal sync width in pixels,
* [15: 8] color burst width in pixels,
* [19:16] vertical sync width in half lines,
* [29:20] start of color burst in pixels from h-sync
*/
#define VI_BURST_REG (VI_BASE_REG+0x14)
#define VI_TIMING_REG VI_BURST_REG
/* VI vertical sync (R/W): [9:0] number of half-lines per field */
#define VI_V_SYNC_REG (VI_BASE_REG+0x18)
/* VI horizontal sync (R/W): [11: 0] total duration of a line in 1/4 pixel
* [20:16] a 5-bit leap pattern used for PAL only
* (h_sync_period)
*/
#define VI_H_SYNC_REG (VI_BASE_REG+0x1C)
/*
* VI horizontal sync leap (R/W): [11: 0] identical to h_sync_period
* [27:16] identical to h_sync_period
*/
#define VI_LEAP_REG (VI_BASE_REG+0x20)
#define VI_H_SYNC_LEAP_REG VI_LEAP_REG
/*
* VI horizontal video (R/W): [ 9: 0] end of active video in screen pixels
* : [25:16] start of active video in screen pixels
*/
#define VI_H_START_REG (VI_BASE_REG+0x24)
#define VI_H_VIDEO_REG VI_H_START_REG
/*
* VI vertical video (R/W): [ 9: 0] end of active video in screen half-lines
* : [25:16] start of active video in screen half-lines
*/
#define VI_V_START_REG (VI_BASE_REG+0x28)
#define VI_V_VIDEO_REG VI_V_START_REG
/*
* VI vertical burst (R/W): [ 9: 0] end of color burst enable in half-lines
* : [25:16] start of color burst enable in half-lines
*/
#define VI_V_BURST_REG (VI_BASE_REG+0x2C)
/* VI x-scale (R/W): [11: 0] 1/horizontal scale up factor (2.10 format)
* [27:16] horizontal subpixel offset (2.10 format)
*/
#define VI_X_SCALE_REG (VI_BASE_REG+0x30)
/* VI y-scale (R/W): [11: 0] 1/vertical scale up factor (2.10 format)
* [27:16] vertical subpixel offset (2.10 format)
*/
#define VI_Y_SCALE_REG (VI_BASE_REG+0x34)
/*
* Patterns to interpret VI_CONTROL_REG
*/
#define VI_CTRL_TYPE_16 0x00002 /* Bit [1:0] pixel size: 16 bit */
#define VI_CTRL_TYPE_32 0x00003 /* Bit [1:0] pixel size: 32 bit */
#define VI_CTRL_GAMMA_DITHER_ON 0x00004 /* Bit 2: default = on */
#define VI_CTRL_GAMMA_ON 0x00008 /* Bit 3: default = on */
#define VI_CTRL_DIVOT_ON 0x00010 /* Bit 4: default = on */
#define VI_CTRL_SERRATE_ON 0x00040 /* Bit 6: on if interlaced */
#define VI_CTRL_ANTIALIAS_MASK 0x00300 /* Bit [9:8] anti-alias mode */
#define VI_CTRL_DITHER_FILTER_ON 0x10000 /* Bit 16: dither-filter mode */
/*
* Possible video clocks (NTSC or PAL)
*/
#define VI_NTSC_CLOCK 48681812 /* Hz = 48.681812 MHz */
#define VI_PAL_CLOCK 49656530 /* Hz = 49.656530 MHz */
#define VI_MPAL_CLOCK 48628316 /* Hz = 48.628316 MHz */
/*************************************************************************
* Audio Interface (AI) Registers
*
* The address and length registers are double buffered; that is, they
* can be written twice before becoming full.
* The address must be written before the length.
*/
#define AI_BASE_REG 0x04500000
/* AI DRAM address (W): [23:0] starting RDRAM address (8B-aligned) */
#define AI_DRAM_ADDR_REG (AI_BASE_REG+0x00) /* R0: DRAM address */
/* AI length (R/W): [14:0] transfer length (v1.0) - Bottom 3 bits are ignored */
/* [17:0] transfer length (v2.0) - Bottom 3 bits are ignored */
#define AI_LEN_REG (AI_BASE_REG+0x04) /* R1: Length */
/* AI control (W): [0] DMA enable - if LSB == 1, DMA is enabled */
#define AI_CONTROL_REG (AI_BASE_REG+0x08) /* R2: DMA Control */
/*
* AI status (R): [31]/[0] ai_full (addr & len buffer full), [30] ai_busy
* Note that a 1->0 transition in ai_full will set interrupt
* (W): clear audio interrupt
*/
#define AI_STATUS_REG (AI_BASE_REG+0x0C) /* R3: Status */
/*
* AI DAC sample period register (W): [13:0] dac rate
* - vid_clock/(dperiod + 1) is the DAC sample rate
* - (dperiod + 1) >= 66 * (aclockhp + 1) must be true
*/
#define AI_DACRATE_REG (AI_BASE_REG+0x10) /* R4: DAC rate 14-lsb*/
/*
* AI bit rate (W): [3:0] bit rate (abus clock half period register - aclockhp)
* - vid_clock/(2 * (aclockhp + 1)) is the DAC clock rate
* - The abus clock stops if aclockhp is zero
*/
#define AI_BITRATE_REG (AI_BASE_REG+0x14) /* R5: Bit rate 4-lsb */
/* Value for control register */
#define AI_CONTROL_DMA_ON 0x01 /* LSB = 1: DMA enable*/
#define AI_CONTROL_DMA_OFF 0x00 /* LSB = 1: DMA enable*/
/* Value for status register */
#define AI_STATUS_FIFO_FULL 0x80000000 /* Bit 31: full */
#define AI_STATUS_DMA_BUSY 0x40000000 /* Bit 30: busy */
/* DAC rate = video clock / audio frequency
* - DAC rate >= (66 * Bit rate) must be true
*/
#define AI_MAX_DAC_RATE 16384 /* 14-bit+1 */
#define AI_MIN_DAC_RATE 132
/* Bit rate <= (DAC rate / 66) */
#define AI_MAX_BIT_RATE 16 /* 4-bit+1 */
#define AI_MIN_BIT_RATE 2
/*
* Maximum and minimum values for audio frequency based on video clocks
* max frequency = (video clock / min dac rate)
* min frequency = (video clock / max dac rate)
*/
#define AI_NTSC_MAX_FREQ 368000 /* 368 KHz */
#define AI_NTSC_MIN_FREQ 3000 /* 3 KHz ~ 2971 Hz */
#define AI_PAL_MAX_FREQ 376000 /* 376 KHz */
#define AI_PAL_MIN_FREQ 3050 /* 3 KHz ~ 3031 Hz */
#define AI_MPAL_MAX_FREQ 368000 /* 368 KHz */
#define AI_MPAL_MIN_FREQ 3000 /* 3 KHz ~ 2968 Hz */
/*************************************************************************
* Peripheral Interface (PI) Registers
*/
#define PI_BASE_REG 0x04600000
/* PI DRAM address (R/W): [23:0] starting RDRAM address */
#define PI_DRAM_ADDR_REG (PI_BASE_REG+0x00) /* DRAM address */
/* PI pbus (cartridge) address (R/W): [31:0] starting AD16 address */
#define PI_CART_ADDR_REG (PI_BASE_REG+0x04)
/* PI read length (R/W): [23:0] read data length */
#define PI_RD_LEN_REG (PI_BASE_REG+0x08)
/* PI write length (R/W): [23:0] write data length */
#define PI_WR_LEN_REG (PI_BASE_REG+0x0C)
/*
* PI status (R): [0] DMA busy, [1] IO busy, [2], error
* (W): [0] reset controller (and abort current op), [1] clear intr
*/
#define PI_STATUS_REG (PI_BASE_REG+0x10)
/* PI dom1 latency (R/W): [7:0] domain 1 device latency */
#define PI_BSD_DOM1_LAT_REG (PI_BASE_REG+0x14)
/* PI dom1 pulse width (R/W): [7:0] domain 1 device R/W strobe pulse width */
#define PI_BSD_DOM1_PWD_REG (PI_BASE_REG+0x18)
/* PI dom1 page size (R/W): [3:0] domain 1 device page size */
#define PI_BSD_DOM1_PGS_REG (PI_BASE_REG+0x1C) /* page size */
/* PI dom1 release (R/W): [1:0] domain 1 device R/W release duration */
#define PI_BSD_DOM1_RLS_REG (PI_BASE_REG+0x20)
/* PI dom2 latency (R/W): [7:0] domain 2 device latency */
#define PI_BSD_DOM2_LAT_REG (PI_BASE_REG+0x24) /* Domain 2 latency */
/* PI dom2 pulse width (R/W): [7:0] domain 2 device R/W strobe pulse width */
#define PI_BSD_DOM2_PWD_REG (PI_BASE_REG+0x28) /* pulse width */
/* PI dom2 page size (R/W): [3:0] domain 2 device page size */
#define PI_BSD_DOM2_PGS_REG (PI_BASE_REG+0x2C) /* page size */
/* PI dom2 release (R/W): [1:0] domain 2 device R/W release duration */
#define PI_BSD_DOM2_RLS_REG (PI_BASE_REG+0x30) /* release duration */
#define PI_DOMAIN1_REG PI_BSD_DOM1_LAT_REG
#define PI_DOMAIN2_REG PI_BSD_DOM2_LAT_REG
#define PI_DOM_LAT_OFS 0x00
#define PI_DOM_PWD_OFS 0x04
#define PI_DOM_PGS_OFS 0x08
#define PI_DOM_RLS_OFS 0x0C
/*
* PI status register has 3 bits active when read from (PI_STATUS_REG - read)
* Bit 0: DMA busy - set when DMA is in progress
* Bit 1: IO busy - set when IO is in progress
* Bit 2: Error - set when CPU issues IO request while DMA is busy
*/
#define PI_STATUS_ERROR 0x04
#define PI_STATUS_IO_BUSY 0x02
#define PI_STATUS_DMA_BUSY 0x01
/* PI status register has 2 bits active when written to:
* Bit 0: When set, reset PIC
* Bit 1: When set, clear interrupt flag
* The values of the two bits can be ORed together to both reset PIC and
* clear interrupt at the same time.
*
* Note:
* - The PIC does generate an interrupt at the end of each DMA. CPU
* needs to clear the interrupt flag explicitly (from an interrupt
* handler) by writing into the STATUS register with bit 1 set.
*
* - When a DMA completes, the interrupt flag is set. CPU can issue
* another request even while the interrupt flag is set (as long as
* PIC is idle). However, it is the CPU's responsibility for
* maintaining accurate correspondence between DMA completions and
* interrupts.
*
* - When PIC is reset, if PIC happens to be busy, an interrupt will
* be generated as PIC returns to idle. Otherwise, no interrupt will
* be generated and PIC remains idle.
*/
/*
* Values to clear interrupt/reset PIC (PI_STATUS_REG - write)
*/
#define PI_STATUS_RESET 0x01
#define PI_SET_RESET PI_STATUS_RESET
#define PI_STATUS_CLR_INTR 0x02
#define PI_CLR_INTR PI_STATUS_CLR_INTR
#define PI_DMA_BUFFER_SIZE 128
#define PI_DOM1_ADDR1 0x06000000 /* to 0x07FFFFFF */
#define PI_DOM1_ADDR2 0x10000000 /* to 0x1FBFFFFF */
#define PI_DOM1_ADDR3 0x1FD00000 /* to 0x7FFFFFFF */
#define PI_DOM2_ADDR1 0x05000000 /* to 0x05FFFFFF */
#define PI_DOM2_ADDR2 0x08000000 /* to 0x0FFFFFFF */
/*************************************************************************
* RDRAM Interface (RI) Registers
*/
#define RI_BASE_REG 0x04700000
/* RI mode (R/W): [1:0] operating mode, [2] stop T active, [3] stop R active */
#define RI_MODE_REG (RI_BASE_REG+0x00)
/* RI config (R/W): [5:0] current control input, [6] current control enable */
#define RI_CONFIG_REG (RI_BASE_REG+0x04)
/* RI current load (W): [] any write updates current control register */
#define RI_CURRENT_LOAD_REG (RI_BASE_REG+0x08)
/* RI select (R/W): [2:0] receive select, [2:0] transmit select */
#define RI_SELECT_REG (RI_BASE_REG+0x0C)
/* RI refresh (R/W): [7:0] clean refresh delay, [15:8] dirty refresh delay,
* [16] refresh bank, [17] refresh enable
* [18] refresh optimize
*/
#define RI_REFRESH_REG (RI_BASE_REG+0x10)
#define RI_COUNT_REG RI_REFRESH_REG
/* RI latency (R/W): [3:0] DMA latency/overlap */
#define RI_LATENCY_REG (RI_BASE_REG+0x14)
/* RI error (R): [0] nack error, [1] ack error */
#define RI_RERROR_REG (RI_BASE_REG+0x18)
/* RI error (W): [] any write clears all error bits */
#define RI_WERROR_REG (RI_BASE_REG+0x1C)
/*************************************************************************
* Serial Interface (SI) Registers
*/
#define SI_BASE_REG 0x04800000
/* SI DRAM address (R/W): [23:0] starting RDRAM address */
#define SI_DRAM_ADDR_REG (SI_BASE_REG+0x00) /* R0: DRAM address */
/* SI address read 64B (W): [] any write causes a 64B DMA write */
#define SI_PIF_ADDR_RD64B_REG (SI_BASE_REG+0x04) /* R1: 64B PIF->DRAM */
/* Address SI_BASE_REG + (0x08, 0x0c, 0x14) are reserved */
/* SI address write 64B (W): [] any write causes a 64B DMA read */
#define SI_PIF_ADDR_WR64B_REG (SI_BASE_REG+0x10) /* R4: 64B DRAM->PIF */
/*
* SI status (W): [] any write clears interrupt
* (R): [0] DMA busy, [1] IO read busy, [2] reserved
* [3] DMA error, [12] interrupt
*/
#define SI_STATUS_REG (SI_BASE_REG+0x18) /* R6: Status */
/* SI status register has the following bits active:
* 0: DMA busy - set when DMA is in progress
* 1: IO busy - set when IO access is in progress
* 3: DMA error - set when there are overlapping DMA requests
* 12: Interrupt - Interrupt set
*/
#define SI_STATUS_DMA_BUSY 0x0001
#define SI_STATUS_RD_BUSY 0x0002
#define SI_STATUS_DMA_ERROR 0x0008
#define SI_STATUS_INTERRUPT 0x1000
/*************************************************************************
* Development Board GIO Control Registers
*/
#define GIO_BASE_REG 0x18000000
/* Game to Host Interrupt */
#define GIO_GIO_INTR_REG (GIO_BASE_REG+0x000)
/* Game to Host SYNC */
#define GIO_GIO_SYNC_REG (GIO_BASE_REG+0x400)
/* Host to Game Interrupt */
#define GIO_CART_INTR_REG (GIO_BASE_REG+0x800)
/*************************************************************************
* Common macros
*/
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
#define IO_READ(addr) (*(vu32 *)PHYS_TO_K1(addr))
#define IO_WRITE(addr,data) (*(vu32 *)PHYS_TO_K1(addr)=(u32)(data))
#define RCP_STAT_PRINT \
rmonPrintf("current=%x start=%x end=%x dpstat=%x spstat=%x\n", \
IO_READ(DPC_CURRENT_REG), \
IO_READ(DPC_START_REG), \
IO_READ(DPC_END_REG), \
IO_READ(DPC_STATUS_REG), \
IO_READ(SP_STATUS_REG))
#endif
#endif /* _RCP_H_ */

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@ -8,7 +8,6 @@
#define M_HVQTASK 6
#define M_HVQMTASK 7
//gGfxSPTaskYieldBuffer has to be changed for this too
#if (defined(F3DEX_GBI) || defined(F3DLP_GBI) || defined(F3DEX_GBI_2))
#define OS_YIELD_DATA_SIZE 0xc00
#else
@ -19,6 +18,9 @@
/* Flags */
#define M_TASK_FLAG0 1
#define M_TASK_FLAG1 2
#ifdef VERSION_SH
#define M_TASK_FLAG2 4
#endif
/* SpStatus */
#define SPSTATUS_CLEAR_HALT 0x00000001

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@ -11,13 +11,13 @@ extern u64 rspF3DBootStart[], rspF3DBootEnd[];
// F3D ucode
extern u64 rspF3DStart[], rspF3DEnd[];
// F3D data ucode
// F3D ucode data
extern u64 rspF3DDataStart[], rspF3DDataEnd[];
// F3D audio ucode
extern u64 rspF3DAudioStart[], rspF3DAudioEnd[];
// aspMain (audio) ucode
extern u64 rspAspMainStart[], rspAspMainEnd[];
// F3D audio data ucode
extern u64 rspF3DAudioDataStart[], rspF3DAudioDataEnd[];
// aspMain ucode data
extern u64 rspAspMainDataStart[], rspAspMainDataEnd[];
#endif

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@ -29,13 +29,16 @@ typedef volatile s64 vs64;
typedef float f32;
typedef double f64;
typedef long int Mtx_t[4][4];
typedef union
{
Mtx_t m;
long long int forc_structure_alignment;
} Mtx;
typedef unsigned long size_t;
#ifdef TARGET_N64
typedef u32 size_t;
typedef s32 ssize_t;
typedef u32 uintptr_t;
typedef s32 intptr_t;
typedef s32 ptrdiff_t;
#else
#include <stddef.h>
#include <stdint.h>
typedef ptrdiff_t ssize_t;
#endif
#endif

15
include/platform_info.h Normal file
View File

@ -0,0 +1,15 @@
#ifndef PLATFORM_INFO_H
#define PLATFORM_INFO_H
#ifdef TARGET_N64
#define IS_64_BIT 0
#define IS_BIG_ENDIAN 1
#else
#include <stdint.h>
#define IS_64_BIT (UINTPTR_MAX == 0xFFFFFFFFFFFFFFFFU)
#define IS_BIG_ENDIAN (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
#endif
#define DOUBLE_SIZE_ON_64_BIT(size) ((size) * (sizeof(void *) / 4))
#endif // PLATFORM_INFO_H

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@ -3,27 +3,31 @@
#include <math.h>
#include <ultra64/types.h>
#include <ultra64/interrupt.h>
#include <ultra64/os_misc.h>
#include <ultra64/rdp.h>
#include <ultra64/thread.h>
#include <ultra64/time.h>
#include <ultra64/message.h>
#include <ultra64/os_cont.h>
#include <ultra64/tlb.h>
#include <ultra64/sptask.h>
#include <ultra64/ucode.h>
#include <ultra64/cache.h>
#include <ultra64/vi.h>
#include <ultra64/pi.h>
#include <ultra64/os_internal.h>
#include <ultra64/gbi.h>
#include <ultra64/eeprom.h>
#include <ultra64/libc.h>
#include <ultra64/gu.h>
#include <ultra64/os_ai.h>
#include <ultra64/libaudio.h>
#include <ultra64/libultra.h>
#ifndef _LANGUAGE_C
#define _LANGUAGE_C
#endif
#include <PR/ultratypes.h>
#include <PR/os_exception.h>
#include <PR/os_misc.h>
#include <PR/os_rdp.h>
#include <PR/os_thread.h>
#include <PR/os_time.h>
#include <PR/os_message.h>
#include <PR/os_cont.h>
#include <PR/os_tlb.h>
#include <PR/sptask.h>
#include <PR/ucode.h>
#include <PR/os_cache.h>
#include <PR/os_vi.h>
#include <PR/os_pi.h>
#include <PR/os_internal.h>
#include <PR/mbi.h>
#include <PR/os_eeprom.h>
#include <PR/os_libc.h>
#include <PR/gu.h>
#include <PR/os_ai.h>
#include <PR/libaudio.h>
#include <PR/libultra.h>
#endif

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@ -1,11 +0,0 @@
#ifndef _ULTRA64_CACHE_H_
#define _ULTRA64_CACHE_H_
/* Functions */
void osInvalICache(void *vaddr, s32 nbytes);
void osInvalDCache(void *vaddr, s32 nbytes);
void osWritebackDCache(void *vaddr, s32 nbytes);
void osWritebackDCacheAll(void);
#endif

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@ -1,18 +0,0 @@
#ifndef _ULTRA64_EEPROM_H_
#define _ULTRA64_EEPROM_H_
typedef struct
{
u16 unk00;
u16 unk01;
} OSEepromUnknownStruct0;
/* Functions */
s32 osEepromLongRead(OSMesgQueue *mq, u8 address, u8 *buffer, int nbytes);
s32 osEepromLongWrite(OSMesgQueue *mq, u8 address, u8 *buffer, int nbytes);
s32 osEepromWrite(OSMesgQueue *mq, u8 address, u8 *buffer);
s32 osEepromRead(OSMesgQueue *mq, u8 address, u8 *buffer);
s32 osEepromProbe(OSMesgQueue *mq);
#endif

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@ -1,736 +0,0 @@
#ifndef _ULTRA64_GBI_H_
#define _ULTRA64_GBI_H_
/* Types */
/* Vertex (set up for use with colors) */
typedef struct
{
short ob[3]; /* x, y, z */
unsigned short flag;
short tc[2]; /* texture coord */
unsigned char cn[4]; /* color & alpha */
} Vtx_t;
/* Vertex (set up for use with normals) */
typedef struct
{
short ob[3]; /* x, y, z */
unsigned short flag;
short tc[2]; /* texture coord */
signed char n[3]; /* normal */
unsigned char a; /* alpha */
} Vtx_tn;
typedef union
{
Vtx_t v; /* Use this one for colors */
Vtx_tn n; /* Use this one for normals */
long long int force_structure_alignment;
} Vtx;
typedef struct
{
short vscale[4]; /* scale, 2 bits fraction */
short vtrans[4]; /* translate, 2 bits fraction */
} Vp_t;
typedef union
{
Vp_t vp;
long long int force_structure_alignment;
} Vp;
typedef struct
{
unsigned int w0;
unsigned int w1;
} Gwords;
/* TODO: fill in the rest of the members */
typedef union
{
Gwords words;
long long int force_structure_alignment;
} Gfx;
#define _SHIFTL(value, shift, size) \
((unsigned int) (((unsigned int) (value) & ((1 << size) - 1)) << shift))
#define G_ON 1
#define G_OFF 0
#define GPACK_RGBA5551(r, g, b, a) \
((((r) << 8) & 0xF800) | \
(((g) << 3) & 0x07C0) | \
(((b) >> 2) & 0x003E) | \
((a) & 0x0001))
#define GPACK_ZDZ(z, dz) ((z) << 2 | (dz))
#define G_ZBUFFER 0x00000001
#define G_TEXTURE_ENABLE 0x00000002
#define G_SHADE 0x00000004
#define G_SHADING_SMOOTH 0x00000200
#define G_CULL_FRONT 0x00001000
#define G_CULL_BACK 0x00002000
#define G_CULL_BOTH 0x00003000
#define G_FOG 0x00010000
#define G_LIGHTING 0x00020000
#define G_TEXTURE_GEN 0x00040000
#define G_TEXTURE_GEN_LINEAR 0x00080000
#define G_LOD 0x00100000
#define G_CLIPPING 0x00800000
#define G_IM_FMT_RGBA 0
#define G_IM_FMT_YUV 1
#define G_IM_FMT_CI 2
#define G_IM_FMT_IA 3
#define G_IM_FMT_I 4
#define G_IM_SIZ_4b 0
#define G_IM_SIZ_8b 1
#define G_IM_SIZ_16b 2
#define G_IM_SIZ_32b 3
#define G_IM_SIZ_DD 5
#define G_AC_NONE (0 << 0)
#define G_AC_THRESHOLD (1 << 0)
#define G_AC_DITHER (3 << 0)
#define G_ZS_PIXEL (0 << 2)
#define G_ZS_PRIM (1 << 2)
#define G_CD_MAGICSQ (0 << 6)
#define G_CD_BAYER (1 << 6)
#define G_CD_NOISE (2 << 6)
#define G_CK_NONE (0 << 8)
#define G_CK_KEY (1 << 8)
#define G_TC_CONV (0 << 9)
#define G_TC_FILTCONV (5 << 9)
#define G_TC_FILT (6 << 9)
#define G_TF_POINT (0 << 12)
#define G_TF_BILERP (2 << 12)
#define G_TF_AVERAGE (3 << 12)
#define G_TT_NONE (0 << 14)
#define G_TT_RGBA16 (2 << 14)
#define G_TT_IA16 (3 << 14)
#define G_TL_TILE (0 << 16)
#define G_TL_LOD (1 << 16)
#define G_TD_CLAMP (0 << 17)
#define G_TD_SHARPEN (1 << 17)
#define G_TD_DETAIL (2 << 17)
#define G_TP_NONE (0 << 19)
#define G_TP_PERSP (1 << 19)
#define G_CYC_1CYCLE (0 << 20)
#define G_CYC_2CYCLE (1 << 20)
#define G_CYC_COPY (2 << 20)
#define G_CYC_FILL (3 << 20)
#define G_PM_NPRIMITIVE (0 << 23)
#define G_PM_1PRIMITIVE (1 << 23)
#define G_SC_NON_INTERLACE 0
#define G_SC_ODD_INTERLACE 3
#define G_SC_EVEN_INTERLACE 2
#define G_TX_LOADTILE 7
#define G_TX_RENDERTILE 0
#define G_TX_NOMIRROR 0
#define G_TX_WRAP 0
#define G_TX_MIRROR 1
#define G_TX_CLAMP 2
#define G_TX_NOMASK 0
#define G_TX_NOLOD 0
#define G_TX_LDBLK_MAX_TXL 2047
#define G_MV_VIEWPORT 0x80
#define G_MV_LOOKATY 0x82
#define G_MV_LOOKATX 0x84
#define G_MV_L0 0x86
#define G_MV_L1 0x88
#define G_MV_L2 0x8A
#define G_MV_L3 0x8C
#define G_MV_L4 0x8E
#define G_MV_L5 0x90
#define G_MV_L6 0x92
#define G_MV_L7 0x94
#define G_MV_TXTATT 0x96
#define G_MV_MATRIX_1 0x9E
#define G_MV_MATRIX_2 0x98
#define G_MV_MATRIX_3 0x9A
#define G_MV_MATRIX_4 0x9C
#define G_SETOTHERMODE_L 0xB9
#define G_SETOTHERMODE_H 0xBA
#ifndef MAX
#define MAX(a, b) ((a) > (b) ? (a) : (b))
#endif
#ifndef MIN
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#endif
#define gSPMatrix(pkt, m, p) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0x01, 24, 8) \
| _SHIFTL((p), 16, 8) \
| _SHIFTL(sizeof(Mtx), 0, 16); \
_g->words.w1 = (u32)(m); \
}
#define gSPVertex(pkt, v, n, v0) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0x04, 24, 8) \
| _SHIFTL(((n)-1) << 4 | (v0), 16, 8) \
| _SHIFTL(sizeof(Vtx)*(n), 0, 16); \
_g->words.w1 = (u32)(v); \
}
#define gDPLoadSync(pkt) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xE6000000; \
_g->words.w1 = 0x00000000; \
}
#define gDPPipeSync(pkt) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xE7000000; \
_g->words.w1 = 0x00000000; \
}
#define gDPTileSync(pkt) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xE8000000; \
_g->words.w1 = 0x00000000; \
}
#define gDPFullSync(pkt) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xE9000000; \
_g->words.w1 = 0x00000000; \
}
#define gSPDisplayList(pkt, dl) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0x06000000; \
_g->words.w1 = (u32)(dl); \
}
#define gSPBranchList(pkt, dl) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = 0x06010000; \
_g->words.w1 = (u32)(dl); \
}
#define gSPEndDisplayList(pkt) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB8000000; \
_g->words.w1 = 0x00000000; \
}
#define gDPSetCycleType(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA001402; \
_g->words.w1 = type; \
}
#define gDPPipelineMode(pkt, mode) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA001701; \
_g->words.w1 = mode; \
}
#define gDPSetScissor(pkt, mode, ulx, uly, lrx, lry) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xED, 24, 8) \
| _SHIFTL((int)((float)(ulx)*4.0f), 12, 12) \
| _SHIFTL((int)((float)(uly)*4.0f), 0, 12); \
_g->words.w1 = _SHIFTL((mode), 24, 8) \
| _SHIFTL((int)((float)(lrx)*4.0f), 12, 12) \
| _SHIFTL((int)((float)(lry)*4.0f), 0, 12); \
}
#define gDPSetCombine(pkt, muxs0, muxs1) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xFC, 24, 8) \
| _SHIFTL((muxs0), 0, 24); \
_g->words.w1 = (muxs1); \
}
#define gDPSetTextureLOD(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA001001; \
_g->words.w1 = type; \
}
#define gDPSetTextureLUT(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA000E02; \
_g->words.w1 = type; \
}
#define gDPSetTextureDetail(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA001102; \
_g->words.w1 = type; \
}
#define gDPSetTexturePersp(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA001301; \
_g->words.w1 = type; \
}
#define gDPSetTextureFilter(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA000C02; \
_g->words.w1 = type; \
}
#define gDPSetTextureConvert(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA000903; \
_g->words.w1 = type; \
}
#define gDPSetCombineKey(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA000801; \
_g->words.w1 = type; \
}
#define gDPSetColorDither(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBA000602; \
_g->words.w1 = type; \
}
#define gDPSetFillColor(pkt, color) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xF7000000; \
_g->words.w1 = color; \
}
#define gDPFillRectangle(pkt, ulx, uly, lrx, lry) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xF6, 24, 8) \
| _SHIFTL((lrx), 14, 10) \
| _SHIFTL((lry), 2, 10); \
_g->words.w1 = _SHIFTL(0, 24, 8) \
| _SHIFTL((ulx), 14, 10) \
| _SHIFTL((uly), 2, 10); \
}
#define gDPSetAlphaCompare(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB9000002; \
_g->words.w1 = type; \
}
#define gDPSetDepthSource(pkt, type) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB9000201; \
_g->words.w1 = type; \
}
#define gSPSetOtherMode(pkt, cmd, shift, length, data) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = _SHIFTL((cmd), 24, 8) \
| _SHIFTL((shift), 8, 8) \
| _SHIFTL(((length)-1), 0, 8); \
_g->words.w1 = (data); \
}
#define gDPSetRenderMode(pkt, mode1, mode2) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB900031D; \
_g->words.w1 = (mode1) | (mode2); \
}
#define gSPClearGeometryMode(pkt, mode) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB6000000; \
_g->words.w1 = mode; \
}
#define gSPSetGeometryMode(pkt, word) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xB7000000; \
_g->words.w1 = word; \
}
#define gSPNumLights(pkt, n) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBC000002; \
_g->words.w1 = (0x80000000 + ((n) + 1) * 0x20); \
}
#define gSPTexture(pkt, sc, tc, level, tile, on) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xBB, 24, 8) \
| _SHIFTL(0, 16, 8) \
| _SHIFTL((level), 11, 3) \
| _SHIFTL((tile), 8, 3) \
| _SHIFTL((on), 0, 8); \
_g->words.w1 = _SHIFTL((sc), 16, 16) \
| _SHIFTL((tc), 0, 16); \
}
#define gDPSetColorImage(pkt, fmt, size, width, image) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xFF, 24, 8) \
| _SHIFTL((fmt), 21, 3) \
| _SHIFTL((size), 19, 2) \
| _SHIFTL((width)-1, 0, 12); \
_g->words.w1 = (image); \
}
#define gDPSetTileSize(pkt, tile, uls, ult, lrs, lrt) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xF2, 24, 8) \
| _SHIFTL(uls, 12, 12) \
| _SHIFTL(ult, 0, 12); \
_g->words.w1 = _SHIFTL(tile, 24, 3) \
| _SHIFTL(lrs, 12, 12) \
| _SHIFTL(lrt, 0, 12); \
}
#define gDPLoadBlock(pkt, tile, uls, ult, lrs, dxt) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xF3, 24, 8) \
| _SHIFTL((uls), 12, 12) \
| _SHIFTL((ult), 0, 12); \
_g->words.w1 = _SHIFTL((tile), 24, 3) \
| _SHIFTL((MIN((lrs),G_TX_LDBLK_MAX_TXL)), 12, 12) \
| _SHIFTL((dxt), 0, 12); \
}
#define gDPSetTile(pkt, fmt, siz, line, tmem, tile, \
palette, cmt, maskt, shiftt, cms, masks, shifts) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xF5, 24, 8) \
| _SHIFTL((fmt), 21, 3) \
| _SHIFTL((siz), 19, 2) \
| _SHIFTL((line), 9, 9) \
| _SHIFTL((tmem), 0, 9); \
_g->words.w1 = _SHIFTL((tile), 24, 3) \
| _SHIFTL((palette), 20, 4) \
| _SHIFTL((cmt), 18, 2) \
| _SHIFTL((maskt), 14, 4) \
| _SHIFTL((shiftt), 10, 4) \
| _SHIFTL((cms), 8, 2) \
| _SHIFTL((masks), 4, 4) \
| _SHIFTL((shifts), 0, 4); \
}
#define gDPSetDepthImage(pkt, image) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xFE, 24, 8); \
_g->words.w1 = (image); \
}
#define G_SETPRIMCOLOR 0xFA
#define gDPSetPrimColor(pkt, m, l, r, g, b, a) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(G_SETPRIMCOLOR, 24, 8) \
| _SHIFTL(m, 8, 8) \
| _SHIFTL(l, 0, 8); \
_g->words.w1 = _SHIFTL(r, 24, 8) \
| _SHIFTL(g, 16, 8) \
| _SHIFTL(b, 8, 8) \
| _SHIFTL(a, 0, 8); \
}
#define gDPSetEnvColor(pkt, r, g, b, a) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xFB, 24, 8); \
_g->words.w1 = _SHIFTL((r), 24, 8) \
| _SHIFTL((g), 16, 8) \
| _SHIFTL((b), 8, 8) \
| _SHIFTL((a), 0, 8); \
}
#define gDPSetTextureImage(pkt, fmt, size, width, img) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xFD, 24, 8) \
| _SHIFTL((fmt), 21, 3) \
| _SHIFTL((size), 19, 2) \
| _SHIFTL((width)-1, 0, 12); \
_g->words.w1 = (u32)(img); \
}
#define gMoveWd(pkt, index, offset, data) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xBC, 24, 8) \
| _SHIFTL((offset), 8, 16) \
| _SHIFTL((index), 0, 8); \
_g->words.w1 = (u32)(data); \
}
/* Matrix Operations */
#define G_MTX_MODELVIEW 0x00
#define G_MTX_PROJECTION 0x01
#define G_MTX_MUL 0x00
#define G_MTX_LOAD 0x02
#define G_MTX_NOPUSH 0x00
#define G_MTX_PUSH 0x04
#define gSPPopMatrix(pkt, n) \
{ \
Gfx *_g = (Gfx *) (pkt); \
_g->words.w0 = 0xBD000000; \
_g->words.w1 = (n); \
}
#define gSPViewport(pkt, v) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0x03, 24, 8) \
| _SHIFTL(G_MV_VIEWPORT, 16, 8) \
| _SHIFTL(sizeof(Vp), 0, 16); \
_g->words.w1 = (u32)(v); \
}
#define gSP1Triangle(pkt, v0, v1, v2, flag) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xBF, 24, 8); \
_g->words.w1 = _SHIFTL((flag), 24, 8) \
| _SHIFTL((v0)*10, 16, 8) \
| _SHIFTL((v1)*10, 8, 8) \
| _SHIFTL((v2)*10, 0, 8); \
}
#if (defined(F3DLP_GBI)||defined(F3DEX_GBI))
/***
*** 2 Triangles
***/
#define gSP2Triangles(pkt, v00, v01, v02, flag0, v10, v11, v12, flag1) \
{ \
Gfx *_g = (Gfx *)(pkt); \
\
_g->words.w0 = (_SHIFTL(G_TRI2, 24, 8)| \
__gsSP1Triangle_w1f(v00, v01, v02, flag0)); \
_g->words.w1 = __gsSP1Triangle_w1f(v10, v11, v12, flag1); \
}
#define gsSP2Triangles(v00, v01, v02, flag0, v10, v11, v12, flag1) \
{ \
(_SHIFTL(G_TRI2, 24, 8)| \
__gsSP1Triangle_w1f(v00, v01, v02, flag0)), \
__gsSP1Triangle_w1f(v10, v11, v12, flag1) \
}
#endif /* F3DEX_GBI/F3DLP_GBI */
#if (defined(TRI4_Ext))
/***
*** 4 Triangles - 2Tri Extension
*** Draws up to four triangles at a time.
*** Expects values from 0-F, corresponding with # points declared by vertex command.
*** Triangles with all points set to 0 are not drawn.
*** Vertex Buffer reduced to 16 due to only being able to address 0-F
***/
#define gSP4Triangles(pkt, v00, v01, v02, v10, v11, v12, \
v20, v21, v22, v30, v31, v32 ) \
{ \
Gfx *_g = (Gfx *)(pkt); \
\
_g->words.w0 = (_SHIFTL(G_TRI2, 24, 8)| \
_SHIFTL((v32),12,4)|_SHIFTL((v22),8,4)|_SHIFTL((v12),4,4)|_SHIFTL((v02),0,4); \
_g->words.w1 = _SHIFTL((v31),28,4)|_SHIFTL((v30),24,4)|_SHIFTL((v21),20,4)|_SHIFTL((v20),16,4) \
_SHIFTL((v11),12,4)|_SHIFTL((v10),8,4)|_SHIFTL((v02),4,4)|_SHIFTL((v00),0,4); \
}
#define gsSP4Triangles(v00, v01, v02, flag0, v10, v11, v12, flag1) \
{ \
(_SHIFTL(G_TRI2, 24, 8)| \
_SHIFTL((v32),12,4)|_SHIFTL((v22),8,4)|_SHIFTL((v12),4,4)|_SHIFTL((v02),0,4)), \
(_SHIFTL((v31),28,4)|_SHIFTL((v30),24,4)|_SHIFTL((v21),20,4)|_SHIFTL((v20),16,4) \
_SHIFTL((v11),12,4)|_SHIFTL((v10),8,4)|_SHIFTL((v02),4,4)|_SHIFTL((v00),0,4)); \
}
#endif /* TRI4_Ext*/
#define gSPTextureRectangle(pkt, xl, yl, xh, yh, tile, s, t, dsdx, dtdy) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xE4, 24, 8) \
| _SHIFTL((xh), 12, 12) \
| _SHIFTL((yh), 0, 12); \
_g->words.w1 = _SHIFTL((tile), 24, 3) \
| _SHIFTL((xl), 12, 12) \
| _SHIFTL((yl), 0, 12); \
} \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xB3, 24, 8); \
_g->words.w1 = _SHIFTL((s), 16, 16) \
| _SHIFTL((t), 0, 16); \
} \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(0xB2, 24, 8); \
_g->words.w1 = _SHIFTL((dsdx), 16, 16) \
| _SHIFTL((dtdy), 0, 16); \
}
/* Lights and Light Operations */
typedef struct {
unsigned char col[3];
char pad1;
unsigned char colc[3];
char pad2;
signed char dir[3];
char pad3;
} Light_t;
typedef struct {
unsigned char col[3];
char pad1;
unsigned char colc[3];
char pad2;
} Ambient_t;
typedef union {
Ambient_t l;
long long int force_structure_alignment[1];
} Ambient;
typedef union {
Light_t l;
long long int force_structure_alignment[2];
} Light;
typedef struct {
Ambient a;
Light l[4];
} Lights4;
typedef struct {
Light l[2];
} LookAt;
typedef struct {
int x1, y1, x2, y2;
} Hilite_t;
typedef union {
Hilite_t h;
long int force_alignmnet[4];
} Hilite;
#define G_MOVEMEM 0x03
/* for gSPNumLights */
// is NUMLIGHTS_0 accurate?
#define NUMLIGHTS_0 1
#define NUMLIGHTS_1 1
#define NUMLIGHTS_2 2
#define NUMLIGHTS_3 3
#define NUMLIGHTS_4 4
#define NUMLIGHTS_5 5
#define NUMLIGHTS_6 6
#define NUMLIGHTS_7 7
/* for gSPLight */
#define LIGHT_1 1
#define LIGHT_2 2
#define LIGHT_3 3
#define LIGHT_4 4
#define LIGHT_5 5
#define LIGHT_6 6
#define LIGHT_7 7
#define LIGHT_8 8
#define gSPLight(pkt, l, n) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(G_MOVEMEM, 24, 8) \
| _SHIFTL(((n)-1)*2+G_MV_L0, 16, 8) \
| _SHIFTL(sizeof(Light), 0, 16); \
_g->words.w1 = (u32)(l); \
}
#define gSPLookAtX(pkt, la) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(G_MOVEMEM, 24, 8) \
| _SHIFTL(G_MV_LOOKATX, 16, 8) \
| _SHIFTL(sizeof(Light), 0, 16); \
_g->words.w1 = (u32)(la); \
}
#define gSPLookAtY(pkt, la) \
{ \
Gfx *_g = (Gfx *)(pkt); \
_g->words.w0 = _SHIFTL(G_MOVEMEM, 24, 8) \
| _SHIFTL(G_MV_LOOKATY, 16, 8) \
| _SHIFTL(sizeof(Light), 0, 16); \
_g->words.w1 = (u32)(la); \
}
#define gSPLookAt(pkt, la) \
{ \
gSPLookAtX((pkt), (la)) \
gSPLookAtY((pkt), (char *)(la)+16) \
}
#endif

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@ -1,332 +0,0 @@
/* GNU as assembler macros for F3D GBI */
/* commands with no parameters */
.macro f3d_noparam cmd
.word (\cmd << 24), 0x00000000
.endm
.macro gsImmp1 cmd, param
.word (\cmd << 24), \param
.endm
/* DMA helper */
.macro gsDma1p cmd, segAddr, length, params
.byte \cmd, \params
.hword \length
.word \segAddr
.endm
/* 01: G_MTX */
/* params */
.set G_MTX_MODELVIEW, 0x00
.set G_MTX_PROJECTION, 0x01
.set G_MTX_MUL, 0x00
.set G_MTX_LOAD, 0x02
.set G_MTX_NOPUSH, 0x00
.set G_MTX_PUSH, 0x04
.set G_MTX, 0x01
.macro gsSPMatrix matrix, params
gsDma1p G_MTX, \matrix, 64, \params
.endm
/* 02: reserved */
/* 03: G_MOVEMEM */
.set G_MOVEMEM, 0x03
.set G_MV_L0, 0x86
.macro gsSPLight light, num
gsDma1p G_MOVEMEM, \light, 16, ((\num)-1)*2+G_MV_L0
.endm
/* 04: G_VTX */
.set G_VTX, 0x04
.macro gsSPVertex verts, num, index
gsDma1p G_VTX, \verts, 16*\num, ((\num)-1)<<4|(\index)
.endm
/* 05: reserved */
/* 06: G_DL */
.set G_DL, 0x06
.set G_DL_PUSH, 0x00
.set G_DL_NOPUSH, 0x01
.macro gsSPDisplayList dl
gsDma1p G_DL, \dl, 0, G_DL_PUSH
.endm
.macro gsSPBranchList dl
gsDma1p G_DL, \dl, 0, G_DL_NOPUSH
.endm
/* geometry mode flags */
.set G_ZBUFFER, 0x00000001
.set G_SHADE, 0x00000004
.set G_SHADING_SMOOTH, 0x00000200
.set G_CULL_FRONT, 0x00001000
.set G_CULL_BACK, 0x00002000
.set G_FOG, 0x00010000
.set G_LIGHTING, 0x00020000
.set G_TEXTURE_GEN, 0x00040000
.set G_TEXTURE_GEN_LINEAR, 0x00080000
/* B3: G_RDPHALF_2 */
.set G_RDPHALF_2, 0xB3
/* B4: G_RDPHALF_1 */
.set G_RDPHALF_1, 0xB4
/* B6: G_CLEARGEOMETRYMODE */
.set G_CLEARGEOMETRYMODE, 0xB6
.macro gsSPClearGeometryMode flags
.word G_CLEARGEOMETRYMODE << 24
.word \flags
.endm
/* B7: G_SETGEOMETRYMODE */
.set G_SETGEOMETRYMODE, 0xB7
.macro gsSPSetGeometryMode flags
.word G_SETGEOMETRYMODE << 24
.word \flags
.endm
/* B8: G_ENDDL */
.set G_ENDDL, 0xB8
.macro gsSPEndDisplayList
f3d_noparam G_ENDDL
.endm
/* B9: G_SETOTHERMODE_L */
.set G_SETOTHERMODE_L, 0xB9
/* G_SETOTHERMODE_L sft: shift count */
.set G_MDSFT_ALPHACOMPARE, 0
.set G_MDSFT_ZSRCSEL, 2
.set G_MDSFT_RENDERMODE, 3
.set G_MDSFT_BLENDER, 16
/* BA: G_SETOTHERMODE_H */
.set G_SETOTHERMODE_H, 0xBA
/* G_SETOTHERMODE_H sft: shift count */
.set G_MDSFT_ALPHADITHER, 4
.set G_MDSFT_RGBDITHER, 6
.set G_MDSFT_COMBKEY, 8
.set G_MDSFT_TEXTCONV, 9
.set G_MDSFT_TEXTFILT, 12
.set G_MDSFT_TEXTLUT, 14
.set G_MDSFT_TEXTLOD, 16
.set G_MDSFT_TEXTDETAIL, 17
.set G_MDSFT_TEXTPERSP, 19
.set G_MDSFT_CYCLETYPE, 20
.set G_MDSFT_PIPELINE, 23
.macro gsSPSetOtherMode cmd, sft, len, data
.word ((\cmd & 0xFF) << 24) | ((\sft & 0xFF) << 8) | (\len & 0xFF)
.word \data
.endm
/* BB: G_TEXTURE */
.set G_TEXTURE, 0xBB
.macro gsSPTexture scaleS, scaleT, level, tile, enable
.word (G_TEXTURE << 24) | ((\level & 0x7) << 11) | ((\tile & 0x7) << 8) | \enable
.word ((\scaleS & 0xFFFF) << 16) | (\scaleT & 0xFFFF)
.endm
/* BC: G_MOVEWORD */
.set G_MOVEWORD, 0xBC
.macro gsMoveWd index, offset, data
.word G_MOVEWORD << 24 | ((\index & 0xFFFF) << 8) | (\offset & 0xFF)
.word \data
.endm
/* BF: G_TRI1 */
.set G_TRI1, 0xBF
.macro gsSP1Triangle v0, v1, v2, flag
.word G_TRI1 << 24
.byte \flag, \v0*10, \v1*10, \v2*10
.endm
/* C0: G_NOOP */
.set G_NOOP, 0xC0
.macro gsDPNoOp
f3d_noparam G_NOOP
.endm
/* E6: G_RDPLOADSYNC */
.set G_RDPLOADSYNC, 0xE6
.macro gsDPLoadSync
f3d_noparam G_RDPLOADSYNC
.endm
/* E7: G_RDPPIPESYNC */
.set G_RDPPIPESYNC, 0xE7
.macro gsDPPipeSync
f3d_noparam G_RDPPIPESYNC
.endm
/* E8: G_RDPTILESYNC */
.set G_RDPTILESYNC, 0xE8
.macro gsDPTileSync
f3d_noparam G_RDPTILESYNC
.endm
/* E9: G_RDPFULLSYNC */
.set G_RDPFULLSYNC, 0xE9
.macro gsDPFullSync
f3d_noparam G_RDPFULLSYNC
.endm
/* F0: G_LOADTLUT */
.set G_LOADTLUT, 0xF0
.macro gsDPLoadTLUTCmd tile, count
.word G_LOADTLUT << 24
.word ((\tile & 0x7) << 24) | (\count & 0x3FFF) << 10
.endm
/* F1: unused */
/* F2: G_SETTILESIZE */
.set G_SETTILESIZE, 0xF2
.macro gsDPSetTileSize tile, uls, ult, lrs, lrt
.word (G_SETTILESIZE << 24) | ((\uls & 0x0FFF) << 12) | (\ult & 0x0FFF)
.word ((\tile & 0x7) << 24) | ((\lrs & 0x0FFF) << 12) | (\lrt & 0x0FFF)
.endm
/* F3: G_LOADBLOCK */
.set G_LOADBLOCK, 0xF3
.macro gsDPLoadBlock tile, uls, ult, lrs, dxt
.word (G_LOADBLOCK << 24) | ((\uls & 0x0FFF) << 12) | (\ult & 0x0FFF)
.word ((\tile & 0x7) << 24) | ((\lrs & 0x0FFF) << 12) | (\dxt & 0x0FFF)
.endm
/* F5: G_SETTILE */
.set G_TX_LOADTILE, 0x7
.set G_TX_RENDERTILE, 0x0
/* axis clamp and mirror flags */
.set G_TX_NOMIRROR, 0x0
.set G_TX_WRAP, 0x0
.set G_TX_MIRROR, 0x1
.set G_TX_CLAMP, 0x2
/* mask flags */
.set G_TX_NOMASK, 0x0
/* shift flags */
.set G_TX_NOLOD, 0x0
.set G_SETTILE, 0xF5
.macro gsDPSetTile fmt, siz, line, tmem, tile, palette, cmt, maskt, shiftt, cms, masks, shifts
.word (G_SETTILE << 24) | ((\fmt & 0x7) << 21) | ((\siz & 0x3) << 19) | ((\line & 0x1FF) << 9) | (\tmem & 0x1FF)
.word ((\tile & 0x7) << 24) | ((\palette & 0xF) << 20) | ((\cmt & 0x3) << 18) | ((\maskt & 0xF) << 14) | ((\shiftt & 0xF) << 10) | ((\cms & 0x3) << 8) | ((\masks & 0xF) << 4) | (\shifts & 0xF)
.endm
/* F6: G_FILLRECT */
.set G_FILLRECT, 0xF6
.macro gsDPFillRectangle ulx, uly, lrx, lry
.word (G_FILLRECT << 24) | ((\lrx & 0x3FF) << 14) | ((\lry & 0x3FF) << 2)
.word ((\ulx & 0x3FF) << 14) | ((\uly & 0x3FF) << 2)
.endm
/* F7: G_SETFILLCOLOR */
.set G_SETFILLCOLOR, 0xF7
.macro gsDPSetFillColor fillValue
.word G_SETFILLCOLOR << 24
.word \fillValue
.endm
/* helper for RGBA colors */
.macro sDPRGBColor cmd r, g, b, a
.word \cmd << 24
.byte \r, \g, \b, \a
.endm
/* F8: G_SETFOGCOLOR */
.set G_SETFOGCOLOR, 0xF8
.macro gsDPSetFogColor r, g, b, a
sDPRGBColor G_SETFOGCOLOR, \r, \g, \b, \a
.endm
/* F9: G_SETBLENDCOLOR */
.set G_SETBLENDCOLOR, 0xF9
.macro gsDPSetBlendColor r, g, b, a
sDPRGBColor G_SETBLENDCOLOR, \r, \g, \b, \a
.endm
/* FA: G_SETPRIMCOLOR */
.set G_SETPRIMCOLOR, 0xFA
.macro gsDPSetPrimColor m, l, r, g, b, a
.word (G_SETPRIMCOLOR << 24) | ((\m & 0xFF) << 8) | (\l & 0xFF)
.byte \r, \g, \b, \a
.endm
/* FB: G_SETENVCOLOR */
.set G_SETENVCOLOR, 0xFB
.macro gsDPSetEnvColor r, g, b, a
sDPRGBColor G_SETENVCOLOR, \r, \g, \b, \a
.endm
/* FC: G_SETCOMBINE */
/* color combiner */
.set G_CCMUX_COMBINED, 0
.set G_CCMUX_TEXEL0, 1
.set G_CCMUX_TEXEL1, 2
.set G_CCMUX_PRIMITIVE, 3
.set G_CCMUX_SHADE, 4
.set G_CCMUX_ENVIRONMENT, 5
.set G_CCMUX_CENTER, 6
.set G_CCMUX_SCALE, 6
.set G_CCMUX_COMBINED_ALPHA, 7
.set G_CCMUX_TEXEL0_ALPHA, 8
.set G_CCMUX_TEXEL1_ALPHA, 9
.set G_CCMUX_PRIMITIVE_ALPHA, 10
.set G_CCMUX_SHADE_ALPHA, 11
.set G_CCMUX_ENV_ALPHA, 12
.set G_CCMUX_LOD_FRACTION, 13
.set G_CCMUX_PRIM_LOD_FRAC, 14
.set G_CCMUX_NOISE, 7
.set G_CCMUX_K4, 7
.set G_CCMUX_K5, 15
.set G_CCMUX_1, 6
.set G_CCMUX_0, 31
/* alpha combiner */
.set G_ACMUX_COMBINED, 0
.set G_ACMUX_TEXEL0, 1
.set G_ACMUX_TEXEL1, 2
.set G_ACMUX_PRIMITIVE, 3
.set G_ACMUX_SHADE, 4
.set G_ACMUX_ENVIRONMENT, 5
.set G_ACMUX_LOD_FRACTION, 0
.set G_ACMUX_PRIM_LOD_FRAC, 6
.set G_ACMUX_1, 6
.set G_ACMUX_0, 7
.set G_SETCOMBINE, 0xFC
.macro gsDPSetCombine muxs0, muxs1
.word (G_SETCOMBINE << 24) | (\muxs0 & 0x00FFFFFF)
.word \muxs1
.endm
.macro gsDPSetCombineMode a0, b0, c0, d0, Aa0, Ab0, Ac0, Ad0, a1, b1, c1, d1, Aa1, Ab1, Ac1, Ad1
.word (G_SETCOMBINE << 24) | ((\a0 & 0xF) << 20) | ((\c0 & 0x1F) << 15) | ((\Aa0 & 0x7) << 12) | ((\Ac0 & 0x7) << 9) | ((\a1 & 0xF) << 5) | (\c1 & 0x1F)
.word ((\b0 & 0xF) << 28) | ((\b1 & 0xF) << 24) | ((\Aa1 & 0x7) << 21) | ((\Ac1 & 0x7) << 18) | ((\d0 & 0x7) << 15) | ((\Ab0 & 0x7) << 12) | ((\Ad0 & 0x7) << 9) | ((\d1 & 0x7) << 6) | ((\Ab1 & 0x7) << 3) | (\Ad1 & 0x7)
.endm
/* FD: G_SETTIMG */
/* fmt */
.set G_IM_FMT_RGBA, 0x00
.set G_IM_FMT_YUV, 0x01
.set G_IM_FMT_CI, 0x02
.set G_IM_FMT_IA, 0x03
.set G_IM_FMT_I, 0x04
/* size */
.set G_IM_SIZ_4b, 0x00
.set G_IM_SIZ_8b, 0x01
.set G_IM_SIZ_16b, 0x02
.set G_IM_SIZ_32b, 0x03
.set G_SETTIMG, 0xFD
.macro gsDPSetTextureImage fmt, size, width, segAddr
.word (G_SETTIMG << 24) | ((\fmt & 0x7) << 21) | ((\size & 0x3) << 19) | ((\width-1) & 0x0FFF)
.word \segAddr
.endm

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@ -1,14 +0,0 @@
#ifndef _ULTRA64_INTERRUPT_H_
#define _ULTRA64_INTERRUPT_H_
/* Types */
typedef u32 OSIntMask;
/* Functions */
OSIntMask osGetIntMask(void);
OSIntMask osSetIntMask(OSIntMask);
#endif

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@ -1,20 +0,0 @@
#ifndef _ULTRA64_LIBAUDIO_H_
#define _ULTRA64_LIBAUDIO_H_
typedef struct
{
u8 *offset;
s32 len;
} ALSeqData;
typedef struct
{
s16 revision;
s16 seqCount;
ALSeqData seqArray[1];
} ALSeqFile;
void alSeqFileNew(ALSeqFile *f, u8 *base);
#endif

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@ -1,8 +0,0 @@
#ifndef _ULTRA64_LIBC_H_
#define _ULTRA64_LIBC_H_
int sprintf(char *, const char *, ... );
void bcopy(const void *src, void *dest, size_t size);
void bzero(void *s, size_t size);
#endif

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@ -1,50 +0,0 @@
#ifndef _ULTRA64_MESSAGE_H_
#define _ULTRA64_MESSAGE_H_
/* Events */
#define OS_EVENT_SW1 0
#define OS_EVENT_SW2 1
#define OS_EVENT_CART 2
#define OS_EVENT_COUNTER 3
#define OS_EVENT_SP 4
#define OS_EVENT_SI 5
#define OS_EVENT_AI 6
#define OS_EVENT_VI 7
#define OS_EVENT_PI 8
#define OS_EVENT_DP 9
#define OS_EVENT_CPU_BREAK 10
#define OS_EVENT_SP_BREAK 11
#define OS_EVENT_FAULT 12
#define OS_EVENT_THREADSTATUS 13
#define OS_EVENT_PRENMI 14
#define OS_MESG_NOBLOCK 0
#define OS_MESG_BLOCK 1
/* Types */
typedef u32 OSEvent;
typedef void *OSMesg;
typedef struct OSMesgQueue_s
{
OSThread *mtqueue;
OSThread *fullqueue;
s32 validCount;
s32 first;
s32 msgCount;
OSMesg *msg;
} OSMesgQueue;
/* Functions */
void osCreateMesgQueue(OSMesgQueue *mq, OSMesg *msgBuf, s32 count);
s32 osSendMesg(OSMesgQueue *mq, OSMesg msg, s32 flag);
s32 osJamMesg(OSMesgQueue *mq, OSMesg msg, s32 flag);
s32 osRecvMesg(OSMesgQueue *mq, OSMesg *msg, s32 flag);
void osSetEventMesg(OSEvent e, OSMesgQueue *mq, OSMesg msg);
void osViSetEvent(OSMesgQueue *mq, OSMesg msg, u32 retraceCount);
s32 osContStartReadData(OSMesgQueue *mq);
#endif

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@ -1,39 +0,0 @@
#ifndef _ULTRA64_CONTROLLER_H_
#define _ULTRA64_CONTROLLER_H_
typedef struct
{
/*0x00*/ u16 type; /* Controller Type */
/*0x02*/ u8 status; /* Controller status */
/*0x03*/ u8 errno;
} OSContStatus;
typedef struct {
/*0x00*/ u16 button;
/*0x02*/ s8 stick_x; /* -80 <= stick_x <= 80 */
/*0x03*/ s8 stick_y; /* -80 <= stick_y <= 80 */
/*0x04*/ u8 errno;
} OSContPad;
#define A_BUTTON (1 << 15) // 0x8000
#define B_BUTTON (1 << 14) // 0x4000
#define Z_TRIG (1 << 13) // 0x2000
#define START_BUTTON (1 << 12) // 0x1000
#define U_JPAD (1 << 11) // 0x0800
#define D_JPAD (1 << 10) // 0x0400
#define L_JPAD (1 << 9) // 0x0200
#define R_JPAD (1 << 8) // 0x0100
#define DUMMY_1 (1 << 7) // 0x0080 (unused)
#define DUMMY_2 (1 << 6) // 0x0040 (unused)
#define L_TRIG (1 << 5) // 0x0020
#define R_TRIG (1 << 4) // 0x0010
#define U_CBUTTONS (1 << 3) // 0x0008
#define D_CBUTTONS (1 << 2) // 0x0004
#define L_CBUTTONS (1 << 1) // 0x0002
#define R_CBUTTONS (1 << 0) // 0x0001
s32 osContInit(OSMesgQueue *, u8 *, OSContStatus *);
void osContGetReadData(OSContPad *);
#endif

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@ -1,85 +0,0 @@
#ifndef _ULTRA64_PI_H_
#define _ULTRA64_PI_H_
/* Ultra64 Parallel Interface */
/* Types */
typedef struct
{
u32 errStatus;
void *dramAddr;
void *C2Addr;
u32 sectorSize;
u32 C1ErrNum;
u32 C1ErrSector[4];
} __OSBlockInfo;
typedef struct
{
u32 cmdType;
u16 transferMode;
u16 blockNum;
s32 sectorNum;
u32 devAddr;
u32 bmCtlShadow;
u32 seqCtlShadow;
__OSBlockInfo block[2];
} __OSTranxInfo;
typedef struct OSPiHandle_s
{
struct OSPiHandle_s *next;
u8 type;
u8 latency;
u8 pageSize;
u8 relDuration;
u8 pulse;
u8 domain;
u32 baseAddress;
u32 speed;
__OSTranxInfo transferInfo;
} OSPiHandle;
typedef struct
{
u8 type;
u32 address;
} OSPiInfo;
typedef struct
{
u16 type;
u8 pri;
u8 status;
OSMesgQueue *retQueue;
} OSIoMesgHdr;
typedef struct
{
/*0x00*/ OSIoMesgHdr hdr;
/*0x08*/ void *dramAddr;
/*0x0C*/ u32 devAddr;
/*0x10*/ u32 size;
OSPiHandle *piHandle; //from the official definition
} OSIoMesg;
/* Definitions */
#define OS_READ 0 // device -> RDRAM
#define OS_WRITE 1 // device <- RDRAM
#define OS_MESG_PRI_NORMAL 0
#define OS_MESG_PRI_HIGH 1
/* Functions */
s32 osPiStartDma(OSIoMesg *mb, s32 priority, s32 direction,
u32 devAddr, void *vAddr, u32 nbytes, OSMesgQueue *mq);
void osCreatePiManager(OSPri pri, OSMesgQueue *cmdQ, OSMesg *cmdBuf,
s32 cmdMsgCnt);
OSMesgQueue *osPiGetCmdQueue(void);
s32 osPiWriteIo(u32 devAddr, u32 data);
s32 osPiReadIo(u32 devAddr, u32 *data);
#endif

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@ -1,33 +0,0 @@
#ifndef _ULTRA64_RDP_H_
#define _ULTRA64_RDP_H_
/* DP Command Registers */
#define DPC_REG_BASE 0xA4100000
#define DPC_START_REG (*(vu32 *)(DPC_REG_BASE + 0x00))
#define DPC_END_REG (*(vu32 *)(DPC_REG_BASE + 0x04))
#define DPC_CURRENT_REG (*(vu32 *)(DPC_REG_BASE + 0x08))
#define DPC_STATUS_REG (*(vu32 *)(DPC_REG_BASE + 0x0C))
#define DPC_CLOCK_REG (*(vu32 *)(DPC_REG_BASE + 0x10))
#define DPC_BUFBUSY_REG (*(vu32 *)(DPC_REG_BASE + 0x14))
#define DPC_PIPEBUSY_REG (*(vu32 *)(DPC_REG_BASE + 0x18))
#define DPC_TMEM_REG (*(vu32 *)(DPC_REG_BASE + 0x1C))
/* DP Span Registers */
#define DPS_REG_BASE 0xA4200000
#define DPS_TBIST_REG (*(vu32 *)(DPS_REG_BASE + 0x00))
#define DPS_TEST_MODE_REG (*(vu32 *)(DPS_REG_BASE + 0x04))
#define DPS_BUFTEST_ADDR_REG (*(vu32 *)(DPS_REG_BASE + 0x08))
#define DPS_BUFTEST_DATA_REG (*(vu32 *)(DPS_REG_BASE + 0x0C))
/* Functions */
u32 osDpGetStatus(void);
void osDpSetStatus(u32 status);
#endif

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@ -1,25 +0,0 @@
#ifndef _ULTRA64_TLB_H_
#define _ULTRA64_TLB_H_
/* Types */
typedef u32 OSPageMask;
/* OSPageMask Valid Values */
#define OS_PM_4K 0x0000000
#define OS_PM_16K 0x0006000
#define OS_PM_64K 0x001e000
#define OS_PM_256K 0x007e000
#define OS_PM_1M 0x01fe000
#define OS_PM_4M 0x07fe000
#define OS_PM_16M 0x1ffe000
/* Functions */
void osMapTLB(s32 index, OSPageMask pm, void *vaddr, u32 evenpaddr,
u32 oddpaddr, s32 asid);
void osMapTLBRdb(void);
void osUnmapTLB(s32 index);
void osUnmapTLBAll(void);
void osSetTLBASID(s32 asid);
#endif

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File diff suppressed because it is too large Load Diff

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@ -1,278 +0,0 @@
Used to set 09 actors. A1 is a pointer to 09 characters
7F02370C: ADDIU SP, SP, 0xFFA0
7F023710: SW RA, 0x0024 (SP)
7F023714: SW S0, 0x0020 (SP)
7F023718: SW A0, 0x0060 (SP)
7F02371C: SW A2, 0x0068 (SP)
7F023720: LHU T6, 0x0006 (A1) //T6=preset position
7F023724: LUI T8, 0x8007
7F023728: LW T8, 0x5D18 (T8) //T8=0xxx preset pointer base
7F02372C: SLL T7, T6, 0x2
7F023730: SUBU T7, T7, T6
7F023734: SLL T7, T7, 0x2
7F023738: SUBU T7, T7, T6
7F02373C: SLL T7, T7, 0x2
7F023740: OR S0, A1, R0 //S0=A1 (guard OBJ pointer)
7F023744: ADDU A0, T7, T8 //A0=pointer to preset data
7F023748: LW A1, 0x0028 (A0) //A1=tile pointer
7F02374C: ADDIU T9, SP, 0x0054
7F023750: SW T9, 0x0010 (SP)
7F023754: SW A0, 0x005C (SP) //save preset pointer
7F023758: LUI A2, 0x41A0
7F02375C: JAL 0x0F056850
7F023760: ADDIU A3, SP, 0x0048
7F023764: BEQ V0, R0, 0x7F0238FC //if V0 invalid, abort!
7F023768: ADDIU T0, R0, 0xFFFF //T0=-1
7F02376C: SW T0, 0x0030 (SP)
7F023770: LHU V0, 0x0008 (S0) //V0=body [S0=pointer to 09 actor data]
7F023774: ORI AT, R0, 0xFFFF //AT=-1
7F023778: BNEL V0,AT,7F023794 //branch if valid and save to stack
7F02377C: SW V0, 0x0034 (SP)
7F023780: JAL 0x0F023590 //returns V0=current random body
7F023784: NOP
7F023788: BEQ R0, R0, 0x7F023794
7F02378C: SW V0, 0x0034 (SP)
7F023790: SW V0, 0x0034 (SP)
7F023794: LW T1, 0x0034 (SP) //? grab voice flag ?
7F023798: LUI T3, 0x8004
7F02379C: SLL T2, T1, 0x2
7F0237A0: ADDU T2, T2, T1
7F0237A4: SLL T2, T2, 0x2 //T2=T1*0x14
7F0237A8: ADDU T3, T3, T2
7F0237AC: LBU T3, 0xDE21 (T3) //T3=embedded head?
7F0237B0: BNEL T3,R0,7F0237DC
7F0237B4: LW A0, 0x0034 (SP)
7F0237B8: LH V0, 0x0016 (S0)
7F0237BC: BLTZ V0, 0x7F0237CC
7F0237C0: NOP
7F0237C4: BEQ R0, R0, 0x7F0237D8
7F0237C8: SW V0, 0x0030 (SP)
7F0237CC: JAL 0x0F0235AC //returns V0=norm random head
7F0237D0: LW A0, 0x0034 (SP)
7F0237D4: SW V0, 0x0030 (SP)
7F0237D8: LW A0, 0x0034 (SP)
7F0237DC: LW A1, 0x0030 (SP)
7F0237E0: JAL 0x0F0234D0
7F0237E4: LHU A2, 0x0014 (S0)
7F0237E8: BEQ V0, R0, 0x7F0238FC
7F0237EC: SW V0, 0x0038 (SP)
7F0237F0: LW V0, 0x005C (SP)
7F0237F4: LWC1 F12,0018 (V0)
7F0237F8: JAL 0x0F05AA30
7F0237FC: LWC1 F14,0020 (V0)
7F023800: SWC1 F0,003C (SP)
7F023804: JAL 0x0F035398
7F023808: LHU A0, 0x000A (S0)
7F02380C: LW A0, 0x0038 (SP)
7F023810: ADDIU A1, SP, 0x0048
7F023814: LW A2, 0x003C (SP)
7F023818: LW A3, 0x0054 (SP)
7F02381C: JAL 0x0F0203B8
7F023820: SW V0, 0x0010 (SP)
7F023824: BEQ V0, R0, 0x7F0238FC
7F023828: OR A0, V0, R0
7F02382C: JAL 0x0F03A4A4
7F023830: SW V0, 0x0044 (SP)
7F023834: JAL 0x0F03A404
7F023838: LW A0, 0x0044 (SP)
7F02383C: LW T4, 0x0044 (SP)
7F023840: LHU T5, 0x0004 (S0)
7F023844: LUI AT, 0x4F80
7F023848: LW V0, 0x0004 (T4)
7F02384C: SH T5, 0x0000 (V0)
7F023850: LHU T6, 0x0010 (S0)
7F023854: MTC1 T6,F4
7F023858: BGEZ T6, 0x7F02386C
7F02385C: CVT.S.W F6,F4
7F023860: MTC1 AT,F8
7F023864: NOP
7F023868: ADD.S F6,F6,F8
7F02386C: LUI AT, 0x447A
7F023870: MTC1 AT,F10
7F023874: LUI AT, 0x4F80
7F023878: DIV.S F16,F6,F10
7F02387C: SWC1 F16,00EC (V0)
7F023880: LHU T7, 0x0012 (S0)
7F023884: MTC1 T7,F18
7F023888: BGEZ T7, 0x7F02389C
7F02388C: CVT.S.W F4,F18
7F023890: MTC1 AT,F8
7F023894: NOP
7F023898: ADD.S F4,F4,F8
7F02389C: SWC1 F4,00D0 (V0)
7F0238A0: LHU T8, 0x000C (S0)
7F0238A4: SH T8, 0x0114 (V0)
7F0238A8: LHU T9, 0x000E (S0)
7F0238AC: SH T9, 0x0116 (V0)
7F0238B0: LW T0, 0x0030 (SP)
7F0238B4: SB T0, 0x0006 (V0)
7F0238B8: LW T1, 0x0034 (SP)
7F0238BC: SB T1, 0x000F (V0)
7F0238C0: LHU V1, 0x0014 (S0)
7F0238C4: ANDI T2, V1, 0x0004
7F0238C8: BEQL T2,R0,7F0238E4
7F0238CC: ANDI T5, V1, 0x0008
7F0238D0: LW T3, 0x0014 (V0)
7F0238D4: ORI T4, T3, 0x0002
7F0238D8: SW T4, 0x0014 (V0)
7F0238DC: LHU V1, 0x0014 (S0)
7F0238E0: ANDI T5, V1, 0x0008
7F0238E4: BEQL T5,R0,7F0238FC
7F0238E8: SW V0, 0x0018 (S0)
7F0238EC: LW T6, 0x0014 (V0)
7F0238F0: ORI T7, T6, 0x0010
7F0238F4: SW T7, 0x0014 (V0)
7F0238F8: SW V0, 0x0018 (S0)
7F0238FC: LW RA, 0x0024 (SP)
7F023900: LW S0, 0x0020 (SP)
7F023904: ADDIU SP, SP, 0x0060
7F023908: JR RA
7F02390C: NOP
---------
7F023724: LUI T8, 0x8007
7F023730: SLTI A0,T6,2710
BNEZ A0,[general]
7F02372C: ORI T7,R0,002C
//2710
7F023734: ADDI T6,T6,D8F0 //correction for -2710
7F023738: ADDIU T8,T8,0004
7F02373C: ORI T7,R0,0044
//general
MULTU T6,T7
7F023728: LW T8, 0x5D18 (T8) //T8=0xxx preset pointer base
MFLO T7
7F023744: ADDU A0, T7, T8 //A0=pointer to preset data
[rewrite]
7F02370C: ADDIU SP, SP, 0xFFA0
7F023710: SW RA, 0x0024 (SP)
7F023714: SW S0, 0x0020 (SP)
7F023718: SW A0, 0x0060 (SP)
7F02371C: SW A2, 0x0068 (SP)
7F023720: LHU T6, 0x0006 (A1) //T6=preset position
7F023724: LUI T8, 0x8007
//start editting!
7F023728: 2DC42710 SLTI A0,T6,2710
7F02372C: 14800004 BNEZ A0,[general] +4
7F023730: 340F002C ORI T7,R0,002C
7F023734: 21CED8F0 ADDI T6,T6,D8F0 //correction for -2710
7F023738: 27180004 ADDIU T8,T8,0004
7F02373C: 340F0044 ORI T7,R0,0044
7F023740: 01CF0019 MULTU T6,T7 [general]
7F023744: 00A08025 OR S0, A1, R0 //S0=A1 (guard OBJ pointer)
7F023748: 8F185D18 LW T8, 0x5D18 (T8) //T8=0xxx preset pointer base
7F02374C: 00007812 MFLO T7
7F023750: 01F82021 ADDU A0, T7, T8 //A0=pointer to preset data
7F023754: 8C850028 LW A1, 0x0028 (A0) //A1=tile pointer
7F023758: 27B90054 ADDIU T9, SP, 0x0054
7F02375C: AFB90010 SW T9, 0x0010 (SP)
7F023760: AFA4005C SW A0, 0x005C (SP) //save preset pointer
7F023764: 3C0641A0 LUI A2, 0x41A0
7F023768: 0FC15A14 JAL 0x0F056850 //PROXIMITY TEST FOR PRESET
7F02376C: 27A70048 ADDIU A3, SP, 0x0048
7F023770: 10400062* BEQ V0, R0, 0x7F0238FC //1 if okay to spawn there
7F023774: 2408FFFF ADDIU T0, R0, 0xFFFF //T0=-1
7F023778: 86020008 *LH V0, 0x0008 (S0) //V0=body
7F02377C: 04430003 *BGEZ V0,+4 //branch < 0
7F023780: AFA80030 SW T0, 0x0030 (SP)
7F023784: 0FC08D88 JAL 0x0F023620 //returns V0=random body
7F023788: 00000000 NOP
7F02378C: 00000000 NOP
//end editting - unless need more space!
7F023790: SW V0, 0x0034 (SP) +3
7F023794: LW T1, 0x0034 (SP) //? grab voice flag ?
7F023798: LUI T3, 0x8004
7F02379C: SLL T2, T1, 0x2
7F0237A0: ADDU T2, T2, T1
7F0237A4: SLL T2, T2, 0x2 //T2=T1*0x14
7F0237A8: ADDU T3, T3, T2
7F0237AC: LBU T3, 0xDE21 (T3) //T3=embedded head?
7F0237B0: BNEL T3,R0,7F0237DC
7F0237B4: LW A0, 0x0034 (SP)
7F0237B8: LH V0, 0x0016 (S0)
7F0237BC: BLTZ V0, 0x7F0237CC
7F0237C0: NOP
7F0237C4: BEQ R0, R0, 0x7F0237D8
7F0237C8: SW V0, 0x0030 (SP)
7F0237CC: JAL 0x0F0235AC //returns V0=norm random head
7F0237D0: LW A0, 0x0034 (SP)
7F0237D4: SW V0, 0x0030 (SP)
7F0237D8: LW A0, 0x0034 (SP)
7F0237DC: LW A1, 0x0030 (SP)
7F0237E0: JAL 0x0F0234D0
7F0237E4: LHU A2, 0x0014 (S0)
7F0237E8: BEQ V0, R0, 0x7F0238FC
7F0237EC: SW V0, 0x0038 (SP)
7F0237F0: LW V0, 0x005C (SP)
7F0237F4: LWC1 F12,0018 (V0)
7F0237F8: JAL 0x0F05AA30
7F0237FC: LWC1 F14,0020 (V0)
7F023800: SWC1 F0,003C (SP)
7F023804: JAL 0x0F035398
7F023808: LHU A0, 0x000A (S0)
7F02380C: LW A0, 0x0038 (SP)
7F023810: ADDIU A1, SP, 0x0048
7F023814: LW A2, 0x003C (SP)
7F023818: LW A3, 0x0054 (SP)
7F02381C: JAL 0x0F0203B8
7F023820: SW V0, 0x0010 (SP)
7F023824: BEQ V0, R0, 0x7F0238FC
7F023828: OR A0, V0, R0
7F02382C: JAL 0x0F03A4A4
7F023830: SW V0, 0x0044 (SP)
7F023834: JAL 0x0F03A404
7F023838: LW A0, 0x0044 (SP)
7F02383C: LW T4, 0x0044 (SP)
7F023840: LHU T5, 0x0004 (S0)
7F023844: LUI AT, 0x4F80
7F023848: LW V0, 0x0004 (T4)
7F02384C: SH T5, 0x0000 (V0)
7F023850: LHU T6, 0x0010 (S0)
7F023854: MTC1 T6,F4
7F023858: BGEZ T6, 0x7F02386C
7F02385C: CVT.S.W F6,F4
7F023860: MTC1 AT,F8
7F023864: NOP
7F023868: ADD.S F6,F6,F8
7F02386C: LUI AT, 0x447A
7F023870: MTC1 AT,F10
7F023874: LUI AT, 0x4F80
7F023878: DIV.S F16,F6,F10
7F02387C: SWC1 F16,00EC (V0)
7F023880: LHU T7, 0x0012 (S0)
7F023884: MTC1 T7,F18
7F023888: BGEZ T7, 0x7F02389C
7F02388C: CVT.S.W F4,F18
7F023890: MTC1 AT,F8
7F023894: NOP
7F023898: ADD.S F4,F4,F8
7F02389C: SWC1 F4,00D0 (V0)
7F0238A0: LHU T8, 0x000C (S0)
7F0238A4: SH T8, 0x0114 (V0)
7F0238A8: LHU T9, 0x000E (S0)
7F0238AC: SH T9, 0x0116 (V0)
7F0238B0: LW T0, 0x0030 (SP)
7F0238B4: SB T0, 0x0006 (V0)
7F0238B8: LW T1, 0x0034 (SP)
7F0238BC: SB T1, 0x000F (V0)
7F0238C0: LHU V1, 0x0014 (S0)
7F0238C4: ANDI T2, V1, 0x0004
7F0238C8: *BEQ T2,R0,+4
7F0238D0: LW T3, 0x0014 (V0)
7F0238D4: ORI T4, T3, 0x0002
7F0238D8: SW T4, 0x0014 (V0)
7F0238DC: LHU V1, 0x0014 (S0)
7F0238E0: ANDI T5, V1, 0x0008 +4
7F0238E4: *BEQ T5,R0,+3
7F0238EC: LW T6, 0x0014 (V0)
7F0238F0: ORI T7, T6, 0x0010
7F0238F4: SW T7, 0x0014 (V0)
7F0238F8: SW V0, 0x0018 (S0) +3
7F0238FC: LW RA, 0x0024 (SP)
7F023900: LW S0, 0x0020 (SP)
//don't move this one
7F023908: JR RA
7F023904: *ADDIU SP, SP, 0x0060

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@ -1,51 +0,0 @@
7F000A00 35530 expand animation table entries (animation source at ROM 0x124AC0)
accepts: A0=p->list of animation table entries
LW V1,0000 (A0)
LUI A2,8007
OR V0,A0,R0 ;V0=A0: p->
BEQ V1,R0,7F000A6C
ADDIU A2,A2,9538 ;A2=80069538
LW V1,0000 (A0)
ADDIU A1,R0,0001 ;A1=1: default animation value
//7F000A1C:
BEQL A1,V1,7F000A58 ;branch if entry 1
LW V1,0004 (V0)
LW T6,0000 (A2) ;T6=80069538: p->animation table
ADDU T7,V1,T6
SW T7,0000 (V0)
LW T9,0000 (A2) ;T9=80069538: p->animation table
LW T8,0008 (T7)
ADDU T0,T8,T9
SW T0,0008 (T7)
LW V1,0000 (V0)
LW T2,0000 (A2) ;T2=80069538: p->animation table
LW T1,0010 (V1)
ADDU T3,T1,T2
SW T3,0010 (V1)
//7F000A54:
LW V1,0004 (V0)
ADDIU V0,V0,0004 ;V0+=4: next entry
BNE V1,R0,7F000A1C ;loop while more entries in table
NOP
OR V0,A0,R0 ;V0=A0: p->
LW V1,0000 (A0)
//7F000A6C:
BEQ V1,R0,7F000AA4 ;return if end of table
ADDIU A1,R0,0001 ;A1=1
LUI A0,0012
ADDIU A0,A0,4AC0 ;A0=0x124AC0
LW V1,0000 (V0)
//7F000A80: generate ROM offsets if not 1
BEQL A1,V1,7F000A98 ;branch if 1
LW V1,0004 (V0)
LW T4,0000 (V1) ;T4=V0+0: offset
ADDU T5,T4,A0 ;T5=T4+0x124AC0:
SW T5,0000 (V1) ;@V1+=0x124AC0: offset->ROM address
//7F000A94:
LW V1,0004 (V0)
ADDIU V0,V0,0004 ;V0+=4: next entry
BNE V1,R0,7F000A80 ;loop while more data in table
NOP
//7F000AA4: return
JR RA
NOP

View File

@ -1,48 +0,0 @@
7F000AAC 355DC allocate, load, and expand animation tables
ADDIU SP,SP,FFE0
SW RA,0014 (SP)
LUI A0,8007
LUI A1,8007
ADDIU A1,A1,9518 ;A1=80069518:
ADDIU A0,A0,9440 ;A0=80069440:
JAL 7000D6D0
ADDIU A2,R0,0008
//7F000ACC:
LUI A0,8003
LUI A1,8007
LUI A2,8007
ADDIU A2,A2,9458 ;A2-80069458:
ADDIU A1,A1,9440 ;A1=80069440:
JAL 7F0009E0
ADDIU A0,A0,9D60 ;A0=80029D60
//7F000AE8: allocate animation table
LUI T6,0001
LUI T7,0000
ADDIU T7,T7,0000
ADDIU T6,T6,E7E0
SUBU A2,T6,T7 ;A2= E7E0 - 0
OR A0,A2,R0 ;A0=size
SW A2,0018 (SP)
JAL 70009720 ;V0=p->A0 bytes allocated in bank A1
ADDIU A1,R0,0006 ;A1=6
//7F000B0C: load the animations to rdram
LUI V1,8007
ADDIU V1,V1,9538
LUI A1,0029
SW V0,0000 (V1) ;V0->80069538: p->animation table
LW A2,0018 (SP) ;A2= E7E0: size
ADDIU A1,A1,E980 ;A1= 28E980
JAL 70005C1C ;read A2 bytes from hardware A1 to rdram A0
OR A0,V0,R0 ;A0=p->animation table
//7F000B2C: expand both animation tables
LUI A0,8003
JAL 7F000A00 ;expand animation table A0's entries
ADDIU A0,A0,9D6C ;A0=80029D6C: offset table for animations
LUI A0,8003
JAL 7F000A00 ;expand animation table A0's entries
ADDIU A0,A0,A04C ;A0=8002A04C: offset table for final animations
//7F000B44: return
LW RA,0014 (SP)
ADDIU SP,SP,0020
JR RA
NOP

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@ -1,37 +0,0 @@
First 0x10 appears to be a sort of header
offsets 4018 4070 40D4 4144 4298 42C8
size 58 64 70 154 30 BC
0x0 1 [7] [8] [6] [7] [0] [8]
0x1 1 [0] [0] [0] [0] [0] [0]
0x2 2 [040A] [041C] [041F] [0415] [0000] [03DA]
0x4 2 [C] [C] [A] [C] [0] [A]
0x6 2 [0600] [0600] [0500] [0700] [0000] [0400]
0x8 2 [AF] [73] [36] [1F] [0] [2]
0xA 2 [12] [12] [F] [13] [0] [E]
0xC 4 [0] [0] [0] [0] [0] [0]
Last 0x1C appears to be a sort of tail
offsets 4018 4070 40D4 4144 4298 42C8
size 58 64 70 154 30 BC
datasize 2B 36 42 126 4 90
0x0 2 [5] [5] [5] [5] [5] [5]
0x2 2 [3CE0] [41EC] [484C] [5198] [7788] [8278]
0x4 2 [13] [18] [23] [7C] [3C] [52]
0x6 2 [0C01] [0C01] [0C01] [0C00] [0C00] [0C00]
0x8 2 [0] [0] [0] [0] [0] [0]
0xA 2 [402C] [4084] [40E8] [4158] [42AC] [42DC]
0xC 2 [12] [12] [F] [13] [0] [E]
0xE 2 [0220] [0220] [0220] [0220] [0220] [0220]
0x10 2 [0] [0] [0] [0] [0] [0]
0x12 2 [4044] [409C] [4100] [4170] [42C4] [42F4]
0x14 2 [0] [0] [0] [0] [0] [0]
0x16 2 [0400] [0400] [0500] [0] [0200] [0500]
0x18 2 [1] [1] [9] [0] [0] [-3]
0x1A 2 [4] [4] [5] [0] [2] [5]
0xA 2 offset always data+14
0x12 2 offset always data+14+18
NOTE: 4298 has NULL data.

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@ -1,133 +0,0 @@
80036514 selected solo animation
80036518 15788-15818 animations for intro block type 4 0x10 each
potential new format:
0x0 2 anim
0x2 2 start point
0x4 2 run length
0x6 2 rate, * 10000
42BE0000 95 005F
42200000 40 0028
40E00000 7 0007
3CA3D70A 0.02 00C8 (2710) or 0014 (0064)
3F000000 0.5 1388 (2710) or 01F4 (0064)
003D 00F4
0042 0108
0061 0184
0062 0188
0063 018C
0064 0190
0066 0198
0067 019C
00B0 02C0
ani val1 val2 val3*10000
003D 005F FFFF 00C8
0042 0007 0028 1388
0061 0000 FFFF 1388
0062 0000 FFFF 1388
0063 0000 FFFF 1388
0064 0000 FFFF 1388
0066 0000 FFFF 1388
0067 0000 FFFF 1388
00B0 0000 FFFF 1388
reset just prior to parsing the intro block commands:
//7F005A10: SW R0,6514 (AT)
7F005C28: writes value set in intro block command to 80036514 register
//7F07ABBC: 0x use, to load the animation!
LUI T0,8003
LW T0,6514 (T0) T0=80036514: animation register
LUI T2,8003
LUI S0,8008
ADDIU T2,T2,6518 T2=80036518: base address for animations
SLL T1,T0,0x4
ADDIU S0,S0,A0B0 S0=8007A0B0
ADDU V0,T1,T2 V0=address for chosen ani data
LW T5,0000 (S0) T5=cur. playerdata
LWC1 F0,0004 (V0) F0=val1
LUI T4,8007
LW T4,9538 (T4) T4=80069538: pointer to animation binaries
LW T3,0000 (V0) T3=offset to ani
LWC1 F12,0008 (V0) F12=val2
LWC1 F2,000C (V0) F2=val3
MTC1 R0,F10
LW A0,00D4 (T5) A0=player's obj.instance
MFC1 A3,F0 A3=val1
OR A2,R0,R0 A2=0
ADDU A1,T3,T4 A1=pointer to selected ani binary
SWC1 F12,0078 (SP) save val2
SWC1 F2,0010 (SP) save val3
JAL 7F06FCA8
SWC1 F10,0014 (SP) 0->SP+14
+ +
+
+ +
Potential Rewrite
//7F07AB84: 0xAF6B4
14400039 -BNEZ V0,7F07AC6C
3C018003 LUI AT,8003
44806000 -MTC1 R0,F12 F12 must=0
AC2064A4 SW R0,64A4 (AT)
24190001 -ADDIU T9,R0,0001
AC3964A8 SW T9,64A8 (AT)
3C013F80 LUI AT,3F80
0FC20284 JAL 7F080A10
44817000 MTC1 AT,F14
0FC1E73C JAL 7F079CF0 leaves AT at 80050000...
00000000 NOP
//7F07ABB0: 0xAF6E0 use, to load the animation!
3C0A8003 LUI T2,8003
8D496514 LW T1,6514 (T2) T0=80036514: animation register
000948C0 SLL T1,T1,0x3 newsize
012A1021 ADDU V0,T1,T2 V0=address for chosen ani data
844B6518 LH T3,6518 (V0) T3=offset to ani
000B5880 SLL T3,T3,0x2
016A2821 ADDU A1,T3,T2
8CA59D6C LW A1,9D6C (A1)
3C108008 LUI S0,8008
2610A0B0 ADDIU S0,S0,A0B0
8E0D0000 LW T5,0000 (S0) T5=cur. playerdata
8DA400D4 LW A0,00D4 (T5) A0=player's obj.instance
//
8446651E LH A2,651E (V0)
44861000 MTC1 A2,F2 F2=val3 LH A2, MTC1, CVT, DIV, SWC1, and need divisor
C4201A3C LWC1 F0,1A3C (AT) 10000, borrowed from main menu, used in scale division!
468010A0 CVT.S.W F2,F2
46001083 DIV.S F2,F2,F0
//
8447651A LH A3,651A (V0)
44870000 MTC1 A3,F0
E7A20010 SWC1 F2,0010 (SP) save val3
46800020 CVT.S.W F0,F0 F0=val1
44070000 MFC1 A3,F0 A3=val1
//
8446651C LH A2,651C (V0)
44866000 MTC1 A2,F12
00003025 OR A2,R0,R0 A2=0
46806320 CVT.S.W F12,F12
E7AC0078 SWC1 F12,0078 (SP) save val2
//
0FC1BF2A JAL 7F06FCA8
AFA00014 SW R0,0014 (SP) 0->SP+14
44808000 MTC1 R0,F16
C7AC0078 LWC1 F12,0078 (SP)
460C803C C.LT.S F16,F12
00000000 NOP
45000004 BC1F +4
8E0F0000 LW T7,0000 (S0)
//7F07AC3C: 0xAF76C
44056000 -MFC1 A1,F12
0FC1BF7A -JAL 7F06FDE8
8DE400D4 LW A0,00D4 (T7)

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@ -1,43 +0,0 @@
7F000EB8 359E8 allocate and intialize A0 + 10 GUARDdata entries
accepts: A0= #guards
ADDIU T6,A0,000A
SLL T7,T6,0x4
SUBU T7,T7,T6
SLL T7,T7,0x3
SUBU T7,T7,T6
SLL T7,T7,0x2 ;T7= 1DC(A0 + A): space for A0+10 guards
ADDIU SP,SP,FFE8
LUI A2,8003
ADDIU A0,T7,000F
ADDIU A2,A2,CC68
SW RA,0014 (SP)
ORI T8,A0,000F
SW T6,0000 (A2) ;8002CC68 = A0+A: set #guards+10
XORI A0,T8,000F ;A0->nearest quadword boundry
JAL 70009720 ;V0=p->A0 bytes allocated in bank A1
ADDIU A1,R0,0004 ;A1= bank 4
//7F000EF8: set pointer to allocated block
LUI A2,8003
ADDIU A2,A2,CC68
LW T0,0000 (A2) ;T0=8002CC68: #guards
LUI A0,8003
ADDIU A0,A0,CC64
SW V0,0000 (A0) ;V0->8002CC64: p->GUARDdata block
BLEZ T0,7F000F40 ;return if no entries, which isn't really possible
OR V1,R0,R0 ;V1=0 init. count
OR V0,R0,R0 ;V0=0 init. offset
//7F000F1C: initialize each entry
LW T1,0000 (A0) ;T1=p->GUARDdata
ADDIU V1,V1,0001 ;V1+=1 count+=1
ADDU T2,T1,V0
SW R0,001C (T2) ;0->GUARDdata+1C: set NULL p->model
LW T3,0000 (A2) ;T3= #guards
ADDIU V0,V0,01DC ;V0+=1DC: next GUARDdata's offset
SLT AT,V1,T3
BNEL AT,R0,7F000F20 ;loop for each entry
LW T1,0000 (A0)
//7F000F40: return
LW RA,0014 (SP)
ADDIU SP,SP,0018
JR RA
NOP

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@ -1,234 +0,0 @@
7F0050D0 39C00 initialize current player's BONDdata and statistics
ADDIU SP,SP,FC30
LUI T7,8003
ADDIU T7,T7,A3D0
SW RA,001C (SP)
SW S0,0018 (SP)
ADDIU T0,T7,03A8
ADDIU T6,SP,0024
//7F0050EC: copy 8002A3D0-8002A778 to stack
LW AT,0000 (T7)
ADDIU T7,T7,000C
ADDIU T6,T6,000C
SW AT,FFF4 (T6)
LW AT,FFF8 (T7)
SW AT,FFF8 (T6)
LW AT,FFFC (T7)
BNE T7,T0,7F0050EC
SW AT,FFFC (T6)
//7F005110: allocate a right item buffer
LUI A0,8003
LW A0,245C (A0) ;A0=8003245C: [14820]
JAL 70009720 ;V0=p->A0 bytes allocated in bank A1
ADDIU A1,R0,0004 ;A1= bank 4
LUI S0,8008
ADDIU S0,S0,A0B0
LW T1,0000 (S0) ;T1=cur.BONDdata
JAL 7F09A464 ;V0= # players
SW V0,0808 (T1) ;V0->BONDdata+808: right weapon buffer
ADDIU AT,R0,0001
BNE V0,AT,7F005154 ;skip if multiplayer
//7F00513C: allocate a left item buffer
LUI A0,8003
LW A0,2460 (A0) ;A0=80032460: [14820]
JAL 70009720 ;V0=p->A0 bytes allocated in bank A1
ADDIU A1,R0,0004 ;A1= bank 4
LW T2,0000 (S0)
SW V0,080C (T2) ;V0->BONDdata+80C: left weapon buffer
//7F005154:
LW T3,0000 (S0)
ADDIU A1,R0,FFFF
ADDIU V1,SP,0024
SW R0,07F8 (T3) ; 0->BONDdata+7F8: 1st person right invisible
LW T4,0000 (S0)
ADDIU T3,V1,03A8
OR V0,R0,R0
SW R0,07FC (T4) ; 0->BONDdata+7FC: 1st person left invisible
LW T5,0000 (S0)
OR T4,V1,R0
SW R0,0800 (T5) ;0->BONDdata+800: NULL item right #
LW T9,0000 (S0)
SW R0,0804 (T9) ;0->BONDdata+804: NULL item left #
LW T8,0000 (S0)
SW A1,2A44 (T8) ;-1->BONDdata+2A44:
LW T0,0000 (S0)
ADDIU T8,V1,03A8
SW A1,2A48 (T0) ;-1->BONDdata+2A48:
LW T7,0000 (S0)
OR T0,V1,R0
LUI V1,8008
SW R0,2A50 (T7) ; 0->BONDdata+2A50: right item model unlocked
LW T6,0000 (S0)
ADDIU V1,V1,A0B4
SW R0,2A54 (T6) ; 0->BONDdata+2A54: left item model unlocked
LW T1,0000 (S0)
//7F0051BC: copy right item controller initialization from buffer to BONDdata
LW AT,0000 (T4)
ADDIU T4,T4,000C
ADDIU T1,T1,000C
SW AT,0864 (T1)
LW AT,FFF8 (T4)
SW AT,0868 (T1)
LW AT,FFFC (T4)
BNE T4,T3,7F0051BC
SW AT,086C (T1)
LW T5,0000 (S0)
//7F0051E4: copy left item controller initialization from buffer to BONDdata
LW AT,0000 (T0)
ADDIU T0,T0,000C
ADDIU T5,T5,000C
SW AT,0C0C (T5)
LW AT,FFF8 (T0)
SW AT,0C10 (T5)
LW AT,FFFC (T0)
BNE T0,T8,7F0051E4
SW AT,0C14 (T5)
//7F005208: initialize inventory
LW T7,0000 (S0)
ADDU T6,T7,V0
ADDIU V0,V0,0004
SLTI AT,V0,0078
BNE AT,R0,7F005208
SW R0,1130 (T6) ; 0->BONDdata+1130 - +11A8
//7F005220: initialize statistics
LW T2,0000 (V1)
ADDIU A0,R0,0003
SLL V0,A0,0x2
SW R0,0000 (T2) ;0->cur.player.stats+0: reset shots fired
LW T3,0000 (V1)
LUI AT,3F80
MTC1 AT,F2
SW R0,0004 (T3) ;0->cur.player.stats+4: reset hits.head
LW T4,0000 (V1)
LUI AT,8005
MTC1 R0,F0
SW R0,0008 (T4) ;0->cur.player.stats+8: reset hits.body
LW T1,0000 (V1)
OR A0,R0,R0 ;A0= right hand
ADDU T9,T1,V0
SW R0,0000 (T9) ;0->cur.player.stats+C: reset hits.leg
LW T8,0000 (V1)
ADDU T0,T8,V0
SW R0,0004 (T0) ;0->cur.player.stats+10: reset hits.weapon
LW T5,0000 (V1)
ADDU T7,T5,V0
SW R0,0008 (T7) ;0->cur.player.stats+14: reset hits.hat
LW T6,0000 (V1)
ADDU T2,T6,V0
SW R0,000C (T2) ;0->cur.player.stats+18: reset hits.objects
LW T3,0000 (V1)
LWC1 F12,F0E0 (AT) ;F12=8004F0E0: 0.9
ADDIU V0,R0,00FF
SW R0,006C (T3) ;0->cur.player.stats+6C: reset civilians killed
LW T4,0000 (V1)
LUI AT,8005
SW R0,001C (T4) ;0->cur.player.stats+1C: reset kill count
LW T1,0000 (V1)
SW R0,0020 (T1) ;0->cur.player.stats+20: MwtGX kills
//7F0052A8:
LW T9,0000 (S0)
SW R0,29D8 (T9) ; 0->BONDdata+29D8: reset #deaths
LW T8,0000 (S0)
SW R0,29DC (T8) ; 0->BONDdata+29DC: reset #suicides
LW T0,0000 (S0)
SWC1 F2,0FC0 (T0) ;1.0->BONDdata+FC0:
LW T5,0000 (S0)
SWC1 F2,0FC4 (T5) ;1.0->BONDdata+FC4:
LW T7,0000 (S0)
ADDIU T5,R0,0001
SW R0,0FC8 (T7) ; 0->BONDdata+FC8:
LW T6,0000 (S0)
SW R0,0FCC (T6) ; 0->BONDdata+FCC:
LW T2,0000 (S0)
SW R0,0FD0 (T2) ; 0->BONDdata+FD0:
LW T3,0000 (S0)
SW R0,0FD4 (T3) ; 0->BONDdata+FD4:
LW T4,0000 (S0)
SW R0,0FD8 (T4) ; 0->BONDdata+FD8:
LW T1,0000 (S0)
SB V0,0FDC (T1) ;-1->BONDdata+FDC:
LW T9,0000 (S0)
SB V0,0FDD (T9) ;-1->BONDdata+FDD:
LW T8,0000 (S0)
SB V0,0FDE (T8) ;-1->BONDdata+FDE:
LW T0,0000 (S0)
SB R0,0FDF (T0) ; 0->BONDdata+FDF:
LW T7,0000 (S0)
SW T5,0FE0 (T7) ; 1->BONDdata+FE0:
LW T6,0000 (S0)
SW R0,0FE4 (T6) ; 0->BONDdata+FE4:
LW T2,0000 (S0)
SWC1 F0,0FE8 (T2) ;0.0->BONDdata+FE8:
LW T3,0000 (S0)
SWC1 F0,0FEC (T3) ;0.O->BONDdata+FEC:
LW T4,0000 (S0)
SWC1 F0,0FF0 (T4) ;0.0->BONDdata+FF0:
LW T1,0000 (S0)
SWC1 F0,0FF4 (T1) ;0.0->BONDdata+FF4:
LW T9,0000 (S0)
SWC1 F12,0FF8 (T9) ;0.9->BONDdata+FF8:
LW T8,0000 (S0)
SWC1 F0,0FFC (T8) ;0.0->BONDdata+FFC:
LW T0,0000 (S0)
SWC1 F0,1000 (T0) ;0.0->BONDdata+1000:
LW T5,0000 (S0)
SWC1 F0,1004 (T5) ;0.0->BONDdata+1004:
LW T7,0000 (S0)
SWC1 F0,1008 (T7) ;0.0->BONDdata+1008:
LW T6,0000 (S0)
SWC1 F12,100C (T6) ;0.9->BONDdata+100C:
LW T2,0000 (S0)
SWC1 F0,1010 (T2) ;0.0->BONDdata+1010:
LW T3,0000 (S0)
LWC1 F4,F0E4 (AT) ;F4=8004F0E4: -Pi
SWC1 F4,1014 (T3) ;-Pi->BONDdata+1014:
LW T4,0000 (S0)
SWC1 F0,1018 (T4) ;0.0->BONDdata+1018:
LW T1,0000 (S0)
SW R0,1060 (T1) ; 0->BONDdata+1060: reset GEkey analyzed used flag
LW T9,0000 (S0)
SW A1,1270 (T9) ;-1->BONDdata+1270:
LW T8,0000 (S0)
SWC1 F0,106C (T8) ;0.0->BONDdata+106C:
LW T0,0000 (S0)
SWC1 F0,1070 (T0) ;0.0->BONDdata+1070:
LW T5,0000 (S0)
SWC1 F0,1074 (T5) ;0.0->BONDdata+1074:
LW T7,0000 (S0)
SW R0,1078 (T7) ; 0->BONDdata+1078:
LW T6,0000 (S0)
SWC1 F0,107C (T6) ;0.0->BONDdata+107C:
LW T2,0000 (S0)
//7F0053CC:
JAL 7F05C980
SWC1 F0,1080 (T2) ;0.0->BONDdata+1080:
JAL 7F05C980
OR A0,R0,R0 ;A0= right hand
JAL 7F05C980
OR A0,R0,R0 ;A0= right hand
JAL 7F05C980
ADDIU A0,R0,0001 ;A0= left hand
JAL 7F05C980
ADDIU A0,R0,0001 ;A0= left hand
JAL 7F05C980
ADDIU A0,R0,0001 ;A0= left hand
//7F0053FC:
LW T3,0000 (S0)
ADDIU T4,R0,0002
LUI AT,8003
SW R0,1064 (T3) ; 0->BONDdata+1064: reset flags
LW T1,0000 (S0)
SW T4,1128 (T1) ; 2->BONDdata+1128: reset more flags
LW T9,0000 (S0)
LWC1 F6,2C38 (AT) ;F6=80032C38: item 11+34: sniper rifle zoom
LUI AT,8003
SWC1 F6,1084 (T9) ;zoom->BONDdata+1084: sniper zoom
LW T8,0000 (S0)
LWC1 F8,36B8 (AT) ;F8=800336B8: item 29+34: camera zoom
SWC1 F8,1088 (T8) ;zoom->BONDdata+1088: camera zoom
//7F005430: return
LW RA,001C (SP)
LW S0,0018 (SP)
ADDIU SP,SP,03D0
JR RA
NOP

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@ -1,29 +0,0 @@
7F00625C 3AD8C allocate and initialize 0x1E + A0 inventory entries for cur. player
accepts: A0= #additional inventory entries
LUI V0,8008
ADDIU V0,V0,A0B0
LW T7,0000 (V0) ;T7=cur.BONDdata
ADDIU SP,SP,FFE8
SW RA,0014 (SP)
ADDIU T6,A0,001E
SW T6,11E8 (T7) ;T6->BONDdata+11E8: max inventory items
LW T8,0000 (V0)
ADDIU A1,R0,0004 ;A1= bank 4
LW A0,11E8 (T8) ;A0=items.max
SLL T9,A0,0x2
ADDU T9,T9,A0
SLL T9,T9,0x2
ADDIU A0,T9,000F
ORI T0,A0,000F
JAL 70009720 ;V0=p->A0 bytes allocated in bank A1
XORI A0,T0,000F ;A0= 14*items.max
//7F0062A0: initialize player inventory
LUI T2,8008
LW T2,A0B0 (T2)
JAL 7F08BFF0 ;reinitialize player inventory
SW V0,11E4 (T2) ;V0->BONDdata+11E4: items.Pcur
//7F0062B0: return
LW RA,0014 (SP)
ADDIU SP,SP,0018
JR RA
NOP

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@ -1,346 +0,0 @@
7F0793EC ADF1C initialize playerdata
ADDIU SP,SP,FFE8
SW RA,0014 (SP)
JAL 7F09A464 ;V0=#players
NOP
SLTI AT,V0,0002
BNEZ AT,7F07943C ;branch if solo
NOP
//7F079408: multiplayer only...
JAL 7F09B150 ;V0=cur.player#
NOP
JAL 7F0100BC ;V0= player A0's control style
OR A0,V0,R0 ;A0=V0: player#
LUI V1,8008
ADDIU V1,V1,A0B0
LW T6,0000 (V1) ;T6=8007A0B0: cur.player data pointer
JAL 7F09B150 ;V0=cur.player#
SW V0,0430 (T6) ;cur.player+430: control style
JAL 7F0100BC ;V0= player A0's control style
OR A0,V0,R0 ;A0=V0: player#
JAL 7F0A4DD0 ;set control style A0 to current playerdata
OR A0,V0,R0 ;A0=V0: control style
//7F07943C:
LUI V1,8008
ADDIU V1,V1,A0B0
MTC1 R0,F0 ;F0=0
LW T7,0000 (V1) ;T7=8007A0B0: cur.BONDdata pointer
LUI AT,3F80
MTC1 AT,F2 ;F2=1.0 [3F800000]
SWC1 F0,0038 (T7) ;BONDdata+38= 0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
ADDIU A3,R0,0002 ;A3=2
ADDIU A1,R0,0001 ;A1=1
SWC1 F0,003C (T8) ;BONDdata+3C= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
ADDIU A2,R0,FFFF ;A2=-1
LUI AT,C080
SWC1 F0,0040 (T9) ;BONDdata+40= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
MTC1 AT,F4 ;F4=-4.0 [C0800000]
LUI AT,43B4
SWC1 F0,0044 (T0) ;BONDdata+44= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F0,0048 (T1) ;BONDdata+48= 0.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F0,004C (T2) ;BONDdata+4C= 0.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,0050 (T3) ;BONDdata+50= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F0,0054 (T4) ;BONDdata+54= 0.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SWC1 F0,0058 (T5) ;BONDdata+58= 0.0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW R0,0000 (T6) ;BONDdata+0= 0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F0,0004 (T7) ;BONDdata+4= 0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,0008 (T8) ;BONDdata+8= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,000C (T9) ;BONDdata+C= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,0010 (T0) ;BONDdata+10= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F0,0014 (T1) ;BONDdata+14= 0.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F2,0018 (T2) ;BONDdata+18= 1.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,001C (T3) ;BONDdata+1C= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F2,0020 (T4) ;BONDdata+20= 1.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SWC1 F0,0024 (T5) ;BONDdata+24= 0.0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SWC1 F0,0028 (T6) ;BONDdata+28= 0.0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F0,002C (T7) ;BONDdata+2C= 0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,0030 (T8) ;BONDdata+30= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SW R0,0034 (T9) ;BONDdata+34= 0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,03C4 (T0) ;BONDdata+3C4= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F0,03C8 (T1) ;BONDdata+3C8= 0.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F2,03CC (T2) ;BONDdata+3CC= 1.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,0084 (T3) ;BONDdata+84= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F0,0088 (T4) ;BONDdata+88= 0.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW R0,008C (T5) ;BONDdata+8C= 0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SWC1 F0,0090 (T6) ;BONDdata+90= 0.0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW R0,0094 (T7) ;BONDdata+94= 0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,0098 (T8) ;BONDdata+98= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,1274 (T9) ;BONDdata+1274= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,1278 (T0) ;BONDdata+1278= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F0,127C (T1) ;BONDdata+127C= 0.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW A3,009C (T2) ;BONDdata+9C= 2
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SW A3,29FC (T3) ;BONDdata+29FC= 2
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F0,00A0 (T4) ;BONDdata+A0= 0.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SWC1 F0,00A4 (T5) ;BONDdata+A4= 0.0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW A1,00AC (T6) ;BONDdata+AC= 1
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW R0,00D0 (T7) ;BONDdata+D0= 0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SW R0,00D8 (T8) ;BONDdata+D8= 0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F2,00DC (T9) ;BONDdata+DC= 1.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,00E0 (T0) ;BONDdata+E0= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F2,00E4 (T1) ;BONDdata+E4= 1.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F0,00E8 (T2) ;BONDdata+E8= 0.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F2,00EC (T3) ;BONDdata+EC= 1.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F0,00F0 (T4) ;BONDdata+F0= 0.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW A2,00F4 (T5) ;BONDdata+F4= -1
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW A2,00F8 (T6) ;BONDdata+F8= -1
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW R0,01C0 (T7) ;BONDdata+1C0= 0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SW R0,01C4 (T8) ;BONDdata+1C4= 0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SW R0,01C8 (T9) ;BONDdata+1C8= 0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SW A1,01CC (T0) ;BONDdata+1CC= 1
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SW R0,01D0 (T1) ;BONDdata+1D0= 0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW R0,01A0 (T2) ;BONDdata+1A0= 0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,019C (T3) ;BONDdata+19C= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F0,014C (T4) ;BONDdata+14C= 0,0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SWC1 F2,0150 (T5) ;BONDdata+150= 1.0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SWC1 F0,0154 (T6) ;BONDdata+154= 0.0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F4,0158 (T7) ;BONDdata+158= -4.0
//7F079650:
LW A0,0000 (V1) ;A0=p->cur.BONDdata
LWC1 F6,0158 (A0) ;F6=-4.0
SWC1 F6,015C (A0) ;BONDdata+15C= -4.0
LW A0,0000 (V1) ;A0=p->cur.BONDdata
LWC1 F12,015C (A0) ;F12= -4.0
C.LT.S F12,F0
NOP
BC1FL 7F07968C ;branch if -4.0 >= 0.0, which it never will be...
SWC1 F0,0160 (A0)
MTC1 AT,F8 ;F8=360.0 [43B40000]
NOP
ADD.S F10,F12,F8 ;F10=-4.0 + 360.0: 356.0
SWC1 F10,015C (A0) ;BONDdata+15C= 356.0 [43B20000]
LW A0,0000 (V1) ;A0=p->cur.BONDdata
//7F079688:
SWC1 F0,0160 (A0) ;BONDdata+160=0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
ADDIU V0,R0,00FF ;V0=FF
LUI AT,BF80
SWC1 F2,0164 (T8) ;BONDdata+164= 1.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
MTC1 AT,F12 ;F12=-1 [BF800000]
LUI AT,4170
SWC1 F0,0168 (T9) ;BONDdata+168= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
MTC1 AT,F16 ;F16=15.0 [41700000]
SWC1 F0,016C (T0) ;BONDdata+16C= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F0,0170 (T1) ;BONDdata+170= 0.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F0,0174 (T2) ;BONDdata+174= 0.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,2A4C (T3) ;BONDdata+2A4C= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SWC1 F2,0178 (T4) ;BONDdata+178= 1.0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW R0,017C (T5) ;BONDdata+17C= 0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SWC1 F0,0180 (T6) ;BONDdata+180= 0.0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F0,0184 (T7) ;BONDdata+184= 0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,0188 (T8) ;BONDdata+188= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SW R0,0104 (T9) ;BONDdata+104= 0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SW R0,0108 (T0) ;BONDdata+108= 0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SW R0,010C (T1) ;BONDdata+10C= 0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW R0,0110 (T2) ;BONDdata+110= 0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SW A1,0114 (T3) ;BONDdata+114= 1
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SW A1,0118 (T4) ;BONDdata+118= 1
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW R0,011C (T5) ;BONDdata+11C= 0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW A1,0120 (T6) ;BONDdata+120= 1
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW R0,0124 (T7) ;BONDdata+124= 0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SW A1,0128 (T8) ;BONDdata+128= 1
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,012C (T9) ;BONDdata+12C= 0.O
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SW R0,0130 (T0) ;BONDdata+130= 0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SW A2,0134 (T1) ;BONDdata+134=-1
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW A1,0138 (T2) ;BONDdata+138= 1
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,013C (T3) ;BONDdata+13C= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SW R0,0140 (T4) ;BONDdata+140= 0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW A2,0144 (T5) ;BONDdata+144=-1
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW V0,03D0 (T6) ;BONDdata+3D0= FF
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW V0,03D4 (T7) ;BONDdata+3D4= FF
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SW V0,03D8 (T8) ;BONDdata+3D8= FF
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,03DC (T9) ;BONDdata+3DC= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F12,03E0 (T0) ;BONDdata+3E0=-1.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F12,03E4 (T1) ;BONDdata+3E4=-1.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW V0,03E8 (T2) ;BONDdata+3E8= FF
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SW V0,03EC (T3) ;BONDdata+3EC= FF
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SW V0,03F0 (T4) ;BONDdata+3F0= FF
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW V0,03F4 (T5) ;BONDdata+3F4= FF
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SW V0,03F8 (T6) ;BONDdata+3F8= FF
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SW V0,03FC (T7) ;BONDdata+3FC= FF
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,0400 (T8) ;BONDdata+400= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,0404 (T9) ;BONDdata+404= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F12,018C (T0) ;BONDdata+18C=-1.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SWC1 F12,0190 (T1) ;BONDdata+190=-1.0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SWC1 F0,0194 (T2) ;BONDdata+194= 0.0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,0198 (T3) ;BONDdata+198= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SW A3,042C (T4) ;BONDdata+42C= 2
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SW R0,0430 (T5) ;BONDdata+430= 0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SWC1 F0,0204 (T6) ;BONDdata+204= 0.0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F0,0208 (T7) ;BONDdata+208= 0.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SWC1 F0,020C (T8) ;BONDdata+20C= 0.0
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,0210 (T9) ;BONDdata+210= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,0214 (T0) ;BONDdata+214= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SW R0,0218 (T1) ;BONDdata+218= 0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW R0,0220 (T2) ;BONDdata+220= 0
LW T3,0000 (V1) ;T3=p->cur.BONDdata
SWC1 F0,0224 (T3) ;BONDdata+224= 0.0
LW T4,0000 (V1) ;T4=p->cur.BONDdata
SW R0,0200 (T4) ;BONDdata+200= 0
LW T5,0000 (V1) ;T5=p->cur.BONDdata
SH R0,03B4 (T5) ;BONDdata+3B4= 0
LW T6,0000 (V1) ;T6=p->cur.BONDdata
SH R0,03B6 (T6) ;BONDdata+3B6= 0
LW T7,0000 (V1) ;T7=p->cur.BONDdata
SWC1 F16,29C0 (T7) ;BONDdata+29C0= 15.0
LW T8,0000 (V1) ;T8=p->cur.BONDdata
SH A2,2A04 (T8) ;BONDdata+2A04=-1
LW T9,0000 (V1) ;T9=p->cur.BONDdata
SWC1 F0,2A08 (T9) ;BONDdata+2A08= 0.0
LW T0,0000 (V1) ;T0=p->cur.BONDdata
SWC1 F0,2A0C (T0) ;BONDdata+2A0C= 0.0
LW T1,0000 (V1) ;T1=p->cur.BONDdata
SW R0,2A6C (T1) ;BONDdata+2A6C= 0
LW T2,0000 (V1) ;T2=p->cur.BONDdata
SW R0,2A70 (T2) ;BONDdata+2A70= 0
//7F0798A8: return
LW RA,0014 (SP)
ADDIU SP,SP,0018
JR RA
NOP
+_+
7F0A4DD0 D9900 set control style A0 to current playerdata
accepts: A0=control style
fries: V0,V1,T0,T1,T2,T3,T4,T6,T7,T8,T9,F4,F6
LUI V1,8008
ADDIU V1,V1,A0B0
LW T6,0000 (V1) ;T6=cur.BONDdata
MTC1 A0,F4
LUI T9,8005
SW A0,2A58 (T6) ;BONDdata+2A58= style
LW T7,0000 (V1) ;T7=cur.BONDdata
CVT.S.W F6,F4 ;F6=(float) style
ADDIU V0,R0,000A
SW A0,2A5C (T7) ;BONDdata+2A5C= style
LW T8,0000 (V1) ;T8=cur.BONDdata
SWC1 F6,2A60 (T8) ;BONDdata+2A60= (float) style
LB T9,84D0 (T9) ;T9=800484D0: selected language
BLEZ T9,+3 ;if english-ish, V0=A
NOP
BEQ R0,R0,+1 ;if japanese-ish, V0=E
ADDIU V0,R0,000E
//
MULTU V0,A0
LW T2,0000 (V1) ;T2=cur.BONDdata
ADDIU T3,R0,0001
MFLO T0 ;T0=style * language vertical spacing
SUBU T1,R0,T0 ;T1=0-spacing
SW T1,2A64 (T2) ;BONDdata+2A64= vertical spacing to entry
LW T4,0000 (V1) ;T4=cur.BONDdata
JR RA
SW T3,2A68 (T4) ;BONDdata+2A68=1:

View File

@ -1,225 +0,0 @@
800364D8 0x15748 12 longs, probably offsets
most likely death animations
//7F006160: determine number of entries, save to 8003650C
LUI A0,8003
ADDIU A0,A0,64D8
SLL T0,R0,0x2
ADDU T1,A0,T0
LW T3,0000 (T1) ;T3=800364D8: 000030B8, first of values
LUI V1,8003
ADDIU V1,V1,650C
SW R0,0000 (V1) ;0->8003650C: counter of values
BEQ T3,R0,7F0061A8
OR V0,R0,R0 ;V0=counter
ADDIU T4,V0,0001
//7F00618C:
SLL T2,T4,0x2
ADDU T9,A0,T2
LW T5,0000 (T9) ;retrieve value
SW T4,0000 (V1) ;save running total
OR V0,T4,R0
BNEL T5,R0,7F00618C ;keep indexing
ADDIU T4,V0,0001
//7F0061A8:
Used here when blowing a player up in multiplayer. Recalls a random entry
7F080B34: recall and use player death animation, or something like that
...
//7F080BC4:
JAL 7000A450 ;ret. V0=rand
SW V0,0044 (SP)
LUI T9,8003
LW T9,650C (T9) ;#entries
LW T8,0044 (SP)
LUI T2,8003
LUI T3,8007
DIVU T8,T9
MFHI T0
SLL T1,T0,0x2 ;T0=random entry in range
ADDU T2,T2,T1
LW T2,64D8 (T2) ;load the animation offset
LW T3,9538 (T3) ;T3=80069538: p->animation binaries
MFC1 A2,F20
BNEZ T9,7F080C08
NOP
BREAK
ANDI A1,V0,0001
LUI A3,3F80
JAL 7F08EA48
ADDU A0,T2,T3 ;final animation value
//7F08B3AC:
LUI A3,8003
LW A3,650C (A3) ;A3=#ani
OR A1,R0,R0
OR S0,R0,R0
BLEZ A3,7F08B400 ;skip if stupid
LUI T9,8003
ADDIU V0,T9,64D8 ;V0=800364D8: base for ani table
LUI V1,8007
SLL T1,A3,0x2 ;T1=entry -> offset
ADDU A0,T1,V0 ;A0=entry
LW V1,9538 (V1)
LW A2,1284 (T0) ;A2=player's cur animation; T0=playerdata
LW T2,0000 (V0)
//7F08B3E0:
ADDIU V0,V0,0004 ;span the list, looking for a hit
SLTU AT,V0,A0
ADDU T3,T2,V1
BNE A2,T3,7F08B3F8
NOP
ADDIU A1,R0,0001
//7F08B3F8:
BNEL AT,R0,7F08B3E0
LW T2,0000 (V0)
//7F08B400:
BEQ A1,R0,7F08B418
LUI AT,3F00
LW A2,1284 (T0)
MTC1 AT,F12
BEQ R0,R0,7F08B470
SW A2,009C (SP)
//7F08B418:
JAL 7000A450
SWC1 F2,0094 (SP)
LUI T4,8003
LW T4,650C (T4)
LUI T7,8003
LUI T8,8007
DIVU V0,T4
MFHI T5
SLL T6,T5,0x2
ADDU T7,T7,T6
LW T7,64D8 (T7)
LW T8,9538 (T8)
LW T0,0000 (S1)
LUI AT,3F00
ADDU T1,T7,T8
SW T1,009C (SP)
MTC1 AT,F12
LWC1 F2,0094 (SP)
BNEZ T4,7F08B46C
NOP
BREAK
LW A2,1284 (T0)
MTC1 R0,F14
NOP
SWC1 F14,008C (SP)
BEQ R0,R0,7F08B858
SWC1 F14,0088 (SP)
[minor edit so they use less and follow 0A method]
000030B8 001A
000031DC 001B
000032C8 001C
000033AC 001D
000034D4 001E
000035C8 001F
000036D8 0020
0000384C 0021
000039C0 0022
00003AF0 0023
00003C10 0024
00003D04 0025
!REVISED!
//7F006168: 0x3AC98
00004040 *SLL T0,R0,0x1
-
852B0000 *LH T3,0000 (T1)
//7F00618C: 0x3ACBC
000C5040 *SLL T2,T4,0x1
-
85EF0000 *LH T5,0000 (T9) ;retrieve value
//7F080BC4: 0xB56F4
-JAL 7000A450 ;ret. V0=rand
-SW V0,0044 (SP)
-LUI T9,8003
-LW T9,650C (T9) #entries
-LW T8,0044 (SP)
-LUI T2,8003
3C0B8003 *LUI T3,8003
53200003 BEQL T9,R0,+3
00004025 OR T0,R0,R0
0319001B DIVU T8,T9
00004010 MFHI T0
00084840 *SLL T1,T0,0x1 ;T0=random entry in range
01495021 ADDU T2,T2,T1
854A64D8 *LH T2,64D8 (T2) ;load the animation offset
000A5080 +SLL T2,T2,0x2
014B2021 ADDU A0,T2,T3 ;final animation value
4406A000 MFC1 A2,F20
-ANDI A1,V0,0001
-LUI A3,3F80
-JAL 7F08EA48
8C849D6C LW A0,9D6C (A0) ;T3=table of animation binary pointers
//7F08B3AC: 0xBFEDC
LUI A3,8003
LW A3,650C (A3) ;A3=8003650C+offset: #ani
OR A1,R0,R0
OR S0,R0,R0
BLEZ A3,7F08B400 ;skip if stupid
LUI T9,8003
ADDIU V0,T9,64D8 ;V0=800364D8: base for ani table
//7F08B3C8: 0xBFEF8
00074840 *SLL T1,A3,0x1 ;T1=entry -> offset
01222021 ADDU A0,T1,V0 ;A0=entry
27239D6C *ADDIU V1,9D6C (T9) ;V1=80029D6C: pointers to animation binaries
8D061284 LW A2,1284 (T0) ;T0=cur playerdata
844A0000 *LH T2,0000 (V0) ;T2=ani #
//7F08B3DC: 0xBFF0C
000A5080 *SLL T2,T2,0x2
*ADDIU V0,V0,0002
-SLTU AT,V0,A0
-ADDU T3,T2,V1
8D6B0000 *LW T3,0000 (T3)
50CB0001 *BEQL A2,T3,7F08B3F8
-ADDIU A1,R0,0001
//7F08B3F8: 0xBFF28
5420FFF8 *BNEL AT,R0,7F08B3DC
844A0000 *LH T2,0000 (V0)
//7F08B400:
BEQ A1,R0,7F08B418
LUI AT,3F00
LW A2,1284 (T0)
MTC1 AT,F12
BEQ R0,R0,7F08B470
SW A2,009C (SP)
//7F08B418: 0xBFF48
JAL 7000A450
SWC1 F2,0094 (SP)
3C188003 *LUI T8,8003
8F0C650C *LW T4,650C (T8)
59800003 *BLEZL T4,+3
00006825 *OR T5,R0,R0
004C001B -DIVU V0,T4
00006810 -MFHI T5
000D7040 *SLL T6,T5,0x1 ;offset in table
030E7821 *ADDU T7,T8,T6
85EF64D8 *LH T7,64D8 (T7) ;T7=ani#
000F7880 *SLL T7,T7,0x2
8E280000 -LW T0,0000 (S1) ;T0=specific playerdata
3C013F00 -LUI AT,3F00
01F84821 -ADDU T1,T7,T8
8D299D6C *LW T1,9D6C (T1) ;80029D6C+
AFA9009C SW T1,009C (SP)
44816000 MTC1 AT,F12
C7A20094 LWC1 F2,0094 (SP)
00000000 -NOP
00000000 *NOP
LW A2,1284 (T0)
MTC1 R0,F14
NOP
SWC1 F14,008C (SP)
BEQ R0,R0,7F08B858
SWC1 F14,0088 (SP)

View File

@ -1,238 +0,0 @@
cuff value pulled from setup in 7F005C3C
stored to player data +0x41C
summary of below.
Note that the characters below were identified from the various hand models. The list should be accurate.
Also, although model numbers differ, heads 4A, 4B, 4C are identical. 4D is unused
Cuff 0 Blue suit (default values when not otherwise set)
body: 0xAE8C7 default: 17
head: 0xAE8CB default: 4B
Cuff 1 Brosnan (mp)
body: 0xAE957 default: 05
head: 0xAEA3F default: 4E
Cuff 2 Jungle camo
body: 0xAE93F default: 18
head: 0xAEA33 default: 4C
Cuff 3 Boiler suit
body: 0xAE933 default: 16
head: 0xAEA27 default: 4A
Cuff 4 Snowsuit
body: 0xAE94B default: 19
head: 0xAE8CB default: 4B [shared with bluesuit]
Cuff 5 Connery
body: 0xAE963 default: 05
head: 0xAEA4B default: 4E
Cuff 6 Moore
body: 0xAE96F default: 05
head: 0xAEA57 default: 4E
Cuff 7 Dalton
body: 0xAE97B default: 05
head: 0xAEA63 default: 4E
Cuff 8 Variable Bonds
body: 0xAE98B default: 05
head: 0xAEA6F default: 4E
Patch to allow snowsuit it's own head entry:
AEA24:
100000xx BEQ R0,R0,
240D004A ADDIU T5,R0,004A
//+4 to normal address
100000xx BEQ R0,R0,
240D004C ADDIU T5,R0,004C
//new snowsuit
100000xx BEQ R0,R0,
240D004B ADDIU T5,R0,004B
//change registers for entry only
0xA3AED 0D
0xAEA45
AD
RESULT:
AEA24 000E 10000006 240D004A 10000004 240D
AEA37 0007 02240D00 4B240D
AEA45 0001 AD
in 21990:
change entry 2 to 7F079EFC, entry 4 to 7F079F04
34282
0002 9EFC
3428B 0001 04
-----------
note: bluesuit is default; values initilaized at 7F079D94 (body, head)
recalled @ 7F079DD4:
LUI T7,8008
LW T7,A0B0 (T7)
LW V1,041C (T7) //cuff for player
SLTIU AT,V1,0009 //must be 0-8
BEQ AT,R0,7F079EA4 //skip recall when invalid
SLL T3,V1,0x2 //T3=cuff->offset
LUI AT,8005
ADDU AT,AT,T3
LW T3,4FE4 (AT) //80054FE4: pull TLB pointer for routine setting body model for each
JR T3
NOP
7F079E00: 3-boiler suit
ADDIU T2,R0,0016
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E0C: 2-jungle bond
ADDIU T2,R0,0018
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E18: 4-snowsuit bond
ADDIU T2,R0,0019
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E24: 1-Brosnan Tux (from multiplayer)
ADDIU T2,R0,0005
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E30: 5-Connery Tux (according to cuff images)
ADDIU T2,R0,0005
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E3C: 6-Moore Tux (according to cuff images)
ADDIU T2,R0,0005
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E48: 7-Dalton Tux (according to cuff images)
ADDIU T2,R0,0005
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
7F079E54: 8-variable bond heads, based off selection on folder screen; defaults to 05/4E
BEQ V0,R0,7F079E88
ADDIU T3,R0,0005
ADDIU AT,R0,0001
BEQ V0,AT,7F079E90 //V0=selected Bond
ADDIU T2,R0,0005
ADDIU AT,R0,0002
BEQ V0,AT,70F79E98
ADDIU T4,R0,0005
ADDIU AT,R0,0003
BEQ V0,AT,7F079EA0
ADDIU T9,R0,0005
BEQ R0,R0,7F079EA4
NOP
//7F079E88:
BEQ R0,R0,7F079EA4
SW T3,0044 (SP)
//7F079E90:
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
//7F079E98:
BEQ R0,R0,7F079EA4
SW T4,0044 (SP)
SW T9,0044 (SP)
7F079EA4:
BEQ V0,R0,7F079ED8 //take branch on solo, setting head
SLTIU AT,V1,0009
//7F079EAC: MP only routine retrieving head based on player number
ADDIU AT,R0,0001
BEQ V0,AT,7F079F48
ADDIU T8,R0,004E //default head - Brosnan Tux
ADDIU AT,R0,0002
BEQ V0,AT,7F079F50
ADDIU T5,R0,004E
ADDIU AT,R0,0003
BEQ V0,AT,7F079F58
ADDIU T6,R0,004E
BEQ R0,R0,7F079F84
NOP
//7F079ED8: pull head using cuff value
BEQ AT,R0,7F079F84
SLL T8,V1,0x2
LUI AT,8005
ADDU AT,AT,T8
LW T8,5008 (AT)
JR T8
NOP
7F079EF4: 3-boiler bond head
ADDIU T5,R0,004A
BEQ R0,R0,7F079F84
SW T5,0040 (SP)
7F079F00: 2-jungle bond head
ADDIU T6,R0,004C
BEQ R0,R0,7F079F84
SW T6,0040 (SP)
7F079F0C: 1-Bronsnan Tux head (from multiplayer)
ADDIU T7,R0,004E
BEQ R0,R0,7F079F84
SW T7,0040 (SP)
7F079F18: 5-Connery Tux head (according to cuff images)
ADDIU T3,R0,004E
BEQ R0,R0,7F079F84
SW T3,0040 (SP)
7F079F24: 6-Moore Tux (according to cuff images)
ADDIU T2,R0,004E
BEQ R0,R0,7F079F84
SW T2,0040 (SP)
7F079F30: 7-Dalton Tux (according to cuff images)
ADDIU T4,R0,004E
BEQ R0,R0,7F079F84
SW T4,0040 (SP)
7F079F3C: 8-Variable Body
ADDIU T9,R0,004E
BEQ R0,R0,7F079F84
SW T9,0040 (SP)
7F079F48: mp player 2
BEQ R0,R0,7F079F84
SW T8,0040 (SP)
//7F079F50: mp player 3
BEQ R0,R0,7F079F84
SW T5,0040 (SP)
//7F079F58: mp player 4
BEQ R0,R0,7F079F84
SW T6,0040 (SP)
//7F079F60: this bugger looks like the routine that pulls specific MP character body/heads
JAL 7F09B150
NOP
JAL 7F0102BC
OR A0,V0,R0
JAL 7F09B150
SW V0,0040 (SP)
JAL 7F01035C
OR A0,V0,R0
SW V0,0044 (SP)
7F079F84:
LUI T7,8003
LW T7,6494 (T7) //CURRENT MODE (intro camera, 1st person, etc)
ADDIU AT,R0,0003 //testing for swirl
BNE T7,AT,7F079FA0
LUI T3,8008
LW T3,99E0 (T3) //800799E0:
SW T3,0048 (SP)
//7F079FA0: think this disables 1st person display
JAL 7F09A464 //V0=#players
NOP
ADDIU AT,R0,0001
BNE V0,AT,7F07A1BC
LW T7,0044 (SP)
JAL 7F05CF5C //clear left gun
ADDIU A0,R0,0001
JAL 7F05CF5C //clear right gun
OR A0,R0,R0
//7F079FC4:
etc...

View File

@ -1,20 +0,0 @@
Object embedded in 21990: player gait
OBJ TABLE 8003C580 1B7F0:
00 01 0000 8003C5E0 00000000 00000000 00000000 8003C598
00 02 0000 8003C5F0 8003C580 00000000 00000000 8003C5B0
00 02 0000 8003C60C 8003C598 00000000 00000000 8003C5C8
00 02 0000 8003C628 8003C5B0 00000000 00000000 00000000
01 object 8003C5E0 1B850
00000001 8003C598 00000000 00000000
02 position 8003C5F0 1B860 static player position
00000000 00000000 00000000 0001 0002 FFFF FFFF 8003C5B0 00000000
02 position 8003C60C 1B87C x gait
3F96C81D 422493D6 00000000 0002 0003 FFFF FFFF 8003C5C8 00000000
02 position 8003C628 1B898 z gait
C024DDA0 43F036EA 00000000 0003 0000 FFFF FFFF 00000000 00000000

View File

@ -1,564 +0,0 @@
7F079CF0-7F07A4A0 solo character load
ADDIU SP,SP,FEE8
SW RA,001C (SP)
JAL 7F089EE4
NOP
LUI T6,8008
LW T6,A0B0 (T6)
SWC1 F0,0114 (SP)
LW T7,00A8 (T6)
LW V0,0004 (T7)
BNEL V0,R0,7F07A440
LW T7,001C (V0)
JAL 7F05CF30
OR A0,R0,R0
SW V0,00F0 (SP)
JAL 7F05CF30
ADDIU A0,R0,0001
SW V0,00EC (SP)
SW R0,00E8 (SP)
JAL 7F05CF48
OR A0,R0,R0
SW V0,00E4 (SP)
JAL 7F05CF48
ADIU A0,R0,0001
//7F079D4C: copy a generic 08 PP7 to stack... this section extroneous
LUI T9,8003
ADDIU T9,T9,65AC ;T9=800265AC: a copy of a 08 PP7 object from the 21990 binary
SW V0,00E0 (SP)
ADDIU T4,T9,0084
ADDIU T8,SP,0054
//7F079D60: iterate to copy yo
LW AT,0000 (T9)
ADDIU T9,T9,000C
ADDIU T8,T8,000C
SW AT,FFF4 (T8)
LW AT,FFF8 (T9)
SW AT,FFF8 (T8)
LW AT,FFFC (T9)
BNE T9,T4,7F079D60
SW AT,FFFC (T8)
//7F079D84:
LW AT,0000 (T9)
OR A0,R0,R0 ;A0=right hand
JAL 7F05DA44 ;ret. V0=ammo in wep.
SW AT,0000 (T8)
ADDIU T5,R0,0017 ;default body
ADDIU T6,R0,004B ;default head
LUI A0,8008
SW V0,0048 (SP)
SW T5,0044 (SP)
SW T6,0040 (SP)
SW R0,0038 (SP)
JAL 7F07DE64
LW A0,A0B0 (A0)
JAL 7F09A464 ;returns V0=#players
NOP
ADDIU AT,R0,0001
BNE V0,AT,7F079F60 ;branch if multi!
NOP
JAL 7F01D56C ;WOULD HAVE RETURNED V0=folder#
ADDIU SP,SP,FFE8
SW RA,0014 (SP)
LUI A0,8003
JAL 7F01EBC0
SW A0,0000 (SP)
JR RA
OR V0,R0,R0
LW A0,A8E8 (A0)
LW RA,0014 (SP)
JR RA
NOP
NOP
//7F079DD4: solo bodies
LUI T7,8008
LW T7,A0B0 (T7)
LW V1,041C (T7) ;V1=cuff
SLTIU AT,V1,0009
BEQ AT,R0,7F079EA4 ;skip if not a valid cuff
SLL T3,V1,0x2
LUI AT,8005
ADDU AT,AT,T3
LW T3,4FE4 (AT)
JR T3
NOP
//7F079E00:
ADDIU T2,R0,0016
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
//7F079E0C:
ADDIU T4,R0,0018
BEQ R0,R0,7F079EA4
SW T4,0044 (SP)
//7F079E18:
ADDIU T9,R0,0019
BEQ R0,R0,7F079EA4
SW T9,0044 (SP)
//7F079E24:
ADDIU T8,R0,0005
BEQ R0,R0,7F079EA4
SW T8,0044 (SP)
//7F079E30:
ADDIU T5,R0,0005
BEQ R0,R0,7F079EA4
SW T5,0044 (SP)
//7F079E3C:
ADDIU T6,R0,0005
BEQ R0,R0,7F079EA4
SW T6,0044 (SP)
//7F079E48:
ADDIU T7,R0,0005
BEQ R0,R0,7F079EA4
SW T7,0044 (SP)
//7F079E54: choose one of four bond models!
BEQ V0,R0,7F079E88
ADDIU T3,R0,0005
ADDIU AT,R0,0001
BEQ V0,AT,7F079E90
ADDIU T2,R0,0005
ADDIU AT,R0,0002
BEQ V0,AT,7F079E98
ADDIU T4,R0,0005
ADDIU AT,R0,0003
BEQ V0,AT,7F079EA0
ADDIU T9,R0,0005
BEQ R0,R0,7F079EA4
NOP
//7F079E88:
BEQ R0,R0,7F079EA4
SW T3,0044 (SP)
//7F079E90:
BEQ R0,R0,7F079EA4
SW T2,0044 (SP)
//7F079E98:
BEQ R0,R0,7F079EA4
SW T4,0044 (SP)
//7F079EA0:
SW T9,0044 (SP)
//7F079EA4:
BEQ V0,R0,7F079ED8
SLTIU AT,V1,0009
ADDIU AT,R0,0001
BEQ V0,AT,7F079F48
ADDIU T8,R0,004E
ADDIU AT,R0,0002
BEQ V0,AT,7F079F50
ADDIU T5,R0,004E
ADDIU AT,R0,0003
BEQ V0,AT,7F079F58
ADDIU T6,R0,004E
BEQ R0,R0,F7079F84
NOP
//7F079ED8: solo heads
BEQ AT,R0,7F079F84
SLL T8,V1,0x2
LUI AT,8005
ADDU AT,AT,T8
LW T8,5008 (AT)
JR T8
NOP
//7F079EF4:
ADDIU T5,R0,004A
BEQ R0,R0,7F079F84
SW T5,0040 (SP)
//7F079F00:
ADDIU T6,R0,004C
BEQ R0,R0,7F079F84
SW T6,0040 (SP)
//7F079F0C:
ADDIU T7,R0,004E
BEQ R0,R0,7F079F84
SW T7,0040 (SP)
//7F079F18:
ADDIU T3,R0,004E
BEQ R0,R0,7F079F84
SW T3,0040 (SP)
//7F079F24:
ADDIU T2,R0,004E
BEQ R0,R0,7F079F84
SW T2,0040 (SP)
//7F079F30:
ADDIU T4,R0,004E
BEQ R0,R0,7F079F84
SW T4,0040 (SP)
//7F079F3C:
ADDIU T9,R0,004E
BEQ R0,R0,7F079F84
SW T9,0040 (SP)
//7F079F48:
BEQ R0,R0,7F079F84
SW T8,0040 (SP)
//7F079F50:
BEQ R0,R0,7F079F84
SW T5,0040 (SP)
//7F079F58:
BEQ R0,R0,7F079F84
SW T6,0040 (SP)
//7F079F60: multiplayer bodies/heads
JAL 7F09B150
NOP
JAL 7F01035C
OR A0,V0,R0
JAL 7F09B150
SW V0,0044 (SP)
JAL 7F0102BC
OR A0,V0,R0
SW V0,0040 (SP)
//7F079F84:
LUI T7,8003
LW T7,6494 (T7)
ADDIU AT,R0,0003
BNE T7,AT,7F079FA0
LUI T3,8008
LW T3,99E0 (T3)
SW T3,0048 (SP)
//7F079FA0: load and initialize solo character
JAL 7F09A464 ;ret. V0=#players
NOP
ADDIU AT,R0,0001
BNE V0,AT,7F07A1BC ;branch if multi
LW T7,0044 (SP)
JAL 7F05CF5C ;clear left hand
ADDIU A0,R0,0001
JAL 7F05CF5C ;clear right hand
OR A0,R0,R0
//7F079FC4: copy data for body to playerdata and obj. instance
ADDIU A0,SP,0100
LW A1,00EC (SP)
JAL 7F0CBAF4
ADDU V0,A1,A2
SW A1,0000 (A0) ;??? POINTER
SW V0,0004 (A0) ;??? pointer + 0x14820
SW A1,0008 (A0)
JR RA
SW V0,000C (A0)
LW A2,00E0 (SP)
JAL 7F05CF18 ;returns V0=address of one of the obj.headers
LUI T6,8008
LW T6,A0B0 (T6)
SLL T7,A0,0x5
ADDU V0,T6,T7
JR RA
ADDIU V0,V0,0810
OR A0,R0,R0
LW T2,0044 (SP) ;T2=body
//7F079FE0:
LUI T9,8004
ADDIU T9,T9,DE10
SLL T4,T2,0x2 ;change to SLL, T4,T2,0x1 for mini table
ADDU T4,T4,T2
SLL T4,T4,0x2
ADDU V1,T4,T9
LW T8,0000 (V1) ;T8=body obj.header
SW V0,00FC (SP)
ADDIU T3,SP,0100
LW AT,0000 (T8) ;copy obj.header to 0x810 in playerdata!
OR A0,V0,R0
SW AT,0000 (V0)
LW T7,0004 (T8)
SW T7,0004 (V0)
LW AT,0008 (T8)
SW AT,0008 (V0)
LW T7,000C (T8)
SW T7,000C (V0)
LW AT,0010 (T8)
SW AT,0010 (V0)
LW T7,0014 (T8)
SW T7,0014 (V0)
LW AT,0018 (T8)
SW AT,0018 (V0)
LW T7,001C (T8)
SW T7,001C (V0)
SW V1,0028 (SP) ;save body's table entry pointer
SW T3,0010 (SP) ;save SP+0x100
//7F07A050: prep the object for load, filling header and such
LW A3,00E4 (SP) ;0x14820, same as SP+0xE0. could be a memory total...
LW A2,00F0 (SP) ;immediately after an object, so pointer to next, or instance?
JAL 7F0764A4 ;loads object and fills in the header data
LW A1,0004 (V1) ;A1=body's string pointer
LW V1,0028 (SP) ;V1=body's table entry pointer
JAL 7F0BD188 ;please pretty please tell me this isn't the decompressor...
LW A0,0004 (V1) ;A0=body's string pointer
//7F07A06C: copy data for body to playerdata and obj. instance
LW T5,0040 (SP) ;T5=head#
LUI T7,8004
ADDIU T7,T7,DE10
SLL T8,T5,0x2 ;for smaller table change to SLL T8,T5,0x1
ADDU T8,T8,T5
SLL T8,T8,0x2
ADDU V1,T8,T7
LW T3,0000 (V1) ;T3=head's obj.header
ADDIU T0,V0,003F ;T0=V0+0x3F V0=size of last model+0x3F - here, body
LW T1,00F0 (SP) ;T1=pointer to body's model in rdram
ORI T2,T0,003F
LW AT,0000 (T3) ;AT=offset to object table if already loaded...
XORI T4,T2,003F ;T4=size pushed to the 0x40 boundry
ADDIU T0,T4,005F
ORI T9,T0,003F
ADDU A0,T1,T4 ;A0=end of last object, start of next
XORI T0,T9,003F ;T0=size + 0x40, pushed to 0x40 boundry (T4+0x40)
SW AT,0000 (A0)
LW T9,0004 (T3) ;copy obj.header to this crazy address
ADDIU T5,SP,0100
ADDU A2,T1,T0 ;A2=location for next model binary
SW T9,0004 (A0)
LW AT,0008 (T3)
SW AT,0008 (A0)
LW T9,000C (T3)
SW T9,000C (A0)
LW AT,0010 (T3)
SW AT,0010 (A0)
LW T9,0014 (T3)
SW T9,0014 (A0)
LW AT,0018 (T3)
SW AT,0018 (A0)
LW T9,001C (T3)
SW T9,001C (A0)
LW T6,00E4 (SP) ;T6=max size? 14820
SW T0,00E8 (SP) ;T0=size of model in rdram
SW A0,00F8 (SP)
SW V1,0028 (SP)
SW T5,0010 (SP)
LW A1,0004 (V1) ;A1=pointer to head string [V1=head table entry]
JAL 7F0764A4 ;loads object and fills in header data
SUBU A3,T6,T0 ;A3=amount of available memory left (14820-body size)
LW V1,0028 (SP) ;V1=head table entry
JAL 7F0BD188 ;ret. V0=size of object in rdram expansion?
LW A0,0004 (V1) ;A0=pointer to head string
//7F07A120:
LW V1,00E8 (SP) ;V1=body size
LW T4,00F0 (SP) ;T4=pointer to body model in rdram
LW A0,00FC (SP) ;A0=playerdata + 0x810
ADDU V1,V0,V1 ;V1=update amount of memory already cluttered
ADDIU V1,V1,003F
ORI T8,V1,003F
XORI T7,T8,003F
ADDIU V1,T7,00FB
ORI T3,V1,003F
XORI T9,T3,003F ;T9=total used memory pushed to 0x40 boundry
ADDU T2,T4,T7 ;T2=start of next model
SW T2,0038 (SP) ;save next model location
JAL 7F075CF4 ;prep body for use?
SW T9,00E8 (SP) ;save total used memory
JAL 7F075CF4 ;prep head for use; set use flag, compute group numbers
LW A0,00F8 (SP) ;A0=pointer to a copy of head's header in model data area
//7F07A160:
LW A1,00FC (SP) ;A1=body header in playerdata
LW T7,00F8 (SP) ;T7=copy of head's header in model data
LW V1,00E8 (SP) ;V1=total used memory
LH T8,0014 (A1) ;T8=body's group # (61 if head not present)
LH T4,0014 (T7) ;T4=head's group # (2 if head)
LW T6,00F0 (SP) ;T6=body model in rdram
LW A0,0038 (SP) ;A0=next object!
ADDU V0,T8,T4 ;V0=sum of groupcodes (should be 63 for characters)
ADDIU V0,V0,000A ;offset for the space made to copy header, etc
SLL T2,V0,0x2 ;multiply by 4...
ADDU A2,T6,V1 ;A2=next object's address
ADDU V1,T2,V1 ;total memory used + group codes->offset
ADDIU V1,V1,003F
ORI T3,V1,003F
XORI T9,T3,003F ;total ushed to 0x40 boundry
SW T9,00E8 (SP) ;save it yo
JAL 7F075FAC
SW V0,0030 (SP) ;save group# + A
LW V0,0030 (SP)
LW T6,0038 (SP) ;save object instance pointer
SH V0,0002 (T6)
BEQ R0,R0,7F07A234
LW A3,00F8 (SP) ;A3=head's header copied to model area in rdram
//7F07A1BC: load and initialize multi character
SLL T8,T7,0x2 ;for smaller table use SLL T8,T7,0x1
ADDU T8,T8,T7
LUI T4,8004
ADDIU T4,T4,DE10
SLL T8,T8,0x2
ADDU V1,T8,T4
LW T2,0000 (V1)
SW T2,00FC (SP)
LW T9,0000 (T2)
OR A0,T2,R0
BNEL T9,R0,7F07A1F8
LW T5,0040 (SP)
JAL 7F07654C
LW A1,0004 (V1)
LW T5,0040 (SP)
LUI T7,8004
ADDIU T7,T7,DE10
SLL T6,T5,0x2 ;for smaller table use SLL T6,T5,0x1
ADDU T6,T6,T5
SLL T6,T6,0x2
ADDU V1,T6,T7
LW A3,0000 (V1)
LW T8,0000 (A3)
OR A0,A3,R0
BNEL T8,R0,7F07A238
LW T4,0038 (SP)
LW A1,0004 (V1)
JAL 7F07654C
SW A3,00F8 (SP)
LW A3,00F8 (SP) ;A3=head's header copied to model area in rdram
//7F07A234:
LW T4,0038 (SP) ;T4=object instance pointer!
LW A0,0044 (SP) ;A0=body#
LW A1,0040 (SP) ;A1=head#
LW A2,00FC (SP) ;A2=copy of body header in playerdata (+0x810)
SW R0,0010 (SP)
JAL 7F0232E8 ;returns V0=obj. instance pointer, filled and everything
SW T4,0014 (SP)
LUI V1,8008
ADDIU V1,V1,A0B0
LW T2,0000 (V1) ;T2=playerdata
LUI AT,8005
SW V0,00D4 (T2) ;save obj. instance pointer!
LW T9,0000 (V1) ;T9=playerdata
LWC1 F6,502C (AT) ;F6=8005502C: ???
LW A0,00D4 (T9) ;A0=obj. instance pointer
LWC1 F4,0014 (A0) ;F4=object scale
MUL.S F8,F4,F6
MFC1 A1,F8
JAL 7F06CE78 ;save converted scale
NOP
//7F07A284: handle player position
LUI V1,8008
LW V1,A0B0 (V1)
LW A3,0114 (SP)
LW A0,00A8 (V1) ;A0=obj. position pointer (8006)
LW A1,00D4 (V1) ;A1=obj. instance pointer
LW T3,0014 (A0) ;T3=room pointer
SW R0,0014 (SP)
ADDIU A2,A0,0008 ;A2=offset to xyz positions
JAL 7F0200BC ;copies positions or adjusts them or something
SW T3,0010 (SP)
//7F07A2AC:
LUI A3,8008
ADDIU A3,A3,A0B0
LW T6,0000 (A3) ;T6=playerdata
ADDIU T5,R0,0006
LW T7,00A8 (T6) ;T7=obj. position pointer (8006)
SB T5,0000 (T7) ;type specify to 6 (character)
LW T8,0000 (A3)
LW T4,00A8 (T8) ;T4=p->obj. pos
LW A2,0004 (T4) ;A2=p->guarddata
LW T2,0014 (A2) ;T2='guard' bitflags
ORI T9,T2,0001
SW T9,0014 (A2) ;uhm, it can't have just set sunglasses on...
LW V1,0000 (A3) ;V1=playerdata
LW A1,00A8 (V1) ;A1=p->obj. pos
LW A0,00D4 (V1) ;A0=obj. instance
SW A2,0110 (SP) ;save guarddata pointer
JAL 7F06CC0C
ADDIU A1,A1,0008 ;A1=offset to xyz position
//7F07A2F4:
LUI T3,8008
LW T3,A0B0 (T3)
LW A1,0114 (SP)
JAL 7F06CD3C
LW A0,00D4 (T3) ;A0=obj. instance
JAL 7F09B244 ;ret. V0=3rd person model based on the item# used
LW A0,0048 (SP) ;weapon (1-0x20)
BLTZ V0,7F07A428 ;returns model for selected weapon
SW V0,004C (SP) ;save it yo
JAL 7F09A464 ;returns # players
NOP
ADDIU AT,R0,0001
BNE V0,AT,7F07A3FC ;branch if multiplayer
LW T6,00F0 (SP) ;T6=body model
//7F07A32C:
LW V0,00E8 (SP) ;V0=memory consumed by the character+data
ADDIU A0,R0,0001
ADDU T5,T6,V0 ;T5=end of character data
ADDIU V0,V0,00C7
ORI T7,V0,003F
XORI T8,T7,003F
SW T5,00DC (SP) ;save endpoint
JAL 7F05CF18 ;returns, in this case, playerdata + 0x830
SW T8,00E8 (SP) ;effectively, size - 0x40
LW T4,004C (SP) ;T4=3rd person object in hand
LUI T9,8004
ADDIU T9,T9,A228 ;object,header,&scale table
SLL T2,T4,0x2
SUBU T2,T2,T4
SLL T2,T2,0x2
ADDU V1,T2,T9
LW T3,0000 (V1) ;header for object
SW V0,00F4 (SP)
ADDIU T5,SP,0100
LW AT,0000 (T3) ;copy weapon header to playerdata
OR A0,V0,R0
SW AT,0000 (V0)
LW T7,0004 (T3)
SW T7,0004 (V0)
LW AT,0008 (T3)
SW AT,0008 (V0)
LW T7,000C (T3)
SW T7,000C (V0)
LW AT,0010 (T3)
SW AT,0010 (V0)
LW T7,0014 (T3)
SW T7,0014 (V0)
LW AT,0018 (T3)
SW AT,0018 (V0)
LW T7,001C (T3)
SW T7,001C (V0)
LW T4,00E8 (SP) ;T4=memory consumed
LW T2,00E4 (SP) ;T2=max memory
LW T8,00F0 (SP) ;T8=body model (start of this clump)
SW V1,0028 (SP) ;save p->weapon's table entry
SW T5,0010 (SP) ;save SP+0x100
LW A1,0004 (V1) ;A1=model's string
SUBU A3,T2,T4 ;A3=room left
JAL 7F0764A4 ;loads object and fills in header data
ADDU A2,T8,T4 ;A2=address for next model data
LW V1,0028 (SP) ;V1=p->weapon's table entry
JAL 7F0BD188 ;load or expand or whatnot
LW A0,0004 (V1) ;A0=model's string
JAL 7F075CF4 ;set object in use
LW A0,00F4 (SP)
BEQ R0,R0,7F07A408
LW T6,00DC (SP) ;T6=endpoint
//7F07A3FC:
SW R0,00DC (SP)
SW R0,00F4 (SP)
LW T6,00DC (SP)
//7F07A408:
LW T3,00F4 (SP) ;T3=weapon header in playerdata
LW A0,0110 (SP) ;A0=guardata
LW A1,004C (SP) ;A1=3rd person weapon#
LW A2,0048 (SP) ;A2=weapon type (ie. 5=silpp7)
OR A3,R0,R0
SW T6,0010 (SP) ;save model endpoint
JAL 7F052214 ;returns V0=obj. position entry for weapon
SW T3,0014 (SP) ;save weapon header in playerdata
//7F07A428:
LW A0,0110 (SP) ;A0=guarddata
JAL 7F023A94
ADDIU A1,R0,0000
BEQ R0,R0,7F07A494
LW RA,001C (SP)
//7F07A43C: Multi!
LW T7,001C (V0)
OR A0,V0,R0
LW T8,0020 (T7)
BNEL T8,R0,7F07A494
LW RA,001C (SP)
LW T4,0014 (V0)
ADDIU A1,R0,0000
ORI T2,T4,0001
JAL 7F023A94
SW T2,0014 (V0)
LUI V1,8008
LW V1,A0B0 (V1)
LW A1,00A8 (V1)
LW A0,00D4 (V1)
JAL 7F06CC0C
ADDIU A1,A1,0008
LUI T9,8008
LW T9,A0B0 (T9)
LW A1,0114 (SP)
JAL 7F06CD3C
LW A0,00D4 (T9)
LW RA,001C (SP)
//7F07A494:
ADDIU SP,SP,0118
JR RA
NOP

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7001385C: copy part of decompression
The tile advance offset address can be changed. The routine can be rewritten a bit, changing 7F0B2FB8:
SLL T8,T6,0x3
ADDIU T8,T8,0008
000EC0C0
27180008
ALSO DO 7F0B2ED4:
SLL T5,T3,0x3
ADDIU T5,T5,0008
Otherwise, you could just change the value on line 7F0B2F6C (0xE7A9C in rom) to '24C60F49', then change the values in 21990 @ 0x201BC to '20283038 40485058 60687078'. That would support up to 14 point tiles.
7F0B2FAC:
LH V1,0006 (V0) //V1=tile's special
SRA T5,V1,0xC //T5=#points
ANDI T6,T5,000F //T6=#points (limit of 15)
ADDU T7,A2,T6 //T7=80040F4C+#points
LBU T8,0000 (T7) //T8=offset for given number of points
ADDU V0,T8,V0 //V0=address for next tile
LW T9,0000 (V0) //T9=p-for next tile
BNEL T9,R0,7F0B2FAC
SW V0,0000 (A1) //current tile address->80040F60
JR RA
SW A0,0000 (T0) //address for start of clipping file->8007B120
7F0AF144:
LH S0,0006 (A0) //S0=tile's special
SLL T7,A2,0x2 //T7=room# * 4
SUBU T7,T7,A2 //T7=room# * 3
SRA T9,S0,0xC //T9=#points
ANDI S0,T9,000F //S0=#points (limit of 15)
BLEZ S0,7F0AF1D4
OR S1,A0,R0 //S1=address of tile

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Clipping Files - 1172 (z-custom) compressed binaries
--------------
Clipping files outline the area players and objects can validly be located. In addition, they also set the spectral lighting for a given region. The clipping file is composed of tiles, each of which is a 3-10 sided polygon. The format supports up to 15-sided forms, but these can not be processed without patching the handling routine.
The start of the file itself consists of a series of offsets. The first is always NULL, technically linked to a removed TLB routine but of no use nowadays. The second always points to the first tile in the list, and must do so; it is used as the basis of all the connection values described below.
Further offsets can be included if desired but are not used at runtime. Rare typically used these to indicate tiles belonging to removed rooms. One NULL offset indicates the end of the file offset section.
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
Tile headers are the first 8 bytes of the tile data. They contain a specific 3-byte selection ID, the room ID that appears when a player or object is on the tile, the colour of the light on the tile, and other flags indicating the attributes of the polygon data.
The first three bytes act as a unique tile ID. They are converted to a textual format in setup files and used to look up the tile in the list, linking object positions to unique areas in the stage. The text appears as:
"P" + first two values of header as unsigned decimal value + third byte alpha-numeric value
The first two bytes of the header are an unsigned short integer, converted to decimal form. The third byte is a alpha-numeric string based on this format:
a 00
a1 01
a2 02
a3 03
a4 04
a5 05
a6 06
a7 07
b 08
b1 09
b2 0A
b3 0B
b4 0C
b5 0D
b6 0E
b7 0F
etc.
The highest values used in the release game were "p#", 78-7F. The physical limit is "z#", C8-CF.
As an example, here are some textual strings and their corresponding header values.
Header string
014E 02 "p334a2"
0070 1A "p112d2"
0494 0A "p1148b2"
The last three nibbles all indicate points in the tile. These three points are the three extremes of the tile. If you were to circumscribe the polygon, using these three points would contain either the entire form or the largest portion of it. They are actually used for radial triangle generation, which is beyond the scope of this document. Suffice it to say, this should make a triangle that encompasses most of the tile within it.
These values will always be 012 for a triangle, as the first, second, and third points will invariably be at the furthest extremes. Most quads tend to be rectangular, so either 012 or 013 may be used.
---------------
X, Y, and Z positions are signed short values relative to the center of the stage. Points in each tile are expected to be counter-clockwise. Each face, or series of two points, also has a connection value. If set to 0000, the player can not walk past that edge of the tile. If set to some other value, this creates a link to another tile in the file.
Connection values start at 0010, as the initial offset to clipping data is offset by 0x80. To determine the connection value of a given tile, take the current file offset of that tile's header, subtract the initial offset of the first tile, add an additional 0x80 to account for the offset, then divide the result by 8.
This example retrieves the connection value to link to a tile at offset 0x20C, assuming the first tile starts at 0xC.
*subtract initial from target:
0x20C-0xC = 0x200
*add 0x80, the initial offset for all tiles:
0x200-0x80 = 0x280
*divide by 8 for the final offset:
0x280/8 = 0x0050
The final offset is 0x0050.
It is very important the Room # matches that of the room to be visualized. Otherwise, objects in the room will not appear unless that room is currently loaded, and players in the room will disappear until stepping on another tile. Since it affects the one room which should be visible, do not allow tiles to cross portals!
--------------
Header Format:
FFFFFF00 00000000 3-byte selection ID
000000FF 00000000 Room # (1-FF)
00000000 30000000 special attribute
0 normal tile
1 kneeling
3 ladder
00000000 0F000000 4-bit Red lighting component
00000000 00F00000 4-bit Green lighting component
00000000 000F0000 4-bit Blue lighting component
00000000 0000F000 number points in tile (3-F)
00000000 00000F00 extreme point 1
00000000 000000F0 extreme point 2
00000000 0000000F extreme point 3
Point Format:
FFFF0000 00000000 X position
0000FFFF 00000000 y position
00000000 FFFF0000 Z position
00000000 0000FFFF connection value
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
The list of tiles ends with a NULL tile header. This is typically followed by the string "unstrict" and extended to 0x20 bytes. This ensures that the routine does not break on a read of 0 points, as all tiles 0-3 points are expected to contain 0x20 data total.
-Zoinkity

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@ -1,50 +0,0 @@
7F0B2F2C: E7A5C determines endpoint of clipping file
accepts: A0=p->clipping file, A1=?, A2=?
LUI T0,8008
ADDIU T0,T0,B120 ;T0=8007B120: table of pointers to room tiles
SW A0,0000 (T0) ;A0->8007B120: save start of file
LW T6,0004 (A0) ;T6=A0+4: p->first room
SUBU V0,A2,A1
LUI AT,8004
ADDU T7,T6,V0
ADDIU T8,T7,FF80 ;T8=T7-0x80: base pointer for connection values
SW T8,0F58 (AT) ;T8->80040F58: save base pointer for all connection values
LW T9,0004 (A0) ;T9=A0+4: p->first room
LUI AT,8004
LUI A2,8004
ADDU T1,T9,V0
SW T1,0F5C (AT) ;T1->80040F5C: p->first room (actual tile list start)
LW T2,0004 (A0) ;T2=A0+4: p->first room
ADDIU A3,A0,0004 ;A3=A0+4
ADDIU A2,A2,0F4C ;A2=80040F4C: list of tile sizes
BEQ T2,R0,7F0B2F94 ;branch if no stan exceptions present
LUI A1,8004
LW V1,0000 (A3) ;V1=p->first room
ADDU T3,V1,V0
//7F0B2F80: loop for each of the exception entries
LW V1,0004 (A3)
SW T3,0000 (A3)
ADDIU A3,A3,0004
BNEL V1,R0,7F0B2F80
ADDU T3,V1,V0
//7F0B2F94: grab first tile
ADDIU V0,A3,0004 ;V0=p->tile
LW T4,0000 (V0) ;T4=tile name and room
ADDIU A1,A1,0F60 ;A1=80040F60: p->final tile
BEQ T4,R0,7F0B2FD0 ;kill if "unstric"
NOP
//7F0B2FA8: loop for each tile
SW V0,0000 (A1) ;V0->80040F60: save current tile as final
LH V1,0006 (V0) ;V1=V0+6: side and division halfword
SRA T5,V1,0xC ;T5=V1>>C: #sides
ANDI T6,T5,000F ;T6=#sides
ADDU T7,A2,T6 ;T7=80040F4C+#sides: p->offset for next tile
LBU T8,0000 (T7) ;T8=offset to next tile
ADDU V0,T8,V0 ;V0+=offset
LW T9,0000 (V0) ;T9=next tile's name and room
BNEL T9,R0,7F0B2FAC ;branch if not "unstric"
SW V0,0000 (A1)
//7F0B2FD0: return
JR RA
SW A0,0000 (T0) ;p->start of stan tile list -> 8007B120

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80044DC0 current sky
80044E10 start of list
7F0BAA64: locate and copy enviroment values
accepts: A0=stage#, A1=0 if MP?
ADDIU SP,SP,FFD8
SW RA,0014 (SP)
SW A1,002C (SP) ;SP+2C=A1: ?
SW R0,001C (SP)
JAL 7F09A464 ;V0=#players
SW A0,0028 (SP) ;SP+28=A0: stage#
ADDIU AT,R0,0001
LW A2,001C (SP) ;A2=0
LW A3,0028 (SP) ;A3=stage#
BNE V0,AT,7F0BAA94 ;branch if not 1 player
OR T0,V0,R0 ;T0=#players
OR T0,R0,R0 ;T0=0 if solo
//7F0BAA94: set default enviroment
LUI AT,8006
LWC1 F4,8D70 (AT) ;F4=80058D70: 7F7FFFFF - default near fog
LW T6,002C (SP) ;T6=SP+2C: ?
LUI AT,8004
MTC1 R0,F6
SWC1 F4,4DC4 (AT) ;7F7FFFFF->80044DC4: near fog value
LUI AT,8004
BEQ T6,R0,7F0BAB1C ;skip cutscene env. tests if zero
SWC1 F6,4DC8 (AT) ;0->80044DC8: near fog * intensity of zero
//7F0BAAB8: cutscene env. testing
LUI T1,8004
ADDIU V1,T1,4E10 ;V1=80044E10: env.table 1
LW T7,0000 (V1) ;T7=env.stage#
LUI T8,8004
ADDIU T8,T8,4E10 ;T8=80044E10: env.table 1
BEQ T7,R0,7F0BAB1C ;branch if at end of list
ADDIU A0,A3,0384 ;A0=stage#+0x384: cutscene env.set offset
//7F0BAAD8: copy enviroment on hit
LW V0,0000 (T8) ;V0=env.stage#
BNE A0,V0,7F0BAB0C ;branch if env.# doesn't match cutscene#
LUI V0,8008
ADDIU V0,V0,25E8
SW V1,0000 (V0) ;V1->800825E8: save env.table hit
LUI AT,8008
SW V1,25EC (AT) ;V1->800825EC: save env.table match start
LUI AT,8008
ADDIU T9,V1,005C ;T9=V1+0x5C: p->end of entry (next entry)
SW T9,25F0 (AT) ;T9->800825F0: save env.table match endpoint
JAL 7F0BA758 ;copy table 1 enviroment to current
LW A0,0000 (V0) ;A0=p->env.tabel match
BEQ R0,R0,7F0BAC9C
LW RA,0014 (SP)
//7F0BAB0C: loop for each entry
LW V0,005C (V1) ;V0=next env.stage#
ADDIU V1,V1,005C ;V1+=0x5C: p->next entry
BNEZ V0,7F0BAAD8 ;branch if not at end of list
NOP
//7F0BAB1C: offset stage# to current # players
LUI T1,8004
ADDIU T1,T1,4E10 ;T1=80044E10: env.table 1
LW A1,0000 (T1) ;A1=env.stage#
LUI T2,8004
ADDIU T2,T2,4E10 ;T2=80044E10: env.table 1
BEQ A1,R0,7F0BAB98 ;branch if at end of list
OR V1,T1,R0 ;V1=T1: env.table 1
SLL T3,T0,0x2
SUBU T3,T3,T0
SLL T3,T3,0x3
ADDU T3,T3,T0
SLL T3,T3,0x2 ;T3=#players * 100 (0x64)
ADDU A0,A3,T3 ;A0=MPstage#
LW V0,0000 (T2) ;V0=env.stage#
//7F0BAB54:
BNE A0,V0,7F0BAB88 ;branch if no match
LUI V0,8008
ADDIU V0,V0,25E8
SW V1,0000 (V0) ;V1->800825E8: save env.table hit
LUI AT,8008
SW V1,25EC (AT) ;V1->800825EC: save env.table match start
LUI AT,8008
ADDIU T4,V1,005C
SW T4,25F0 (AT) ;T4->800825F0: save env.table match endpoint
JAL 7F0BA758 ;copy table 1 enviroment to current
LW A0,0000 (V0) ;A0=p->env.table match
BEQ R0,R0,7F0BAC9C
LW RA,0014 (SP)
//7F0BAB88: loop for each entry
LW V0,005C (V1) ;V0=next env.stage#
ADDIU V1,V1,005C ;V1+=0x5C: p->next entry
BNEZ V0,7F0BAB54 ;branch if not at end of list
NOP
//7F0BAB98: MP-specific enviroment test, although this was covered in previous segment...
SLTI AT,T0,0002
BNEL AT,R0,7F0BAC14 ;branch if solo
LUI AT,4170
BEQ A1,R0,7F0BAC10 ;branch if table 1 contains no entries
OR V1,T1,R0 ;V1=T1: env.table 1
SLL A0,T0,0x2
SUBU A0,A0,T0
SLL A0,A0,0x3
LUI T5,8004
ADDIU T5,T5,4E10 ;T5=80044E10: env.table 1
ADDU A0,A0,T0
SLL A0,A0,0x2 ;A0=#players * 100: offset to MPstage#
LW V0,0000 (T5) ;V0=env.stage#
//7F0BABCC:
BNE A0,V0,7F0BAC00 ;branch if no match
LUI V0,8008
ADDIU V0,V0,25E8
SW V1,0000 (V0) ;V1->800825E8: save env.table hit
LUI AT,8008
SW V1,25EC (AT) ;V1->800825EC: save env.table match start
LUI AT,8008
ADDIU T6,V1,005C
SW T6,25F0 (AT) ;T6->800825F0: save env.table match endpoint
JAL 7F0BA758 ;copy table 1 enviroment to current
LW A0,0000 (V0) ;A0=p->env.table match
BEQ R0,R0,7F0BAC9C
LW RA,0014 (SP)
//7F0BAC00: loop for each entry
LW V0,005C (V1) ;V0=next env.stage#
ADDIU V1,V1,005C ;V1+=0x5C: p->next entry
BNEZ V0,7F0BABCC ;branch if not at end of list
NOP
//7F0BAC10:
LUI AT,4170
MTC1 AT,F12 ;F12=15.0
LUI AT,8006
LWC1 F14,8D74 (AT) ;F14=80058D74: 10000.0 [461C4000]
SW A2,001C (SP) ;A2=SP+1C: 0
JAL 70004650 ;set page height
SW A3,0028 (SP) ;A3=SP+28: stage#
LUI A0,8004
LUI AT,8008
ADDIU A0,A0,5F50 ;A0=80045F50: env.table 2
SW R0,25C0 (AT) ;0->800825C0:
LW T7,0000 (A0) ;T7=env.stage#
LW A2,001C (SP) ;A2=SP+1C: 0
LW A3,0028 (SP) ;A3=SP+28: stage#
BEQ T7,R0,7F0BAC78 ;branch if no entries in list
OR V1,A0,R0 ;V1=80045F50: env.table 2
LUI T8,8004
ADDIU T8,T8,5F50 ;T8=80045F50: env.table 2
LW V0,0000 (T8) ;V0=env.stage#
//7F0BAC5C: save hits
BNEL A3,V0,7F0BAC6C ;branch if no match
LW V0,0038 (V1)
OR A2,V1,R0 ;A2=V1: env.table hit
//7F0BAC68: loop for all entries
LW V0,0038 (V1) ;V0=next env.stage#
ADDIU V1,V1,0038 ;V1+=0x38: p->env.entry
BNEZ V0,7F0BAC5C ;branch if not at end of list
NOP
//7F0BAC78: set default otherwise
BNEZ A2,7F0BAC84 ;branch if hit found
NOP
OR A2,A0,R0 ;A2=A0: p->default entry
//7F0BAC84:
JAL 7F0BA9D0 ;copy table 2 enviroment to current
OR A0,A2,R0 ;A0=A2: p->env.data
LUI V0,8008
ADDIU V0,V0,25E8
SW R0,0000 (V0) ;0->800825E8: fry env.table hit buffer
//7F0BAC98:
LW RA,0014 (SP)
ADDIU SP,SP,0028
JR RA
NOP
7F0BA758: EF288 0FC2E9D6 copy large enviroment bank to current
ADDIU SP,SP,FFC8
SW RA,0014 (SP)
LWC1 F14,0008 (A0) ;F14=far fog
LWC1 F12,0004 (A0) ;F12=pervasiveness
JAL 70004650 ;set page height
SW A0,0038 (SP) ;SP+38=A0: p->env.data
JAL 700046AC
ADDIU A0,SP,0030 ;A0=SP+30:
JAL 7F0B4878 ;ret F0=800413FC: 1.0
NOP
LWC1 F4,0030 (SP) ;F4=pervasiveness
LWC1 F8,0034 (SP) ;F8=far fog
LW A1,0038 (SP) ;A1=p->env.data
DIV.S F6,F4,F0 ;F6=F4/1.0: pervasiveness
LUI AT,447A
LUI A0,8008
ADDIU A0,A0,25E4 ;A0=800825E4:
LUI A2,8008
ADDIU A2,A2,25E0 ;A2=800825E0: buffer for far ambient light
LUI V1,8008
ADDIU V1,V1,25C8 ;V1=800825C8: buffer for pervasiveness
LUI V0,8004
ADDIU V0,V0,4DCC ;V0=80044DCC: p->current data, starting at BG light
DIV.S F10,F8,F0 ;F10=F8/1.0: far fog
SWC1 F6,0030 (SP) ;SP+30=F6: pervasiveness
MTC1 AT,F8 ;F8= 1000.0 [447A0000]
SWC1 F10,0034 (SP) ;SP+34=F10: far fog
//7F0BA7C4:
LW T6,0020 (A1) ;T6=BG dif.in light
MTC1 T6,F4
NOP
CVT.S.W F6,F4 ;F6=(float) BG dif.in light
DIV.S F10,F6,F8 ;F10=BG dif.light / 1000.0
MTC1 AT,F8
LUI AT,8004
SWC1 F10,0000 (A0) ;BG dif.light->800825E4
//7F0BA7E4:
LW T7,0024 (A1) ;T7=far ambient light
MTC1 T7,F4
ADDIU T7,A1,000C ;T7=p->near fog in env.data
CVT.S.W F6,F4 ;F6=(float) far ambient light
LWC1 F4,0034 (SP) ;F4=far fog
DIV.S F10,F6,F8 ;F10=far ambient light / 1000.0
LWC1 F6,0030 (SP) ;F6=pervasiveness
SUB.S F14,F4,F6 ;F14=far fog - pervasiveness
SWC1 F10,0000 (A2) ;F10->800825E0: buffer for far ambient light
//7F0BA808: finalize near fog value
LWC1 F16,0000 (A2) ;F16=far ambient light %%
MUL.S F8,F14,F16 ;F8=F14*F16: (far fog - pervasiveness) * far ambient light%%
ADD.S F10,F6,F8 ;F10=F6+F8: pervasiveness + ""
SWC1 F10,4DC4 (AT) ;F10->80044DC4: near fog value
//7F0BA818: finalize intensity
LWC1 F2,0000 (A0) ;F2=BG dif.light
LUI AT,8004
MUL.S F4,F14,F2 ;F4=F14*F2: (far fog - pervasiveness) * BG dif.light
ADD.S F8,F6,F4 ;F8=F6+F4: pervasiveness + ""
SWC1 F8,4DC8 (AT) ;F8->80044DC8: intensity
//7F0BA82C:
LWC1 F10,0004 (A1) ;F10=pervasiveness
LUI AT,4300
DIV.S F6,F10,F0 ;F6=F10/F0: pervasiveness / 1.0
SUB.S F10,F16,F2 ;F10=far ambient light - BG dif.light
SWC1 F6,0000 (V1) ;pervasiveness->800825C8: buffer for pervasiveness
//7F0BA840:
LWC1 F4,0008 (A1) ;F4=far fog
SWC1 F10,0018 (SP) ;SP+18=(far ambient light - BG dif.light)
MTC1 AT,F6 ;F6= 128.0 [43000000]
DIV.S F8,F4,F0 ;F8=F4/F0: far fog / 1.0
LWC1 F4,0018 (SP) ;F4=(far ambient light - BG dif.light)
LUI AT,3F00
MTC1 AT,F10 ;F10=0.5 [3F000000]
LUI AT,4380
LWC1 F18,0000 (V1) ;F18=pervasiveness
SWC1 F8,0004 (V1) ;far fog->800825CC
//7F0BA868:
DIV.S F8,F6,F4 ;F8=F6/F4: 128.0 / (far ambient light - BG dif.light)
LWC1 F12,0004 (V1) ;F12=far fog
SUB.S F6,F10,F2 ;F6=F10-F2: 0.5 - BG dif.light
SWC1 F8,0020 (SP) ;SP+20=128.0 / (far ambient light - BG dif.light)
//7F0BA878:
MTC1 AT,F8 ;F8=256.0 [43800000]
LUI AT,3F80
MUL.S F10,F6,F8 ;F10=F6*F8: (0.5 - BG dif.light) * 256.0
SUB.S F8,F12,F18 ;F8=F12-F18: far fog - pervasiveness
SWC1 F8,0018 (SP) ;SP+18=F8: far fog - pervasiveness
//7F0BA88C:
MTC1 AT,F8 ;F8=1.0 [3F800000]
DIV.S F6,F10,F4 ;F6=F10-F4: 256(0.5 - BG dif.light) / (far ambient light - BG dif.light)
LWC1 F10,0020 (SP) ;F10=128.0 / (far ambient light - BG dif.light)
LUI AT,437F
NEG.S F4,F10 ;F4=-128.0 / (far ambient light - BG dif.light)
ADD.S F10,F18,F8 ;F10=F18+F8: pervasiveness++
LWC1 F8,0018 (SP) ;F8=far fog - pervasiveness
SWC1 F6,001C (SP) ;SP+1C=F6= 256(0.5 - BG dif.light) / (far ambient light - BG dif.light)
//7F0BA8AC:
MUL.S F6,F4,F12 ;F6=F4*F12: -128.0*far fog / (far ambient light - BG dif.light)
NOP
MUL.S F4,F6,F10 ;F4=F6*F10: -128.0*far fog*pervasiveness++ / (far ambient light - BG dif.light)
MTC1 AT,F10 ;F10=255.0 [437F0000]
LUI AT,3F80
DIV.S F6,F4,F8 ;F6=F4/F8: (-128.0*far fog*pervasiveness++) / (far ambient light - BG dif.light)(far fog - pervasiveness)
MTC1 AT,F8 ;F8=1.0 [3F800000]
LUI AT,437F
DIV.S F4,F6,F10 ;F4=F6/F10: (-128.0*far fog*pervasiveness++) / 255(far ambient light - BG dif.light)(far fog - pervasiveness)
LWC1 F10,0020 (SP) ;F10=128.0 / (far ambient light - BG dif.light)
ADD.S F6,F12,F8 ;F6=F12+F8: far fog++
LWC1 F8,0018 (SP) ;F8=far fog - pervasiveness
SWC1 F4,0010 (V1) ;F4->800825D8
//7F0BA8E0:
MUL.S F4,F6,F10 ;F4= F6*F10: 128(far fog++) / (far ambient light - BG dif.light)
LWC1 F10,001C (SP) ;F10= 256(0.5 - BG dif.light) / (far ambient light - BG dif.light)
DIV.S F6,F4,F8 ;F6=F4/F8: 128(far fog++) / (far ambient light - BG dif.light)(far fog - pervasiveness)
MTC1 AT,F8 ;F8=255.0 [437F0000]
LUI AT,8008
ADD.S F4,F6,F10 ;F4=F6+F10: 128(far fog++) / (far ambient light - BG dif.light)(far fog - pervasiveness) + 256(0.5 - BG dif.light) / (far ambient light - BG dif.light)
DIV.S F6,F4,F8 ;F6=F4/F8: (128(far fog++) / (far ambient light - BG dif.light)(far fog - pervasiveness) + 256(0.5 - BG dif.light) / (far ambient light - BG dif.light)) / 255.0
SWC1 F6,0014 (V1) ;F6=800825DC
//7F0BA900: light values
LW T8,0020 (A1) ;T8=env.+20: BG dif.in light
SW T8,0000 (V0) ;T8->80044DCC
LW T9,0024 (A1) ;T8=far ambient light
ADDIU T8,R0,0001
SW T9,0004 (V0) ;T9->80044DD0
//7F0BA914: fog values
LBU T0,0028 (A1) ;T0=fog red component
SB T0,0008 (V0) ;T0->80044DD4
LBU T1,0029 (A1) ;T1=fog green component
SB T1,0009 (V0) ;T1->80044DD5
LBU T2,002A (A1) ;T2=fog blue component
SB T2,000A (V0) ;T2->80044DD6
//7F0BA92C: cloud values
LBU T3,002B (A1) ;T3=cloud flag
SB T3,000B (V0) ;T3->80044DD7
LWC1 F10,002C (A1) ;F10=cloud repeat value
SWC1 F10,000C (V0) ;F10->80044DD8
LH T4,0030 (A1) ;T4=cloud image offset
SH T4,0010 (V0) ;T4->80044DDC
LWC1 F4,0034 (A1) ;F4=cloud red channel
SWC1 F4,0014 (V0) ;F4->80044DE0
LWC1 F8,0038 (A1) ;F8=cloud green channel
SWC1 F8,0018 (V0) ;F8->80044DE4
LWC1 F6,003C (A1) ;F6=cloud blue channel
SWC1 F6,001C (V0) ;F6->80044DE8
//7F0BA95C: water values
LBU T5,0040 (A1) ;T5=water flag
SB T5,0020 (V0) ;T5->80044DEC
LWC1 F10,0044 (A1) ;F10=water repeat value
SWC1 F10,0024 (V0) ;F10->80044DF0
LH T6,0048 (A1) ;T6=water image offset
SH T6,0028 (V0) ;T6->80044DF4
LWC1 F4,004C (A1) ;F4=water red channel
SWC1 F4,002C (V0) ;F4->80044DF8
LWC1 F8,0050 (A1) ;F8=water green channel
MTC1 R0,F4
SWC1 F8,0030 (V0) ;F8->80044DFC
LWC1 F6,0054 (A1) ;F6=water blue channel
SWC1 F6,0034 (V0) ;F6->80044E00
//7F0BA990: concavity distort
LWC1 F10,0058 (A1) ;F10=world concavity distort
SWC1 F10,0038 (V0) ;F10->80044E04
//7F0BA998:
LWC1 F8,000C (A1) ;F8=near fog
C.EQ.S F4,F8
NOP
BC1F 7F0BA9B8 ;branch if 0!=near fog
NOP
LUI AT,8008
BEQ R0,R0,7F0BA9BC
SW R0,25C4 (AT) ;0->800825C4: NULL near fog pointer
//7F0BA9B8:
SW T7,25C4 (AT) ;save p->near fog
//7F0BA9BC:
LW RA,0014 (SP)
LUI AT,8008
SW T8,25C0 (AT) ;1->800825C0: enviroment table 1 entry in use
JR RA
ADDIU SP,SP,0038
7F0BA9D0: 0FC2EA74 copy short enviroment bank to current
accepts: A0=p->enviroment data
LBU T6,0004 (A0) ;T6=fog red component
LUI V0,8004
ADDIU V0,V0,4DCC ;V0=80044DCC: current env.data
SB T6,0008 (V0) ;T6->80044DD4
LBU T7,0005 (A0) ;T7=fog green component
SB T7,0009 (V0) ;T7->80044DD5
LBU T8,0006 (A0) ;T8=fog blue component
SB T8,000A (V0) ;T8->80044DD6
LBU T9,0007 (A0) ;T9=cloud flag
SB T9,000B (V0) ;T9->80044DD7
//7F0BA9F8: clouds
LWC1 F4,0008 (A0) ;F4=cloud image repeat
SWC1 F4,000C (V0) ;F4->80044DD8
LH T0,000C (A0) ;T0=cloud image index
SH T0,0010 (V0) ;T0->80044DDC
LWC1 F6,0010 (A0) ;F6=cloud red component
SWC1 F6,0014 (V0) ;F6->80044DE0
LWC1 F8,0014 (A0) ;F8=cloud green component
SWC1 F8,0018 (V0) ;F8->80044DE4
LWC1 F10,0018 (A0) ;F10=cloud blue component
SWC1 F10,001C (V0) ;F10->80044DE8
//7F0BAA20: water
LBU T1,001C (A0) ;T1=water flag
SB T1,0020 (V0) ;T1->80044DEC
LWC1 F16,0020 (A0) ;F16=water image repeat
SWC1 F16,0024 (V0) ;F16->80044DF0
LH T2,0024 (A0) ;T2=water image index
SH T2,0028 (V0) ;T2->80044DF4
LWC1 F18,0028 (A0) ;F18=water red component
SWC1 F18,002C (V0) ;F18->80044DF8
LWC1 F4,002C (A0) ;F4=water green component
SWC1 F4,0030 (V0) ;F4->80044DFC
LWC1 F6,0030 (A0) ;F6=water blue component
SWC1 F6,0034 (V0) ;F6->80044E00
LWC1 F8,0034 (A0) ;F8=world concavity distort
JR RA
SWC1 F8,0038 (V0) ;F8->80044E04
70004650 set page height
accepts: F12=?, F14=?
ADDIU SP,SP,FFE8
LUI V1,8002
ADDIU V1,V1,32A8
SWC1 F12,0018 (SP) ;SP+18=F12:
LWC1 F4,0018 (SP) ;F4=F12
LW T6,0000 (V1) ;T6=800232A8: p->?
SW RA,0014 (SP)
SWC1 F14,001C (SP) ;SP+1C=F14:
SWC1 F4,0010 (T6) ;F12-> p+0x10
LW T7,0000 (V1) ;T7=800232A8: p->?
LWC1 F6,001C (SP) ;F6=F14
SWC1 F6,0014 (T7) ;F14-> p+0x14
LW V0,0000 (V1) ;V0=800232A8: p->?
LWC1 F12,0010 (V0) ;F12=F12
LWC1 F14,0008 (V0) ;F14=?
JAL 7F077C30
LW A2,000C (V0) ;A2=?
JAL 7F077C5C
NOP
LW RA,0014 (SP)
ADDIU SP,SP,0018
JR RA
NOP
700046AC: ???
accepts: A0=p->target
LUI V0,8002
ADDIU V0,V0,32A8
LW T6,0000 (V0) ;T6=800232A8: p->?
LWC1 F4,0010 (T6)
SWC1 F4,0000 (A0) ;F4->target+0
LW T7,0000 (V0) ;T6=800232A8: p->?
LWC1 F6,0014 (T7)
JR RA
SWC1 F6,0004 (A0) ;F6->target+4
7F077C30: ??? copies floats to BONDdata
accepts: A2=?, F12=?, F14=?
LUI V0,8008
ADDIU V0,V0,A0B0
LW T6,0000 (V0)
SW A2,0008 (SP)
SWC1 F12,10A0 (T6)
LW T7,0000 (V0)
SWC1 F14,10A4 (T7)
LW T8,0000 (V0)
LWC1 F4,0008 (SP)
JR RA
SWC1 F4,10A8 (T8)
7F054B80:
ADDIU SP,SP,FFE0
LUI AT,3F80
MTC1 AT,F16 ;F16=1.0
SW RA,0014 (SP)
SW A0,0020 (SP) ;SP+20=A0:
SW A1,0024 (SP) ;SP+24=A1:
JAL 7F0BB398 ;V0=p->fog values [800825C4]
SWC1 F16,001C (SP) ;SP+1C=1.0
BEQ V0,R0,7F054C44 ;branch if not present
LWC1 F16,001C (SP) ;F16=1.0
//7F054BA8:
LW T6,0020 (SP)
LWC1 F4,0008 (V0) ;F4=obj.obfuscation range
LWC1 F6,0018 (T6) ;F6=T6+18:
C.LT.S F4,F6
NOP
BC1FL 7F054C48 ;branch if obj.obfuscation range >= F6
LW RA,0014 (SP)
SW V0,0018 (SP) ;SP+18=V0: p->fog values
JAL 7F078484 ;F0= BONDdata+10F8
SWC1 F16,001C (SP) ;SP+1C=1.0
//7F054BD0:
LW V1,0018 (SP) ;V1=p->fog values
LW T7,0020 (SP)
LUI AT,42C8
LWC1 F2,0008 (V1) ;F2=obj.obfuscation range
LWC1 F8,0018 (T7)
MTC1 AT,F18 ;F18=100.0
LWC1 F6,0024 (SP)
SUB.S F10,F8,F2 ;F10=F8-obj.obfuscation range
LWC1 F14,0004 (V1) ;F14=max obj vis. range
LWC1 F16,001C (SP) ;F16=SP+1C: 1.0
MUL.S F4,F10,F18 ;F4=100.0(F8-obj.obfuscation range)
DIV.S F8,F4,F6 ;F8=100.0(F8-obj.obfuscation range)/F6
ADD.S F10,F8,F2 ;F10=100.0(F8-obj.obfuscation range)/F6 + obj.obfuscation range
MUL.S F12,F10,F0 ;F12=(BONDdata+10F8) * (100.0(F8-obj.obfuscation range)/F6 + obj.obfuscation range)
C.LE.S F14,F12
NOP
BC1FL 7F054C28 ;branch if max obj vis. range > F12
LWC1 F0,0000 (V1)
MTC1 R0,F16 ;F16=0
BEQ R0,R0,7F054C48
LW RA,0014 (SP)
//7F054C24:
LWC1 F0,0000 (V1) ;F0=near fog value
C.LT.S F0,F12
NOP
BC1FL 7F054C48 ;branch if near fog value >= F12
LW RA,0014 (SP)
SUB.S F10,F14,F12 ;F10=max obj vis. range - F12
SUB.S F4,F14,F0 ;F4=max obj vis. range - near fog value
DIV.S F16,F18,F4 ;F16=100/(max obj vis. range - near fog value)
//7F054C44: return
LW RA,0014 (SP)
ADDIU SP,SP,0020
MOV.S F0,F16 ;F0=F16: percentage visibility?
JR RA
NOP
7F054C58:
ADDIU SP,SP,FFC8
SW RA,0014 (SP)
ADDIU T6,R0,0001
SW A0,0038 (SP) ;SP=38=A0:
SW A1,003C (SP) ;SP+3C=A1:
JAL 7F0BB398 ;V0=p->fog values [800825C4]
SW T6,0034 (SP) ;SP+34=1: true return
BEQL V0,R0,7F054D5C ;branch if 0
LW RA,0014 (SP)
//7F054C7C:
JAL 7F089FD4 ;V0=p->position
SW V0,0030 (SP) ;SP+30=p->fog values
JAL 7F0783C4 ;V0= BONDdata+0x10CC
SW V0,001C (SP) ;SP+1C=p->position
//7F054C8C:
LW V1,001C (SP) ;V1=p->position
LW A1,0038 (SP)
LW A0,0030 (SP) ;A0=p->fog values
LWC1 F6,0000 (V1) ;F6=x position
LWC1 F4,0000 (A1)
SUB.S F8,F4,F6
SWC1 F8,0024 (SP) ;SP+24=?-xpos
LWC1 F16,0004 (V1) ;F16=y position
LWC1 F10,0004 (A1)
SUB.S F18,F10,F16
LWC1 F10,0024 (SP) ;F10=F8
SWC1 F18,0028 (SP) ;SP+28=?-ypos
LWC1 F6,0008 (V1) ;F6=z position
LWC1 F4,0008 (A1)
SUB.S F8,F4,F6
LWC1 F4,0028 (SP) ;F4=F18
SWC1 F8,002C (SP) ;SP+2C=?-zpos
LWC1 F16,0000 (V0) ;F16=BONDdata+10CC
LWC1 F6,0004 (V0) ;F6=BONDdata+10D0
MUL.S F18,F10,F16 ;F18=(?-xpos)*(BONDdata+10CC)
LWC1 F16,0008 (V0) ;F16=BONDdata+10D4
MUL.S F8,F4,F6 ;F8=(?-ypos)*(BONDdata+10D0)
LWC1 F4,002C (SP) ;F4=(?-zpos)
MUL.S F6,F16,F8 ;F6=(BONDdata+10D4)*(?-ypos)*(BONDdata+10D0)
LWC1 F18,0008 (A0) ;F18=obj.obfuscation range
ADD.S F12,F6,F10 ;F12=(BONDdata+10D4)*(?-ypos)*(BONDdata+10D0) + (?-xpos)
C.LT.S F18,F12
NOP
BC1FL 7F054D5C ;branch if obj.obfuscation range >= F12
LW RA,0014 (SP)
//7F054D08:
SW A0,0030 (SP) ;SP+30=A0: same as before
JAL 7F078484 ;F0= BONDdata+10F8
SWC1 F12,0020 (SP) ;SP+20=F12
LW A0,0030 (SP) ;A0=SP+30: p->fog values
LWC1 F12,0020 (SP) ;F12=SP+20
LUI AT,42C8
LWC1 F2,0008 (A0) ;F2=A0+8: obj.obfuscation range
MTC1 AT,F16 ;F16=100.0
LWC1 F6,003C (SP) ;F6=SP+3C:
SUB.S F8,F12,F2 ;F8=F12-obj.obfuscation range
MUL.S F4,F8,F16 ;F4=100.0(F12-obj.obfuscation range)
LWC1 F8,0004 (A0) ;F8=max.obj.vis.range
DIV.S F10,F4,F6 ;F10=100.0(F12-obj.obfuscation range) / F6
ADD.S F18,F10,F2 ;F18=100.0(F12-obj.obfuscation range) / F6 + obj.obfuscation range
MUL.S F12,F18,F0 ;F12=(100.0(F12-obj.obfuscation range) / F6 + obj.obfuscation range) * F0
C.LE.S F8,F12
NOP
BC1FL 7F054D5C ;branch if max.obj.vis.range > F12
LW RA,0014 (SP)
SW R0,0034 (SP) ;SP+34=0: false return
//7F054D58:
LW RA,0014 (SP)
LW V0,0034 (SP) ;V0=SP+34: return value
ADDIU SP,SP,0038
JR RA
NOP
+_+
for the record, the sky is constructed here:
//7F096E2C:
here's a sample 'cloud' mapping:
//at 7F096E2C
E7000000 00000000
E7000000 00000000
BA001402 00000000
B900031D 00552048
BB000001 FFFFFFFF
BA001001 00000000
FC121824 FF33FFFF
FD700000 0015DE78
F5700000 07000000
E6000000 00000000
F3000000 077FF100
E7000000 00000000
BA000E02 00000000
F5681000 00018060
F2002002 000FE0FE
//at 7F096E7C
FB000000 280000FF
//at 7F006EDC:
FC40FE81 55FEF97C
//at 7F098E84
B4000000 CE8002A1 ;
B2000000 0

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@ -1,470 +0,0 @@
These dASMs are from PAL, not NTSC, to explain how the conversion will work
Do NOT index these TLB commands
7F0B9E34: copy fog values to current sky
ADDIU SP,SP,FFD8
SW RA,0014 (SP)
SW A1,002C (SP)
SW R0,001C (SP)
JAL 7F0999A4 ;V0=#players
SW A0,0028 (SP)
//7F0B9E4C:
ADDIU AT,R0,0001
LW A2,001C (SP)
LW A3,0028 (SP) ;A3=search stage#
BNE V0,AT,7F0B9E64 ;if solo, set T0=0
OR T0,V0,R0 ;T0=#players
OR T0,R0,R0
//7F0B9E64: set default values
LUI AT,8005
LWC1 F4,D7C0 (AT) ;F4=7F7FFFFF
LW T6,002C (SP)
LUI AT,8004
MTC1 R0,F6
SWC1 F4,E2B4 (AT) ;8003E2B4=7F7FFFFF: near fog value
LUI AT,8004
BEQ T6,R0,7F089EEC ;branches over solo sky tests
SWC1 F6,E2B8 (AT) ;8003E2B8=0: near fog * (intensity/far intensity)
//7F0B9E88:
LUI T1,8004
ADDIU V1,T1,E300 ;V1=8003E300: start of fog table 1
LH T7,0000 (V1) ;T7=stage#
LUI T8,8004
ADDIU T8,T8,E300 ;T8=8003E300
BEQ T7,R0,7F0B9EEC ;if stage=0, end of list 1 found
ADDIU A0,A3,0384 ;A0=A3+0x384: search stage# + set 9 offset - cutscene sky
LH V0,0000 (T8) ;V0=stage#
//7F0B9EA8: loop until a match is found
BNE A0,V0,7F0B9EDC ;branch if stage# doesn't match stage+set9
LUI V0,8007
//7F0B9EB0: sky match
ADDIU V0,V0,CF88 ;V0=8006CF88: p->sky
SW V1,0000 (V0) ;V1->8006CF88: save p->sky
LUI AT,8007
SW V1,CF8C (AT) ;V1->8006CF8C: save p->sky
LUI AT,8007
ADDIU T9,V1,0024 ;T9=V1+0x24: p->next sky
SW T9,CF90 (AT) ;T9->8006CF90: save p->end of sky data
JAL 7F0B99F8
LW A0,0000 (V0) ;A0=p->sky
BEQ R0,R0,7F0BA06C ;since you got a match, end this bugger
LW RA,0014 (SP)
//7F0B9EDC: loopus
LH V0,0024 (V1) ;V0=stage#
ADDIU V1,V1,0024 ;V1+=0x24: next sky
BNEZ V0,7F0B9EA8 ;branch if not at end of list
NOP
//7F0B9EEC: look for MP sky
LUI T1,8004
ADDIU T1,T1,E300 ;T1=8003E300: start of sky list 1
LH A1,0000 (T1) ;A1=stage#
LUI T2,8004
ADDIU T2,T2,E300 ;T2=8003E300: start of sky list 1
BEQ A1,R0,7F0B9F68 ;branch if at EOL
OR V1,T1,R0 ;V1=T1=8003E300: start of sky list 1
SLL T3,T0,0x2
SUBU T3,T3,T0
SLL T3,T3,0x3
ADDU T3,T3,T0
SLL T3,T3,0x2 ;T3=#players * 0x64
ADDU A0,A3,T3 ;A0=stage+MPoffset
LH V0,0000 (T2)
BNE A0,V0,7F0B9F58
LUI V0,8007
//7F0B9F2C:
ADDIU V0,V0,CF88
SW V1,0000 (V0)
LUI AT,8007
SW V1,CF8C (AT)
LUI AT,8007
ADDIU T4,V1,0024
SW T4,CF90 (AT)
JAL 7F0B99F8
LW A0,0000 (V0)
BEQ R0,R0,7F0BA06C
LW RA,0014 (SP)
//7F0B9F58:
LH V0,0024 (V1)
ADDIU V1,V1,0024
BNEZ V0,7F0B9F24
NOP
//7F0B9F68:
SLTI AT,T0,0002
BNEL AT,R0,7F0B9FE4
LUI AT,4170
BEQ A1,R0,7F0B9FE0
OR V1,T1,R0
SLL A0,T0,0x2
SUBU A0,A0,T0
SLL A0,A0,0x3
LUI T5,8004
ADDIU T5,T5,E300
ADDU A0,A0,T0
SLL A0,A0,0x2
LH V0,0000 (T5)
//7F0B9F9C:
BNE A0,V0,7F0B9FD0
LUI V0,8007
//7F0B9FA4:
ADDIU V0,V0,CF88
SW V1,0000 (V0)
LUI AT,8007
ADDIU T6,V1,0024
SW T6,CF90 (AT)
JAL 7F0B99F8
LW A0,0000 (V0)
BEQ R0,R0,7F0BA06C
LW RA,0014 (SP)
//7F0B9FD0:
LH V0,0024 (V1)
ADDIU V1,V1,0024
BNEZ V0,7F0B9F9C
NOP
//7F0B9FE0:
LUI AT,4170
MTC1 AT,F12
LUI AT,8005
LWC1 F14,D7C4 (AT)
SW A2,001C (SP)
JAL 700040A0
SW A3,0028 (SP) ;SP+28=A3: search stage#
LUI A0,8004
LUI AT,8007
ADDIU A0,A0,E9C0 ;A0=8003E9C0: sky table 2
SW R0,CF60 (AT) ;0->8006CF60:
LW T7,0000 (A0) ;T7=stage#
LW A2,001C (SP)
LW A3,0028 (SP) ;A3=search stage#
BEQ T7,R0,7F0BA048 ;branch if at end of table
OR V1,A0,R0 ;V1=A0=8003E9C0: sky table 2
//7F0BA020:
LUI T8,8004
ADDIU T8,T8,E9C0 ;T8=8003E9C0: sky table 2
LW V0,0000 (T8) ;V0=stage#
//7F0BA02C:
BNEL A3,V0,7F0BA03C ;branch if not a match
LW V0,0038 (V1)
OR A2,V1,R0 ;A2=p->sky
//7F0BA038:
LW V0,0038 (V1) ;V0=next stage#
ADDIU V1,V1,0038 ;V1+=0x38: next sky
BNEZ V0,7F0BA02C ;loop for all entries
NOP
//7F0BA048:
BNEZ A2,7F0BA054 ;branch if no table 2 hit found
NOP
OR A2,A0,R0 ;A2=A0: p->default sky
//7F0BA054:
JAL 7F0B9DA0 ;make table 2 sky active
OR A0,A2,R0 ;A0=A2: p->sky
LUI V0,8007
ADDIU V0,V0,CF88
SW R0,0000 (V0) ;0->8006CF88:
//7F0BA068:
LW RA,0014 (SP)
ADDIU SP,SP,0028
JR RA
NOP
7F0B99F8: set sky values - table 1
accepts: A0=p->sky
ADDIU SP,SP,FFC8
SW RA,0014 (SP)
LH T7,0004 (A0) ;T7=sky+4: far fog
LH T6,0002 (A0) ;T6=sky+2: near pervasiveness
SW A0,0038 (SP) ;SP+38=A0: sky
MTC1 T7,F6
MTC1 T6,F4
CVT.S.W F14,F6 ;F14=far fog
JAL 700040A0
CVT.S.W F12,F4 ;F12=near pervasiveness
JAL 700040FC
ADDIU A0,SP,0030 ;A0=SP+30: target for returned float (+0, +4)
JAL 7F0B3BB4 ;F0=8003AC4C: 1.0 cutoff. set higher blackens portals and kills objects unless very close
NOP
//7F0B9A30:
LWC1 F8,0030 (SP) ;F8=SP+30: probably near pervasiveness
LWC1 F4,0034 (SP) ;F4=SP+34: probably far fog
LW A1,0038 (SP) ;A1=sky
DIV.S F10,F8,F0
LUI AT,447A
LUI A0,8007
ADDIU A0,A0,CF84 ;A0=8006CF84
LUI A2,8007
ADDIU A2,A2,CF80 ;A2=8006CF80
LUI V1,8007
ADDIU V1,V1,CF68 ;V1=8006CF68
LUI V0,8004
ADDIU V0,V0,E2BC ;V0=8003E2BC: intensity
DIV.S F6,F4,F0
SWC1 F10,0030 (SP)
MTC1 AT,F4
SWC1 F6,0034 (SP)
LH T8,000C (A1)
MTC1 T8,F8
NOP
CVT.S.W F10,F8
DIV.S F6,F10,F4
MTC1 AT,F4
//7F0B9A8C:
LUI AT,8004
SWC1 F6,0000 (A0)
LH T9,000E (A1)
MTC1 T9,F8
NOP
CVT.S.W F10,F8
LWC1 F8,0034 (SP)
DIV.S F6,F10,F4
LWC1 F10,0030 (SP)
SUB.S F14,F8,F10
SWC1 F6,0000 (A2)
LWC1 F16,0000 (A2)
MUL.S F4,F14,F16
ADD.S F6,F10,F4
SWC1 F6,E2B4 (AT)
//7F0B9AC8:
LWC1 F2,0000 (A0)
LUI AT,8004
MUL.S F8,F14,F2
ADD.S F4,F10,F8
SWC1 F4,E2B8 (AT)
//7F0B9ADC:
LH T0,0002 (A1)
LUI AT,4300
MTC1 T0,F6
NOP
CVT.S.W F10,F6
DIV.S F8,F10,F0
SWC1 F8,0000 (V1)
LH T1,0004 (A1)
SUB.S F8,F16,F2
LWC1 F18,0000 (V1)
MTC1 T1,F4
SWC1 F8,0018 (SP)
CVT.S.W F6,F4
MTC1 AT,F4
LUI AT,3F00
MTC1 AT,F8
LUI AT,4380
DIV.S F10,F6,F0
LWC1 F6,0018 (SP)
SWC1 F10,0004 (V1)
//7F0B9B2C:
DIV.S F10,F4,F6
LWC1 F12,0004 (V1)
SUB.S F4,F8,F2
SWC1 F10,0020 (SP)
MTC1 AT,F10
LUI AT,3F80
MUL.S F8,F4,F10
SUB.S F10,F12,F18
SWC1 F10,0018 (SP)
MTC1 AT,F10
DIV.S F4,F8,F6
LWC1 F8,0020 (SP)
LUI AT,437F
NEG.S F6,F8
ADD.S F8,F18,F10
LWC1 F10,0018 (SP)
SWC1 F4,001C (SP)
MUL.S F4,F6,F12
NOP
MUL.S F6,F4,F8
MTC1 AT,F8
LUI AT,3F80
DIV.S F4,F6,F10
MTC1 AT,F10
LUI AT,437F
DIV.S F6,F4,F8
LWC1 F8,0020 (SP)
ADD.S F4,F12,F10
LWC1 F10,0018 (SP)
SWC1 F6,0010 (V1)
//7F0B9BA4:
MUL.S F6,F4,F8
LWC1 F8,001C (SP)
DIV.S F4,F6,F10
MTC1 AT,F10
LUI AT,4F80
ADD.S F6,F4,F8
DIV.S F4,F6,F10
SWC1 F4,0014 (V1)
//7F0B9BC4: light values
LH T2,000C (A1) ;T2=BG dif.light
SW T2,0000 (V0) ;T2->8003E2BC
LW T3,000E (A1) ;T3=far ambient light
SW T3,0004 (V0) ;T3->8003E2C0
//7F0B9BD4: fog values
LBU T4,0010 (A1) ;T4=fog red component
SB T4,0008 (V0) ;T4->8003E2C4
LBU T5,0011 (A1) ;T5=fog green component
SB T5,0009 (V0) ;T5->8003E2C5
LBU T6,0012 (A1) ;T6=fog blue component
SB T6,000A (V0) ;T6->8003E2C6
//7F0B9BEC: cloud values
LBU T7,0013 (A1) ;T7=cloud flag
SB T7,000B (V0) ;T7->8003E2C7
LH T8,0014 (A1) ;T8=cloud image repeat
MTC1 T8,F8
NOP
CVT.S.W F6,F8 ;F6=(float) cloud repeat
SWC1 F6,000C (V0) ;F6->8003E2C8
LBU T9,0016 (A1) ;T9=offset to sky image
SH T9,0010 (V0) ;T9->8003E2CC
LBU T0,0017 (A1) ;T0=cloud red component
MTC1 T0,F10
BGEZ T0,7F0B9C2C ;silly. always >= 0 because value is unsigned!
CVT.S.W F4,F10 ;F4=(float) cloud red component
//7F0B9C20: fix rollover that never occurs
MTC1 AT,F8 ;F8=4294967296.0 [4F800000]
NOP
ADD.S F4,F4,F8 ;F4=0x100000000 + value, rolling it around to a positive number
//7F0B9C2C:
SWC1 F4,0014 (V0) ;F4->8003E2D0
LBU T1,0018 (A1) ;T1=cloud green component
LUI AT,4F80
MTC1 T1,F6
BGEZ T1,7F0B9C50 ;silly. always >= 0 because value is unsigned!
CVT.S.W F10,F6
//7F0B9C44: fix rollover that never occurs
MTC1 AT,F8 ;F8=4294967296.0 [4F800000]
NOP
ADD.S F10,F10,F8 ;F10=0x100000000 + value, rolling it around to a positive number
//7F0B9C50:
SWC1 F10,0018 (V0) ;F10->8003E2D4
LBU T2,0019 (A1) ;T2=cloud green component
LUI AT,4F80
MTC1 T2,F4
BGEZ T2,7F0B9C74 ;silly. always >= 0 because value is unsigned!
CVT.S.W F6,F4
//7F0B9C68: fix rollover that never occurs
MTC1 AT,F8 ;F8=4294967296.0 [4F800000]
NOP
ADD.S F6,F6,F8 ;F6=0x100000000 + value, rolling it around to a positive number
//7F0B9C74: water values
SWC1 F6,001C (V0) ;F6->8003E2D8
LBU T3,001A (A1) ;T3=water flag
LUI AT,4F80
ADDIU T2,R0,0001 ;T2=1
SB T3,0020 (V0) ;T3->8003E2DC
LH T4,001C (A1) ;T4=water repeat value
MTC1 T4,F10
NOP
CVT.S.W F4,F10 ;F4=(float) water repeat value
SWC1 F4,0024 (V0) ;F4->8003E2E0
//7F0B9C9C:
LBU T5,001E (A1) ;T5=offset to water image
SH T5,0028 (V0) ;T5->8003E2E4
LBU T6,001F (A1) ;T6=water red component
MTC1 T6,F8
BGEZ T6,7F0B9CC0
CVT.S.W F6,F8
//7F0B9CB4:
MTC1 AT,F10
NOP
ADD.S F6,F6,F10
//7F0B9CC0:
SWC1 F6,002C (V0)
LBU T7,0020 (A1)
LUI AT,4F80
MTC1 T7,F4
BGEZ T7,7F0B9CE4
CVT.S.W F8,F4
//7F0B9CD8:
MTC1 AT,F10
NOP
ADD.S F8,F8,F10
//7F0B9CE4:
SWC1 F8,0030 (V0)
LBU T8,0021 (A1)
LUI AT,4F80
MTC1 T8,F6
BGEZ T8,7F0B9D08
CVT.S.W F4,F6
MTC1 AT,F10
NOP
ADD.S F4,F4,F10
//7F0B9D08: world concavity
SWC1 F4,0034 (V0)
LBU T9,0022 (A1) ;T9=world concavity
LUI AT,4F80
MTC1 T9,F8
BGEZ T9,7F0B9D2C
CVT.S.W F6,F8
MTC1 AT,F10
NOP
ADD.S F6,F6,F10
//7F0B9D2C:
SWC1 F6,0038 (V0)
LH V1,0006 (A1) ;V1=near fog value
LUI AT,8007
BNEL V1,R0,7F0B9D4C ;branch if near fog value present
MTC1 V1,F4
BEQ R0,R0,7F0B9D8C
SW R0,CF64 (AT) ;0->8006CF64
//7F0B9D48:
MTC1 V1,F4
LUI V0,8007
ADDIU V0,V0,CF98 ;V0=8006CF98
CVT.S.W F8,F4 ;F8=(float) near fog value
LUI AT,8007
SWC1 F8,0000 (V0)
LH T0,0008 (A1) ;T0=max obj vis. range
MTC1 T0,F10
NOP
CVT.S.W F6,F10 ;F6=(float) max obj vis. range
SWC1 F6,0004 (V0)
LH T1,000A (A1) ;T1=obfuscation range
MTC1 T1,F4
NOP
CVT.S.W F8,F4 ;F8=(float) obfuscation range
SWC1 F8,0008 (V0)
SW V0,CF64 (AT) ;8006CF98->8006CF64
//7F0B9D8C:
LW RA,0014 (SP)
LUI AT,8007
SW T2,CF60 (AT) ;1->8006CF60
JR RA
ADDIU SP,SP,0038
7F0B9DA0: set sky values - table 2
accepts: A0=p->sky
LBU T6,0004 (A0) ;T6=fog red component
LUI V0,8004
ADDIU V0,V0,E2BC ;V0=8003E2BC: current env.data
SB T6,0008 (V0) ;T6->8003E2C4
LBU T7,0005 (A0) ;T7=fog green component
SB T7,0009 (V0) ;T7->8003E2C5
LBU T8,0006 (A0) ;T8=fog blue component
SB T8,000A (V0) ;T8->8003E2C6
LBU T9,0007 (A0) ;T9=cloud flag
SB T9,000B (V0) ;T9->8003E2C7
LWC1 F4,0008 (A0) ;F4=cloud repeat value
SWC1 F4,000C (V0) ;F4->8003E2C8
LH T0,000C (A0) ;T0=cloud image offset
SH T0,0010 (V0) ;T0->8003E2CC
LWC1 F6,0010 (A0) ;F6=cloud red component
SWC1 F6,0014 (V0) ;F6->8003E2D0
LWC1 F8,0014 (A0) ;F8=cloud green component
SWC1 F8,0018 (V0) ;F8->8003E2D4
LWC1 F10,0018 (A0) ;F10=cloud blue component
SWC1 F10,001C (V0) ;F10->8003E2D8
LBU T1,001C (A0) ;T1=water flag
SB T1,0020 (V0) ;T1->8003E2DC
LWC1 F16,0020 (A0) ;F16=water repeat value
SWC1 F16,0024 (V0) ;F16->8003E2E0
LH T2,0024 (A0) ;T2=water image offset
SH T2,0028 (V0) ;T2->8003E2E4
LWC1 F18,0028 (A0) ;F18=water red component
SWC1 F18,002C (V0) ;F18->8003E2E8
LWC1 F4,002C (A0) ;F4=water green component
SWC1 F4,0030 (V0) ;F4->8003E2EC
LWC1 F6,0030 (A0) ;F6=water blue component
SWC1 F6,0034 (V0) ;F6->8003E2F0
LWC1 F8,0034 (A0) ;F8=world concavity distort
JR RA
SWC1 F8,0038 (V0) ;F8->8003E2F4

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@ -1,58 +0,0 @@
PAL uses a reduced fog/sky/water block format.
NOT ACCURATE except for size. Did this quickly just to start a document on the subject.
Trust nothing you see
entries 0x24 in size
0x0 2 stage ID number (or multiple thereof)
0x2 2 near pervasiveness of fog on rendered surfaces
0x4 2 far fog value; beyond this is complete obscurity
0x6 2 near fog value; distance from player to start of fog gradient
0x8 2 max obj vis. range; furthest dist standard (non-door) obj and actors are visible at
0xA 2 obj obfuscation range; objs start to 'fade' at this distance
0xC 2 default 996 BG: dif. in light. smaller # = foggier near player
0xE 2 default 1000 far ambient light value value. used with above two values
I think this is when fog occurs, and above two are subtracted to create the near fog boundry.
permillage. light/ambient=multiplier
0x10 1 red component 0-FF
0x11 1 green component 0-FF
0x12 1 blue component 0-FF
0x13 1 clouds 1-on/0-off
/*cloud-specific*/
0x14 2 default 5000; cloud image repeat value. larger = more repetitions (pushed to DL)
0x16 1 default 00; offset from loaded sky image (8B6) to image entry used for sky.
0x17 1 cloud red component 0-FF
0x18 1 cloud green component 0-FF
0x19 1 cloud blue component 0-FF
0x1A 1 unsigned byte Nonzero='water'; also pulls the object ambient light value...
0x1B 1 RESERVED
/*water-specific*/
0x1C 2 default -1000; water image repeat value. larger = more repetition (pushed to DL)
0x1E 1 default 01 or 02; offset to loaded water image entry.
0x1F 1 water highlight red component 0-FF
0x20 1 water highlight green component 0-FF
0x21 1 water highlight blue component 0-FF
0x22 1 world concavity distort! positive makes world concave, negative world convex. distorts perspective
0x23 1 RESERVED
currently active sky 8003E2B0, first sky at 8003E300
format is the same as NTSC, so that means it will be really easy to port it!
8003E2B4 [float] near fog value
8003E2B8 [float] near fog * (intensity/far intensity)
8003E2BC intensity
8003E2C0 far intensity
8003E2C4 fog colour
8003E2C8 [float] cloud repeat value
8003E2CC offset to sky image
8003E2D0 [float] red component
8003E2D4 [float] green component
8003E2D8 [float] blue component
8003E2DC water flag
8003E2E0 [float] water repeat value
8003E2E4 offset to water image
8003E2E8 [float] red component
8003E2EC [float] green component
8003E2F0 [float] blue component
8003E2F4 [float] world distort

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@ -1,535 +0,0 @@
fog elements, typically 0x5C
@4d88
80044928
80044940
80044c00
80044c28
80044c50
800449c8
80044ab0
80044b58
80044c68
80044ca0
format: 0x5c per entry
0x0 4 stage ID number (or multiple thereof)
(these values are more dedicated to obscuring stage/object elements)
0x4 4 (float) odd blend multiplier. pervasiveness of fog on rendered surfaces (ie. ground) closer than near fog value. Also affects the z index for the viewport to some degree but not on PAL.
0x8 4 (float) far fog value; beyond this is complete obscurity
0xC 4 (float) near fog value; distance from player to start of fog gradient
0x10 4 (float) max obj vis. range; furthest dist standard (non-door) obj and actors are visible at
0x14 4 (float) obj obfuscation range; objs start to 'fade' at this distance
0x18 4 (float) default 0 min obj vis range; nearest stand. objs are visible at. Always set to zero!
(note: these values are more dedicated to actual ambient fog lighting effect)
0x1C 4 long default 999 All Objects: difference between near and far ambient light. Intensity, in other words
0x20 4 long default 996 BG: dif. in light. smaller # = foggier near player
0x24 4 long default 1000 far ambient light value value. used with above two values
I think this is when fog occurs, and above two are subtracted to create the near fog boundry.
0x28 1 red component 0-FF
0x29 1 green component 0-FF
0x2A 1 blue component 0-FF
0x2B 1 clouds 1-on/0-off
0x2C 4 (float) default 5000; cloud image repeat value. larger = more repetitions (pushed to DL)
0x30 2 default 0000; offset from loaded sky image (8B6) to image entry used for sky.
0x32 2 reserved (0)
0x34 4 (float) cloud Red channel (alpha->red)
0x38 4 (float) cloud Green channel
0x3C 4 (float) cloud Blue channel
0x40 1 unsigned byte Nonzero='water'; also pulls the object ambient light value...
0x41 3 reserved (0)
0x44 4 (float) default -1000; water image repeat value. larger = more repetition (pushed to DL)
0x48 2 default 0001 or 0002; offset to loaded water image entry.
0x4A 2 reserved
0x4C 4 (float) water Red channel; these three values affect water highlight near the player only
0x50 4 (float) water Green channel
0x54 4 (float) water Blue channel
0x58 4 (float) world concavity distort! positive makes world concave, negative world convex. distorts perspective
Note: stages 1A, 36, default omit fog data (0x4-0x24 above):
0x0 stage ID
0x4 fog colour
0x8 cloud repeat value
etc...
currently active sky 4db0
81044dd4 ????
81044dd6 ????
water tag 4dec
01000000
statue 81044E12 0016
81044e38 0000
81044e3a 0801
-----------
control 81044E6E 0017
81044e94 0000
81044e96 0000
-----------
Archives 81044ECA 0018
81044EF0 0000
81044EF2 0001
-----------
train 81044F26 0019
81044f4c 0000
81044f4e 0801
part 2 81044F82 007D
81044fa8 0000
81044faa 0801
-----------
Streets 81044FDE 001D
81045004 1018
81045006 2001
-----------
depot 8104503A 001E
81045060 0000
81045062 0801
-----------
complex 81045096 001F
810450bc 2800
810450be 0001
-----------
Dam 810450F2 0021
81045118 1030
8104511A 6001
sky part 2 8104514E 03A5
81045174 1030
81045176 6001
-----------
facility 810451AA 0022
810451d0 1020
810451d2 1000
facility gas leak? 81045206 0086
8104522c 4080
8104522e 4000
-----------
Runway 81045262 0023
81045288 1030
8104528A 4001
-----------
Surface 1 810452BE 0024
810452E4 6060
810452E6 8001
-----------
jungle 8104531A 0025
81045340 459c
81045342 4000
-----------
temple 81045376 0026
8104539c 1818
8104539e 2801
-----------
Caverns 810453D2 0027
810453F8 0800
810453FA 0800
-----------
Cradle 8104542E 0029
81045454 6080
81045456 A001
-----------
Surface 2 8104548A 002B
810454B0 2010
810454B2 1001
sky part 2 810454E6 03AF
8104550C 2010
8104550E 1001
-----------
Bunker 2 81045542 001B
81045568 1000
8104556A 0001
-----------
complex MULTI
2pl 8104559E 00D1
810455C4 8078
810455C6 7000
3pl 810455FA 0135
81045620 8078
81045622 7000
4pl 81045656 0199
8104567C 8078
8104567E 7000
-----------
cradle MULTI
2pl 810456B2 00F1
810456D8 6080
810456DA A001
3pl 8104570E 0155
81045734 6080
81045736 A001
4pl 8104576A 01B9
81045790 6080
81045792 A001
-----------
temple MULTI
2pl 810457C6 00EE
810457ec 1818
810457ee 1801
3pl 81045822 0152
81045848 1818
8104584a 1801
4pl 8104587E 01B6
810458a0 1818
810458a2 1801
-----------
caverns MULTI
2pl 810458DA 00EF
81045900 0800
81045902 0800
3pl 81045936 0153
8104595C 0800
8104595E 0800
4pl 81045992 01B7
810459B8 0800
810459BA 0800
-----------
default multiplayer
statue, library/basement/stack, caves, bunker 2, facility, egyptian, archives
2pl 810459EE 00C8
81045A14 0000
81045A16 0000
3pl 81045A4A 012C
81045A70 0000
81045A72 0000
4pl 81045AA6 0190
81045ACC 0000
81045ACE 0000
-----------
citadel 81045B02 0028
81045B28 1850
81045B2A 3801
-----------
citadel MULTI
2pl 81045B5E 00F0
81045B84 1850
81045B86 3801
3pl 81045BBA 0154
81045BE0 1850
81045BE2 3801
4pl 81045C16 01B8
81045C3C 1850
81045C3E 3801
-----------
complex'S SECOND SKY! MULTI
2pl 81045C72 00E7
81045C98 2800
81045C9C 0001
3pl 81045CCE 014B
81045CF4 2800
81045CF6 0001
4pl 81045D28 01AF
81045D50 2800
81045D52 0001
-----------
aztec 81045D86 001C
81045dac 0000
81045dae 0001
second sky 81045DE2 0080
81045E08 0000
81045E0A 0001
-----------
egyptian 81045E3E 0020
81045e64 1030
81045e66 6001
second sky 81045E9A 0084
81045EC0 0000
81045EC2 0001
-----------
blank entry at 5ef4
followed by unusually different (yet valid) format
-----------
default/bunker 1 81045F50 FFFF + 81045F52 FFFF
81045F54 0010
81045F56 4000
-----------
frigate 81045F8A 001A
81045F8C 1030
81045F8E 6001
-----------
cuba 81045FC2 0036
81045FC4 3040
81045FC6 1000
--------------------------
0x64 b/w skies. solo 1, solo 2, multi 2pl, multi 3pl, multi 4pl. (I think...)
FFFF 1pl default (bunker 1,silo)
0009 {1pl bunker 1 beta}
0014 {1pl silo beta}
0016 1pl statue
0017 1pl control
0018 1pl archives
0019 1pl train
001A 1pl frigate
001B 1pl Bunker 2
001C 1pl aztec
001D 1pl streets
001E 1pl depot
001F 1pl complex
0020 1pl egypt
0021 1pl dam
0022 1pl facility
0023 1pl runway
0024 1pl surface 1
0025 1pl jungle
0026 1pl temple
0027 1pl caverns
0028 1pl citadel
0029 1pl Cradle
002B 1pl surface 2
002D {1pl Basement beta}
002E {1pl Stacks beta}
0030 {1pl Library beta}
0032 {1pl Caves beta}
0036 1pl cuba
0064 {1pl #2 default sky}
006D {1pl #2 bunker 1 beta}
0078 {1pl #2 silo beta}
007A {1pl #2 statue beta}
007B {1pl #2 control beta}
007C {1pl #2 archives beta}
007D 1pl #2 train
007E {1pl #2 frigate beta}
007F {1pl #2 Bunker 2 beta}
0080 1pl #2 aztec
0081 {1pl #2 streets beta}
0082 {1pl #2 depot beta}
0083 {1pl #2 complex beta}
0084 1pl #2 egypt
0085 {1pl #2 dam beta}
0086 1pl #2 facility
0087 {1pl #2 runway beta}
0088 {1pl #2 surface 1 beta}
0089 {1pl #2 jungle beta}
008A {1pl #2 temple beta}
008B {1pl #2 caverns beta}
008C {1pl #2 citadel beta}
008D {1pl #2 cradle beta}
008E {1pl #2 surface 2 beta}
0094 {1pl #2 library}
009A {1pl #2 cuba beta}
00C8 2pl default multi
00D1 2pl complex (BETA BUNKER 1?)
00DC {2pl silo beta}
00DE {2pl statue beta}
00DF {2pl control beta}
00E0 {2pl archives beta}
00E1 {2pl train beta}
00E2 {2pl frigate beta}
00E3 {2pl bunker 2 beta}
00E4 {2pl aztec beta}
00E5 {2pl streets beta}
00E6 {2pl depot beta}
00E7 2pl #2 complex
00E8 {2pl egypt beta}
00E9 {2pl dam beta}
00EA {2pl facility beta}
00EB {2pl runway beta}
00EC {2pl surface 1 beta}
00ED {2pl jungle beta}
00EE 2pl Temple
00EF 2pl caverns
00F0 2pl citadel
00F1 2pl cradle
00F2 {2pl surface 2 beta}
00F8 {2pl library}
00FE {2pl cuba beta}
012C 3pl default multi
0135 3pl complex {bunker 1?}
0140 {3pl silo beta}
0142 {3pl statue beta}
0143 {3pl control beta}
0144 {3pl archives beta}
0145 {3pl train beta}
0146 {3pl frigate beta}
0147 {3pl bunker 2 beta}
0148 {3pl aztec beta}
0149 {3pl streets beta}
014A {3pl depot beta}
014B 3pl #2 complex
014C {3pl egypt beta}
014D {3pl dam beta}
014E {3pl facility beta}
014F {3pl runway beta}
0150 {3pl surface 1 beta}
0151 {3pl jungle beta}
0152 3pl temple
0153 3pl caverns
0154 3pl citadel
0155 3pl cradle
0156 {3pl surface 2 beta}
015C {3pl library}
0162 {3pl cuba beta}
0190 4pl default multi
0199 4pl complex {bunker 1?}
01A4 {4pl silo beta}
01A6 {4pl statue beta}
01A7 {4pl control beta}
01A8 {4pl archives beta}
01A9 {4pl train beta}
01AA {4pl frigate beta}
01AB {4pl bunker 2 beta}
01AC {4pl aztec beta}
01AD {4pl streets beta}
01AE {4pl depot beta}
01AF 4pl #2 complex
01B0 {4pl egypt beta}
01B1 {4pl dam beta}
01B2 {4pl facility beta}
01B3 {4pl runway beta}
01B4 {4pl surface 1 beta}
01B5 {4pl jungle beta}
01B6 4pl temple
01B7 4pl caverns
01B8 4pl citadel
01B9 4pl cradle
01BA {4pl surface 2 beta}
01C0 {4pl library}
01C6 {4pl cuba beta}
x9 cutscenes?
03A5 1pl #2 dam?
03AF 1pl #2 surface 2?
one blank entry in the chart...plus room after it
---------------------------
statue multiplayer skies
81044E12 00DE
D002B523 0003
81044E12 0142
D002B523 0004
81044E12 01A6
control multiplayer skies
(not necessary)
81044E6E 00DF
D002B523 0003
81044E6E 0143
D002B523 0004
81044E6E 01A7
archives multiplayer skies
81044ECA 00E0
D002B523 0003
81044ECA 0144
D002B523 0004
81044ECA 01A8
train multiplayer skies
81044F26 00E1
D002B523 0003
81044F26 0145
D002B523 0004
81044F26 01A9
frigate multiplayer skies
(minus water...)
81045F8A 00E2
D002B523 0003
81045F8A 0146
D002B523 0004
81045F8A 01AA
Bunker 2 multiplayer skies
81045542 00E3
D002B523 0003
81045542 0147
D002B523 0004
81045542 01AB
aztec multiplayer skies
81045D86 00E4
D002B523 0003
81045D86 0148
D002B523 0004
81045D86 01AC
streets multiplayer skies
81044FDE 00E5
D002B523 0003
81044FDE 0149
D002B523 0004
81044FDE 01AD
depot multiplayer skies
8104503A 00E6
D002B523 0003
8104503A 014A
D002B523 0004
8104503A 01AE
egyptian multiplayer skies
81045E3E 00E8
D002B523 0003
81045E3E 014C
D002B523 0004
81045E3E 01B0
egyptian after dark multiplayer skies
81045E9A 00E8
D002B523 0003
81045E9A 014C
D002B523 0004
81045E9A 01B0
dam multiplayer skies
(minus the water...)
810450F2 00E9
D002B523 0003
810450F2 014D
D002B523 0004
810450F2 01B1
facility multiplayer skies
810451AA 00EA
D002B523 0003
810451AA 014E
D002B523 0004
810451AA 01B2
runway multiplayer skies
81045262 00EB
D002B523 0003
81045262 014F
D002B523 0004
81045262 01B3
surface 1 multiplayer skies
810452BE 00EC
D002B523 0003
810452BE 0150
D002B523 0004
810452BE 01B4
jungle multiplayer skies
8104531A 00ED
D002B523 0003
8104531A 0151
D002B523 0004
8104531A 01B5
surface 2 multiplayer skies
8104548A 00F2
D002B523 0003
8104548A 0156
D002B523 0004
8104548A 01BA
surface 2 sky in surface 1 multi
8104548A 00EC
D002B523 0003
8104548A 0150
D002B523 0004
8104548A 01B4
cuba multiplayer skies
81045FC2 00FE
D002B523 0003
81045FC2 0162
D002B523 0004
81045FC2 01C6

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@ -1,79 +0,0 @@
format:
0x0 1 type
0x1 1 #commands, 0x8 each
0x2 2 RESERVED
0x4 var data
for multi-command entries, 645 is a type identifier for portal offsets and 65 the identifier for room numbers.
type 00: end
00.01.0000 00000000
type 01: push d to stack
01.01.0000 dddddddd
type 02: pull off stack
02.01.0000 00000000
type 03: AND and merge last two values on stack
03.01.0000 00000000
type 04: OR and merge last two values on stack
04.01.0000 00000000
type 05: ! last value on stack
05.01.0000 00000000
type 06: XOR and merge last two values on stack
06.01.0000 00000000
type 14: push TRUE/FALSE to stack if within range of rooms
14.03.0000 00000000 65000000 000000rr 65000000 000000rr
type 1E: force visible
1E.01.0000 00000000
type 1F: match visibility to that of portal
1F.02.0000 00000000 64000000 pppppppp
type 20: add visible room
20.02.0000 00000000 65000000 000000rr
type 21: initialize block; removes visibility
21.01.0000 00000000
type 22: make visible if portal can view room
22.02.0000 00000000 64000000 pppppppp
type 23: remove visibility if portal can not view room
23.02.0000 00000000 64000000 pppppppp
type 24: disable room (1->room[r]+34)
24.02.0000 00000000 65000000 000000rr
type 25: disable rooms (1->room[r1:r2]+34)
24.03.0000 00000000 65000000 000000r1 65000000 000000r2
type 26: preload room
26.02.0000 00000000 65000000 000000rr
type 27: preload range of rooms
27.03.0000 00000000 65000000 000000rr 65000000 000000rr
type 50: IF statement (re-entrant)
50.01.0000 00000000
type 51: disable reading commands; if reading disabled, also disables parent
51.01.0000 00000000
type 52: ENDIF FALSE, command reading enabled
52.01.0000 00000000
type 5A: IF(pulled condition) statement (re-entrant)
5A.01.0000 00000000
type 5B: toggle reading/ignoring commands
5B.01.0000 00000000
type 5C: ENDIF
5C.01.0000 00000000

View File

@ -1,620 +0,0 @@
S1=p->current command [801B68EC]
command structure:
0x0 1 type
0x1 1 minimum number of commands expected in type
0x2 2 reserved
0x4 4 data
parsing through 7F0B8480
processing uses commands @ 80058C80 (0xD) and 80058CB4 (0x28)
7F0B84D0 type 00 normal termination [set position to start and break]
7F0B84D8 type 01 push to stack
7F0B84F8 type 02 pull from stack
7F0B8518 type 03 & and merge last two on stack
7F0B8548 type 04 | and merge last two on stack
7F0B8578 type 05 ! last on stack
7F0B85A0 type 06 ^ last two on stack
7F0B89F0 type 07 terminate (invalid type)
7F0B89F0 type 08 terminate (invalid type)
7F0B89F0 type 09 terminate (invalid type)
7F0B89F0 type 0A terminate (invalid type)
7F0B89F0 type 0B terminate (invalid type)
7F0B89F0 type 0C terminate (invalid type)
7F0B89F0 type 0D terminate (invalid type)
7F0B89F0 type 0E terminate (invalid type)
7F0B89F0 type 0F terminate (invalid type)
7F0B89F0 type 10 terminate (invalid type)
7F0B89F0 type 11 terminate (invalid type)
7F0B89F0 type 12 terminate (invalid type)
7F0B89F0 type 13 terminate (invalid type)
7F0B85D0 type 14 push true/false if in range of rooms
7F0B89F0 type 15 terminate (invalid type)
7F0B89F0 type 16 terminate (invalid type)
7F0B89F0 type 17 terminate (invalid type)
7F0B89F0 type 18 terminate (invalid type)
7F0B89F0 type 19 terminate (invalid type)
7F0B89F0 type 1A terminate (invalid type)
7F0B89F0 type 1B terminate (invalid type)
7F0B89F0 type 1C terminate (invalid type)
7F0B89F0 type 1D terminate (invalid type)
7F0B8614 type 1E force visible
7F0B8654 type 1F match portal visibility
7F0B8788 type 20 add visible room
7F0B8914 type 21 remove visibility [save S7->S4]
7F0B86A8 type 22 visible if seen through portal
7F0B8714 type 23 not visible if not seen through portal
7F0B87F4 type 24 disable room
7F0B8828 type 25 disable range of rooms
7F0B8884 type 26 preload room
7F0B88B8 type 27 preload range of rooms
7F0B8930 type 50 if statement
7F0B896C type 51 don't execute commands even on return
7F0B8954 type 52 endif and continue executing commands
7F0B89F0 type 53 terminate (invalid type)
7F0B89F0 type 54 terminate (invalid type)
7F0B89F0 type 55 terminate (invalid type)
7F0B89F0 type 56 terminate (invalid type)
7F0B89F0 type 57 terminate (invalid type)
7F0B89F0 type 58 terminate (invalid type)
7F0B89F0 type 59 terminate (invalid type)
7F0B8990 type 5A if(pull from stack) statement
7F0B89C8 type 5B toggle execute vs read only
7F0B89E0 type 5C endif
Actual execution is more complex than originaly deemed. There are multiple tables of entries, and entries can be toggled on-off during processing. Execution only occurs when breaks are intered, so table management is key. Aegh...
+-+ types in detail
7F0B8374 ECEA4 push A0 onto 800448A8 table; V0=value written
accepts: A0=value to set onto table
LUI A1,8004
ADDIU A1,A1,48F8
LW V1,0000 (A1) ;V1=800448F8: index.cur, or alternately total entries
LUI AT,8004
OR V0,A0,R0 ;V0=A0: value
SLL T6,V1,0x2
ADDU AT,AT,T6
SW A0,48A8 (AT) ;A0->800448A8+offset: save value to final (current) entry
ADDIU AT,R0,0014 ;AT=0x14
ADDIU T7,V1,0001 ;T7=?+1 increment index
DIV T7,AT
MFHI T8 ;T8=T7%0x14
SW T8,0000 (A1) ;save new index
JR RA
NOP
7F0B83B0 ECEE0 pull V0 from 800448A8 table
LUI A0,8004
ADDIU A0,A0,48F8
LW T6,0000 (A0) ;T6=800448F8: index.cur
ADDIU AT,R0,0014 ;AT=0x14
LUI V1,8004
ADDIU T7,T6,0013 ;previous
DIV T7,AT
MFHI T8
SLL T0,T8,0x2 ;T0=previous index -> offset
ADDU V1,V1,T0
SW T8,0000 (A0) ;save new index value to 800448F8
JR RA
LW V0,48A8 (V1) ;V0=800448A8+offset: value pulled from table
7F0B83E4 ECF14 pull V0 from entry A0 in 800458A8 table
accepts: A0=entry to pull
LUI T6,8004
LW T6,48F8 (T6) ;T6=800448F8: #entries
ADDIU AT,R0,0014 ;AT=0x14
LUI V0,8004
SUBU T7,T6,A0 ;T7=index.cur-A0: nth entry from end to start
ADDIU T8,T7,0013 ;T8=T7-1: previous entry
DIV T8,AT
MFHI T9 ;T9=T8%0x14
SLL T0,T9,0x2 ;T0=T9->offset
ADDU V0,V0,T0
JR RA
LW V0,48A8 (V0) ;V0->800448A8+offset: value pulled from table[A0]
+_+
7F0B8414 ECF44 parse global visibility command list
accepts: A0=p->cmd, A1=mode
ADDIU SP,SP,FF80
SW S3,0024 (SP)
SW S2,0020 (SP)
SW S1,001C (SP)
LUI AT,8008
OR S1,A0,R0 ;S1=A0: p->cmd
OR S2,A1,R0 ;S2=A1: mode
SW RA,003C (SP)
SW S8,0038 (SP)
SW S7,0034 (SP)
SW S6,0030 (SP)
SW S5,002C (SP)
SW S4,0028 (SP)
SW S0,0018 (SP)
ADDIU S3,R0,0001 ;S3=1
BNEZ A0,7F0B8460 ;return if A0 NULL
SW R0,1610 (AT) ;0->80081610: return value for 'conditional' types
BEQ R0,R0,7F0B89F4
OR V0,A0,R0
//7F0B8460:
LUI S8,8008
LUI S6,8008
LUI S4,8004
ADDIU S4,S4,48FC ;S4= 800448FC
ADDIU S6,S6,1600 ;S6= 80081600
ADDIU S8,S8,A0B0 ;S8= 8007A0B0: p->BONDdata
ADDIU S7,R0,0001 ;S7= 1
ADDIU S5,R0,0001 ;S5= 1
//7F0B8480: process command
LBU A0,0000 (S1) ;A0=cmd.type
SLTI AT,A0,0028
BNEZ AT,7F0B84B0 ;skip if 0-27
ADDIU T6,A0,FFB0
//7F0B8490: commands 50-5C
SLTIU AT,T6,000D
BEQ AT,R0,7F0B89F0 ;return if invalid
SLL T6,T6,0x2
LUI AT,8006
ADDU AT,AT,T6
LW T6,8C80 (AT) ;T6=80058C80+offset: handler for types 50-5C
JR T6
NOP
//7F0B84B0: commands 0-27
SLTIU AT,A0,0028
BEQ AT,R0,7F0B89F0 ;return if invalid
SLL T7,A0,0x2
LUI AT,8006
ADDU AT,AT,T7
LW T7,8CB4 (AT) ;T6=80058CB4+offset: handler for types 50-5C
JR T7
NOP
7F0B84D0 type 00 break
BEQ R0,R0,7F0B89F4 ;return V0=p->cmd
OR V0,S1,R0
7F0B84D8 type 01 ???; push DATA onto 800448A8 stack
BEQL S2,R0,7F0B84EC ;if mode 0, ignore command
LBU T8,0001 (S1)
JAL 7F0B8374 ;push A0 onto table
LW A0,0004 (S1) ;A0=data
//7F0B84E8: advance
LBU T8,0001 (S1) ;cmd.size
SLL T9,T8,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T9 ;S1=next cmd
7F0B84F8 type 02 ???; pull V0 off 800448A8 stack
BEQL S2,R0,7F0B850C ;if mode 0, ignore command
LBU T0,0001 (S1)
JAL 7F0B83B0 ;pull V0 from stack
NOP
//7F0B8508:
LBU T0,0001 (S1) ;cmd.size
SLL T1,T0,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T1 ;S1=next cmd
7F0B8518 type 03 ???; AND last two values on stack and replace
BEQL S2,R0,7F0B853C ;if mode 0, ignore command
LBU T2,0001 (S1)
JAL 7F0B83B0 ;pull V0 off stack
NOP
JAL 7F0B83B0 ;pull V0 off stack
OR S0,V0,R0 ;S0=V0: value 1
JAL 7F0B8374 ;push A0 onto stack
AND A0,V0,S0 ;A0=value2 & value1
//7F0B8538:
LBU T2,0001 (S1) ;cmd.size
SLL T3,T2,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T3 ;S1=next cmd
7F0B8548 type 04 ??? OR last two values on stack and replace
BEQL S2,R0,7F0B856C ;if mode 0, ignore command
LBU T4,0001 (S1)
JAL 7F0B83B0 ;pull V0 off stack
NOP
JAL 7F0B83B0 ;pull V0 off stack
OR S0,V0,R0 ;S0=V0: value 1
JAL 7F0B8374 ;push A0 onto stack
OR A0,V0,S0 ;A0=V0 | S0
//7F0B8568:
LBU T4,0001 (S1) ;cmd.size
SLL T5,T4,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T5 ;S1=next cmd
7F0B8578 type 05 ??? ! last value on stack
BEQL S2,R0,7F0B8594 ;if mode 0, ignore command
LBU T6,0001 (S1)
JAL 7F0B83B0 ;pull V0 off stack
NOP
JAL 7F0B8374 ;push A0 onto stack
SLTIU A0,V0,0001 ;A0=!V0
//7F0B8590:
LBU T6,0001 (S1) ;cmd.size
SLL T7,T6,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T7 ;S1=next cmd
7F0B85A0 type 06 ??? XOR last two values on stack
BEQL S2,R0,7F0B85C4 ;if mode 0, ignore command
LBU T8,0001 (S1)
JAL 7F0B83B0 ;pull V0 off stack
NOP
JAL 7F0B83B0 ;pull V0 off stack
OR S0,V0,R0 ;S0=V0: value 1
JAL 7F0B8374 ;push A0 onto stack
XOR A0,V0,S0 ;A0=value2^value1
//7F0B85C0:
LBU T8,0001 (S1) ;cmd.size
SLL T9,T8,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T9 ;S1=next cmd
7F0B85D0 type 14 range of rooms capable of sight
BEQ S2,R0,7F0B8604 ;if mode 0, ignore command
LUI V0,8004
LW V0,4838 (V0) ;V0=80044838: current room?
LW T0,000C (S1) ;T0=room #1
SLT A0,V0,T0
XORI A0,A0,0001 ;A0=TRUE if ? >= room1
BEQ A0,R0,7F0B85FC ;branch if included in range
NOP
LW T1,0014 (S1) ;T1=room #2
SLT A0,T1,V0
XORI A0,A0,0001 ;A0=TRUE if room2 >= ?
//7F0B85FC: pushes 1 to stack if cur. within range
JAL 7F0B8374 ;push A0 onto stack
NOP
//7F0B8604:
LBU T2,0001 (S1) ;cmd.size
SLL T3,T2,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T3 ;S1=next cmd
7F0B8614 type 1E force room visible without need of portals
BEQL S2,R0,7F0B8648 ;if mode 0, ignore command
LBU T4,0001 (S1)
LW V0,0000 (S8) ;V0=p->BONDdata
LWC1 F4,1118 (V0)
SWC1 F4,0000 (S6) ;BONDdata+1118 -> 80081600+0
LWC1 F6,111C (V0)
SWC1 F6,0004 (S6) ;BONDdata+111C -> 80081600+4
LWC1 F8,1120 (V0)
SWC1 F8,0008 (S6) ;BONDdata+1120 -> 80081600+8
LWC1 F10,1124 (V0)
SW R0,0000 (S4) ;0->800448FC
SWC1 F10,000C (S6) ;BONDdata+1124 -> 80081600+C
//7F0B8644:
LBU T4,0001 (S1) ;cmd.size
SLL T5,T4,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T5 ;S1=next cmd
7F0B8654 type 1F match portal visibility
BEQ S2,R0,7F0B8698 ;if mode 0, ignore command
OR A1,S6,R0 ;A1= 80081600
JAL 7F0B5864
LW A0,000C (S1) ;A0=portal
BNEL V0,R0,7F0B8678 ;disable unless referenced
LW A1,0000 (S8)
BEQ R0,R0,7F0B8698
SW S7,0000 (S4) ;1->800448FC
//7F0B8674: V0!=0
LW A1,0000 (S8) ;A1=p->BONDdata
OR A0,S6,R0 ;A0= 80081600
JAL 7F0B5BDC ;V0=TRUE if A0 in line-of-sight with A1
ADDIU A1,A1,1118 ;A1=BONDdata+1118
BNEL V0,R0,7F0B8698 ;if set, make visible: 0->800448FC
SW R0,0000 (S4)
BEQ R0,R0,7F0B8698 ;else 1->800448FC
SW S7,0000 (S4) ;1->800448FC
//7F0B8694:
SW R0,0000 (S4)
//7F0B8698:
LBU T6,0001 (S1) ;cmd.size
SLL T7,T6,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T7 ;S1=next cmd
7F0B8788 type 20 add visible room
BEQL S2,R0,7F0B87E8 ;if mode 0, ignore command
LBU T7,0001 (S1)
LW T4,0000 (S4)
OR A1,S6,R0 ;A1=S6: 80081600
BNEL T4,R0,7F0B87E8 ;ignore if 800448FC set: not visible
LBU T7,0001 (S1)
JAL 7F0B5208
LW A0,000C (S1) ;A0=room#
BEQ V0,R0,7F0B87E4 ;ignore if FALSE
OR A1,R0,R0 ;A1=0
LW A0,000C (S1) ;A0=room#
OR A2,S6,R0 ;A2=S6: 80081600
JAL 7F0B39BC
OR A3,R0,R0 ;A3=0
//7F0B87C0: add room to list and increment total
LUI V1,8008
LW V1,C038 (V1) ;V1=8007C038: number of visible rooms in list
LW T5,000C (S1) ;T5=room#
LUI AT,8008
ADDU AT,AT,V1
SB T5,BFA0 (AT) ;T5->8007BFA0+offset: save room# to list
LUI AT,8008
ADDIU T6,V1,0001 ;T6=V1+1
SW T6,C038 (AT) ;T6->8007C038: save new count
//7F0B87E4:
LBU T7,0001 (S1) ;cmd.size
SLL T8,T7,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T8 ;S1=next cmd
7F0B8914 type 21 begin new block; set not visible
BEQL S2,R0,7F0B8924 ;if mode 0, ignore command
LBU T5,0001 (S1)
SW S7,0000 (S4) ;1->800448FC
//7F0B8920:
LBU T5,0001 (S1) ;cmd.size
SLL T6,T5,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T6 ;S1=next cmd
7F0B86A8 type 22 make visible if portal can view room
BEQ S2,R0,7F0B8704 ;if mode 0, ignore command
ADDIU A1,SP,0068 ;A1=SP+68
JAL 7F0B5864
LW A0,000C (S1) ;A0=cmd+C: portal#
BEQL V0,R0,7F0B8708 ;ignore if not referenced
LBU T9,0001 (S1)
LW A1,0000 (S8) ;A1=p->cur.BONDdata
ADDIU A0,SP,0068 ;A0=SP+68
JAL 7F0B5BDC ;V0=TRUE if A0 in line-of-sight with A1
ADDIU A1,A1,1118 ;A1=p->cur.BONDdata+1118: unknown float use in no_portals_necessary
BEQL V0,R0,7F0B8708 ;ignore if portal not visible
LBU T9,0001 (S1)
//7F0B86D8: copy perspective info or something like that
LW T8,0000 (S4) ;T8=800448FC: current visibility setting
ADDIU A1,SP,0068 ;A1=SP+68
OR A0,S6,R0 ;A0=S6:
BEQ T8,R0,7F0B86FC ;skip if room already set visible
NOP
JAL 7F0B5D58 ;copies 4 floats from A1->A0
OR A0,S6,R0 ;A0=S6: 80081600
BEQ R0,R0,7F0B8704
SW R0,0000 (S4) ;0->800448FC: make visible
//7F0B86FC:
JAL 7F0B5CC0
ADDIU A1,SP,0068 ;A1=SP+68
//7F0B8704:
LBU T9,0001 (S1) ;cmd.size
SLL T0,T9,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T0 ;S1=next cmd
7F0B8714 type 23 remove visibility if portal can not view room
BEQL S2,R0,7F0B877C ;if mode 0, ignore command
LBU T2,0001 (S1)
LW T1,0000 (S4) ;T1=800448FC
ADDIU A1,SP,0058 ;A1=SP+58
BNEL T1,R0,7F0B877C ;ignore command if T1!=0
LBU T2,0001 (S1)
JAL 7F0B5864
LW A0,000C (S1) ;A0=portal#
BNEL V0,R0,7F0B8748
LW A1,0000 (S8)
BEQ R0,R0,7F0B8778
SW S7,0000 (S4) ;1->800448FC
//7F0B8744: when V0!=0
LW A1,0000 (S8)
ADDIU A0,SP,0058 ;A0=SP+58
JAL 7F0B5BDC ;V0=TRUE if A0 in line-of-sight with A1
ADDIU A1,A1,1118 ;A1=cur.BONDdata+1118
BNEZ V0,7F0B8764 ;if not in line-of-sight, kill visibility
OR A0,S6,R0 ;A0=S6: 80081600
BEQ R0,R0,7F0B8778
SW S7,0000 (S4) ;1->800448FC
//7F0B8764:
JAL 7F0B5BDC ;V0=TRUE if A0 in line-of-sight with A1
ADDIU A1,SP,0058 ;A1=SP+58
BNEL V0,R0,7F0B877C ;if not within perspective also kill visibility
LBU T2,0001 (S1)
SW S7,0000 (S4) ;1->800448FC
//7F0B8778:
LBU T2,0001 (S1) ;cmd.size
SLL T3,T2,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T3 ;S1=next cmd
7F0B87F4 type 24 save 1 to entry +34 in room table
BEQL S2,R0,7F0B881C ;if mode 0, ignore command
LBU T1,0001 (S1)
LW T9,000C (S1) ;T9=room#
LUI AT,8004
SLL T0,T9,0x2
ADDU T0,T0,T9
SLL T0,T0,0x4 ;T0=T9*0x50
ADDU AT,AT,T0
SB S5,1448 (AT) ;1->80041414+34+offset:
//7F0B8818:
LBU T1,0001 (S1) ;cmd.size
SLL T2,T1,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T2 ;S1=next cmd
7F0B8828 type 25 set flag for rooms between val1 and val2
BEQL S2,R0,7F0B8878 ;if mode 0, ignore command
LBU T7,0001 (S1)
LW V0,000C (S1) ;V0=room.start
LW T3,0014 (S1) ;T3=room.end
LUI T5,8004
SLL T4,V0,0x2
SLT AT,T3,V0
BNEZ AT,7F0B8874 ;end if room.end < room.start
ADDU T4,T4,V0
SLL T4,T4,0x4 ;T4=value1*0x50
ADDIU T5,T5,1414
ADDU V1,T4,T5 ;V1=80041414+offset: p->room
SB S5,0034 (V1) ;1->V1+34: ?->80041414+val1offset+34
//7F0B885C: loop while cur>=end
LW T6,0014 (S1) ;T6=end
ADDIU V0,V0,0001 ;V0++ next room
ADDIU V1,V1,0050 ;V1+=50 next entry
SLT AT,T6,V0
BEQL AT,R0,7F0B885C
SB S5,0034 (V1) ;1->room+34:
//7F0B8874:
LBU T7,0001 (S1) ;cmd.size
SLL T8,T7,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T8 ;S1=next cmd
7F0B8884 type 26 preload room
BEQL S2,R0,7F0B88AC ;if mode 0, ignore command
LBU T0,0001 (S1)
BEQL S3,R0,7F0B88AC ;skip if room.loaded flag not set
LBU T0,0001 (S1)
JAL 7F0B6314
LW A0,000C (S1) ;A0=room#
SLTIU S3,V0,0001 ;S3= !value: TRUE if room.loaded flag set
ANDI T9,S3,00FF
OR S3,T9,R0 ;(byte) S3
//7F0B88A8:
LBU T0,0001 (S1) ;cmd.size
SLL T1,T0,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T1 ;S1=next cmd
7F0B88B8 type 27 preload range of rooms
BEQL S2,R0,7F0B8908 ;if mode 0, ignore command
LBU T3,0001 (S1)
LW S0,000C (S1) ;S0=room.start
LW V1,0014 (S1) ;V1=room.end
SLT AT,V1,S0 ;TRUE if end<start
BNEL AT,R0,7F0B8908
LBU T3,0001 (S1)
//7F0B88D4: while val2<val1
BEQL S3,R0,7F0B88F8 ;skip if room.loaded flag not set
ADDIU S0,S0,0001 ;S0++ val1++
JAL 7F0B6314
OR A0,S0,R0 ;A0=room#
SLTIU S3,V0,0001 ;S3= !value: TRUE if room.loaded flag set
ANDI T2,S3,00FF
OR S3,T2,R0 ;(byte) S3
LW V1,0014 (S1) ;V1=end
ADDIU S0,S0,0001 ;S0++ room#++
//7F0B88F8:
SLT AT,V1,S0 ;TRUE if end<cur
BEQ AT,R0,7F0B88D4
NOP
//7F0B8904:
LBU T3,0001 (S1) ;cmd.size
SLL T4,T3,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T4 ;S1=next cmd
7F0B8930 type 50 re-entrant: calls following command block as its own 'thread'
LBU T7,0001 (S1) ;cmd.size
OR A1,S2,R0 ;A1=S2: preserve mode
SLL T8,T7,0x3
JAL 7F0B8414 ;calls this command parser using next command as start!
ADDU A0,T8,S1 ;A0=next command
LBU T9,0001 (V0) ;cmd.size
SLL T0,T9,0x3
BEQ R0,R0,7F0B8480
ADDU S1,V0,T0
7F0B896C type 51 ignore commands; disable reading commands on return if read org. enabled
LBU T3,0001 (S1) ;cmd.size
SLTU V0,R0,S2 ;TRUE if S2
OR S2,R0,R0 ;S2=0 no longer read commands
SLL T4,T3,0x3
BEQ V0,R0,7F0B8480 ;set 80081610 if reading commands
ADDU S1,S1,T4 ;S1=next cmd
LUI AT,8008
BEQ R0,R0,7F0B8480
SW S7,1610 (AT) ;1->80081610
7F0B8954 type 52 return and permit reading commands
LBU T1,0001 (S1) ;cmd.size
LUI AT,8008
SW R0,1610 (AT) ;0->80081610
SLL T2,T1,0x3
BEQ R0,R0,7F0B89F4 ;return V0=p->next command
ADDU V0,S1,T2
7F0B8990 type 5A re-entrant: calls parser in previously set mode, setting mode on return
JAL 7F0B83B0 ;pull V0 off stack
NOP
LBU T5,0001 (S1) ;cmd.size
AND A1,V0,S2 ;A1= mode & result
SLL T6,T5,0x3
JAL 7F0B8414 ;calls this command parser using next command
ADDU A0,T6,S1
LUI T7,8008
LW T7,1610 (T7) ;T7=80081610
OR S1,V0,R0
BEQL T7,R0,7F0B8484 ;if 80081610 set, set mode to 0 (ignore command)
LBU A0,0000 (S1)
BEQ R0,R0,7F0B8480
OR S2,R0,R0
7F0B89C8 type 5B toggle S2 flag (read/ignore commands)
LBU T9,0001 (S1) ;cmd.size
XORI T8,S2,0001
OR S2,T8,R0 ;untoggle S2 flag
SLL T0,T9,0x3
BEQ R0,R0,7F0B8480
ADDU S1,S1,T0 ;S1=next cmd
7F0B89E0 type 5C return p->next command
LBU T1,0001 (S1) ;cmd.size
SLL T2,T1,0x3
BEQ R0,R0,7F0B89F4
ADDU V0,S1,T2 ;V0=p->next command
7F0B89F0 terminate
OR V0,S1,R0 ;return V0=p->cmd
//7F0B89F4: return
LW RA,003C (SP)
LW S0,0018 (SP)
LW S1,001C (SP)
LW S2,0020 (SP)
LW S3,0024 (SP)
LW S4,0028 (SP)
LW S5,002C (SP)
LW S6,0030 (SP)
LW S7,0034 (SP)
LW S8,0038 (SP)
JR RA
ADDIU SP,SP,0080
+_+
7F0B6314 EAE44
accepts: A0=room#
SLL T6,A0,0x2
ADDU T6,T6,A0
LUI T7,8004
ADDIU T7,T7,1414
SLL T6,T6,0x4 ;T6=A0*0x50
ADDU V0,T6,T7
LBU T9,0002 (V0) ;80041414+2+offset: rooms.loaded
ADDIU SP,SP,FFE8
ADDIU T8,R0,0001
SW RA,0014 (SP)
BNEZ T9,7F0B6354 ;return FALSE if models already loaded
SB T8,0035 (V0) ;1->rooms+35:
JAL 7F0B6368
NOP
BEQ 7F0B6358 ;return TRUE
ADDIU V0,R0,0001
//7F0B6354: return FALSE
OR V0,R0,R0
//7F0B6358: return
LW RA,0014 (SP)
ADDIU SP,SP,0018
JR RA
NOP

View File

@ -1,18 +0,0 @@
0x0 4 offset/pointer to portal vertex list
0x4 1 parent room
0x5 1 child room
0x6 1 flags
01
02
0x7 1 counter
F0 repeat counter
0F value
08 set if upper nibble set
Portals are defined by vertex tables at the given offset. These connect the parent room with the child room and are bi-directionally visable.
Byte 7:
F2= lower nibble / 2
if upper nibble set, F2+=F2

View File

@ -1,169 +0,0 @@
Background Data
---------------
Background data consists of three seperate orders of files. The primary background file is an uncompressed binary. This binary contains offsets to the 1172 (z-custom) compressed room data. Room data is partitioned into one or two display lists and a point table. The final file is an 1172 compressed clipping file that dictates the playable area. This will be covered in a seperate document.
The primary background file consists of several sections. First are a list of offsets to the room mapping and point binaries. Second is a list of special globalized visibility, triggering multiple rooms to be visible at once through pseudocode. Lastly are the room portals and a table relating what rooms are interlinked.
The background file's header indicates at what offset each of these is located at. All offsets are relative to the location of the primary background file in ROM and are preceeded by a value, indicating the scope of that offset. Only use the lower three bytes of each offset, and add it to the initial ROM location of the file.
0x0 4 reserved
0x4 4 offset to room data table
0x8 4 offset to portal data table
0xC 4 offset to global visibility commands
---------------
Room Data Table
The room data table contains a wide assortment of data. Each room is positioned within the level using the position data given here. It also contains pointers to each of the mapping and point table blocks used to construct the room. The beginning of the table is given at bg_file offset 0x4, starting with room 0. Room 0 is always invalid, so all the values in this struct will be set to zero. The last entry is also not a valid room. It exists for the sole purpose of demarking the filesizes of the previous room's entries.
Each rooms' x, y, and z positions are given as floating-point numbers. To ensure the model aligns with the possible clipping coordinates, these values will always translate to integer values. All values are relative to the stage centerpoint; 0,0,0.
The file offsets are offsets from the ROM location of the bg_file. The first byte of each offset should be masked to remove the value indicating scope, ie. 0x00FFFFFF & offset. The size of each binary can be determined by retrieving the next entry in the table.
At no point are the total number of room entries given, though it can be calculated from the visibility offset or more simply determined by comparing the first room's primary mapping offset to the point table offset of the current room. If the two match, the current 'room' is the final dummy entry. Each struct is 0x18 bytes large, so you can divide the difference in the first and current offsets by this value to return the room number.
All room binaries are compressed with 1172 compression. The primary mapping is always present and is used to draw the majority of the room. Secondary mapping is optional; gunfire does not collide with polygons drawn by this block. For this reason, secondary mapping is used for overlays, railings, and other effects. Point tables are shared by both mapping types and contain a full list of the positions needed to draw the room.
0x0 4 (float) x position
0x4 4 (float) y position
0x8 4 (float) z position
0xC 4 offset to point table binary
0x10 4 offset to primary mapping binary
0x14 4 offset to secondary mapping binary, when preset
There is a certain pattern to the room binaries. All the point tables are listed immediately after the primary bg_file. Following these are the primary, then secondary mapping for each room. To determine the size of a binary:
Point tables:
Subtract offset for current binary from following room's point table offset
Primary Mapping Only:
Subtract offset for current binary from following room's primary mapping offset
Primary + Secondary Mapping:
Subtract offset of primary mapping from secondary mapping
Subtract offset of secondary mapping from following room's primary mapping
---------------
Portal Data Table
Portals allow rooms to be activated when within sight. Each acts as a window connecting one unique room to another. The portal table consists of offsets to actual portal polygonal data and a list of rooms interlinked. An offset to the portal table can be found at bg_file offset 0x8.
0x0 4 offset to portal address (mask offset with 0x0F000000)
0x4 1 connected room 1
0x5 1 connected room 2
0x6 2 control bytes for special attributes, beyond the scope of file parsing
The table terminates with a NULL entry - all values equal to zero.
When a player enters a room, the room ID is searched for in the table. If the value matches either connected room ID, then the portal at the offset is activated. When the player is within sight of a portal, both rooms connected to that portal are activated. Technically, rooms connected directly to the current room are usually pre-loaded even when not within visible range to ensure smooth gameplay.
Portals themselves are stored at the end of the bg_file, just before the compressed room data. They are a simple list of x, y, and z positions storeed as floating-point numbers. All points proceed clockwise around to form a polygon, and all points are relative to the centerpoint of the stage, 0,0,0. To properly integrate them with clipping, each float should be an integer value. The first byte of the first word indicates the number of points following, 1-n, and each portal can consist of as many points as desired.
0x0 1 number of points in portal
0x1 3 filler bytes (000000)
0x4 4 (float) first X position
0x8 4 (float) first y position
0xC 4 (float) first z position
etc...
---------------
Global Visibility Commands
Global visibility commands are used to activate and deactivate rooms and portals through triggered events. They are used, among other times, to render the cliff faces around the Dam, the roof in the lower storage area of Archives, and the gas containers in two of the bottling rooms of Facility.
The pseudocode is built from 32bit values and begins at the offset given at 0xC in the bg_file. Commands are processed until a terminator is reached, command 00010000 00000000. Most commands are container classes that contain lists of other command types.
Basic Commands:
00010000 00000000 terminator
21010000 00000000 starts a block of visibility commands, ending any previous blocks
Containers:
14030000 00000000 activated rooms are visible from every room between room #1 to room #2
expects: 65000000 000000#1 65000000 000000#2 5A010000 00000000
5A010000 00000000 end 14 list
1E010000 00000000 activated rooms are visible without portals
expects: 5C010000 00000000
1F020000 00000000 activated rooms are visible through the following portals
expects: 64000000 0F###### ...
further entries 22020000 00000000 64000000 0F######
end list 5C010000 00000000
5C010000 00000000 end 1E or 1F list
20020000 00000000 following rooms (65 commands) are activated
expects: 65000000 000000#1
24020000 00000000 following room (65 command) is ?
expects: 65000000 000000#1
25030000 00000000 following rooms (65 commands) are ?
expects: 65000000 000000#1 65000000 000000#2 ?
further entries 26020000 00000000 65000000 000000#n
26020000 00000000 following room (65 command) is ?
expects: 65000000 000000#1
27030000 00000000 following rooms (65 commands) are ?
expects: 65000000 000000#1 65000000 000000#2 ?
Sub-Commands (always within containers):
22020000 00000000 AND statement linking multiple 64 commands when listed
64000000 0Fxxxxxx offset within file, typically to portal data (0F relates scope)
26020000 00000000 AND statement linking multiple 65 commands when listed
65000000 000000xx room number. multiple entries do not require 2202 commands
This is not as complex as it seems. To make a single room visible when a player is within one of four sequential rooms, this code would apply.
21010000 00000000 \\start block
14030000 00000000 \\room is visible from following rooms
65000000 0000001C \\from room 1C...
65000000 0000001F \\...to room 1F
5A010000 00000000 \\end list
1E010000 00000000 \\activated room doesn't need portals to any of the above rooms
5C010000 00000000 \\end command
20020000 00000000 \\room to be activated
65000000 00000010 \\room 10 is activated when in rooms 1C, 1D, 1E, or 1F
00010000 00000000 \\end global visibility
Lets assume though you want to make the room visible not just when you are standing inside of rooms 18-1F, bt also when you look in the windows to the room. This just requires a 1F command.
21010000 00000000 \\start block
14030000 00000000 \\room is visible from following rooms
65000000 00000018 \\from room 18...
65000000 0000001F \\...to room 1F
5A010000 00000000 \\end list
1E010000 00000000 \\activated room doesn't need portals to any of the above rooms
5C010000 00000000 \\end command
1F020000 00000000 \\activate room when looking in the following portals
64000000 0F00148C \\portal at offset 0x148C
22020000 00000000 \\and...
64000000 0F001374 \\portal at offset 0x1374
22020000 00000000 \\and...
64000000 0F0014C0 \\portal at offset 0x14C0
22020000 00000000 \\and...
64000000 0F0014F4 \\portal at offset 0x14FC
5C010000 00000000 \\end list of portals
20020000 00000000 \\rooms to be activated
65000000 00000010 \\room 10 is activated in all the above
00010000 00000000 \\end global visibility
Also, multiple rooms can be activated at one time by adding more 2002 commands...
...
20020000 00000000 \\rooms to be activated
65000000 00000010 \\room 10
20020000 00000000 \\rooms to be activated
65000000 00000011 \\room 11
2101 commands end one list and start another. Only use the 0001 to end the entire global visibility block.
21010000 00000000 \\start FIRST block
14030000 00000000 \\room is visible from following rooms
65000000 0000001C \\from room 1C...
65000000 0000001F \\...to room 1F
5A010000 00000000 \\end list
1E010000 00000000 \\activated room doesn't need portals to any of the above rooms
5C010000 00000000 \\end command
20020000 00000000 \\room to be activated
65000000 00000010 \\room 10 is activated when in rooms 1C, 1D, 1E, or 1F
21010000 00000000 \\start SECOND block, ending FIRST
14030000 00000000 \\room is visible from following rooms
65000000 00000020 \\from room 20...
65000000 00000023 \\...to room 23
5A010000 00000000 \\end list
1E010000 00000000 \\activated room doesn't need portals to any of the above rooms
5C010000 00000000 \\end command
20020000 00000000 \\room to be activated
65000000 00000011 \\room 11 is activated when in rooms 20, 21, 22, or 23
-Zoinkity

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G-Z Models
----------
G-Z models are 1st person models, used either as weapons, gadgets, discharged shells, etc. These models are used in both the watch menu and when the object is in use in the first-person menu. Because they are only displayed, no collision information is stored.
The primary display list type used in 1st person objects is the 04 command. The breakdown is such:
04 command:
0x0 4 offset to primary mapping
0x4 4 offset to secondary mapping
0x8 4 reserved
0xC 4 offset to point table
0x10 2 number of points in point table
0x12 2 0300 - unknown
Both primary and secondary mapping may be present - and usually are. Secondary tends to be used special effects or transparently mapped areas, just like with room models. In particular, one may point toward mapping while the other points toward nothing, allowing that part of the model to 'disappear' when need be. In this case, the mapping used is set at runtime using linked 12 commands.
09 commands are also common. They are used for more than placing hats on character's heads. What they do is set a placement for a seperate model that is loaded simulatiously with the current one. For instance, the character's arm appears when some weapons and items are in use. There are many different character arm models, and storing the each object with copies of each arm is ineffecient. Instead, 09 commands in the weapon load the arm's components and place them appropriately. Because each component is loaded specificly to a given location, this also eliminates hand/object misalignment.
Most models are used for player items, so they have a series of offsets used for fingers, gun attributes, and other items. Obviously not all the offsets will be used, depending on the item. Some objects that aren't used as items, such as discharged shells, do not follow this pattern.
(fill in with offset coorespondance here before sending it off)
offsets: (28/36)
watch laser autoshot SHOTGUN AK47-SOVIET golden gun GOLD PP7 G-LAUNCH HUNT-KNIFE R-LAUNCH taser throwknife sil PP7
0x0 00000000 050001E0 0500049C 050003F0 0500012C 050001A4 00000000 00000000 00000000 00000000 00000000 050001B0 15 command
0x4 00000000 05000168 05000124 05000180 05000144 0500012C 0500015C 00000000 00000000 00000000 00000000 05000138
0x8 00000000 05000198 05000154 050001B0 05000174 0500015C 0500018C 00000000 00000000 00000000 00000000 05000168
0xC 050001B0 05000180 0500013C 05000198 0500015C 05000144 05000174 00000000 05000120 00000000 00000000 05000150
0x10 00000000 00000000 00000000 00000000 00000000 00000000 05000204 00000000 00000000 00000000 00000000 00000000
0x14 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
0x18 05000318 00000000 00000000 00000000 05000204 05000264 00000000 00000000 00000000 00000000 00000000 05000390
0x1C 00000000 00000000 00000000 00000000 00000000 050003E4 00000000 00000000 00000000 00000000 00000000 050004E0
0x20 00000000 00000000 00000000 00000000 050001EC 0500024C 00000000 0500018C 00000000 05000188 05000144 05000258
0x24 00000000 00000000 00000000 00000000 05000234 050002AC 00000000 0500039C 00000000 050001E8 0500036C 05000498
0x28 00000000 00000000 00000000 00000000 05000294 050002F4 00000000 050001D4 00000000 05000458 0500018C 05000450
0x2C 00000000 00000000 00000000 00000000 00000000 0500039C 00000000 0500030C 00000000 05000428 050002C4 050002B8
0x30 00000000 00000000 00000000 00000000 05000354 050004BC 00000000 00000000 00000000 00000000 00000000 05000378
0x34 00000000 00000000 00000000 00000000 00000000 05000504 00000000 00000000 00000000 00000000 00000000 050003F0
0x38 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0500039C 00000000 throwing knife 12
0x3C 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0500033C 00000000 throwing knife blade 12
0x40 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 05000410 00000000 00000000 taser placeholder for animation (18)
0x44 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 050003F8 00000000 00000000 taser 12 for animation
0x48 00000000 05000708 050003F4 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 shotgun shell 1
0x4C 00000000 05000498 05000394 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 shotgun shell 2
0x50 00000000 05000540 05000424 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 shotgun shell 3
0x54 00000000 05000678 05000454 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 shotgun shell 4
0x58 00000000 050005E8 0500031C 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 shotgun shell 5
0x5C 00000000 050006C0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 autoshotgun shell
0x60 00000000 05000450 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 autoshotgun shell
0x64 00000000 050004F8 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 autoshotgun shell
0x68 00000000 05000630 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 autoshotgun shell
0x6C 00000000 050005A0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 autoshotgun shell
[these eight offsets only present on weapons]
[they do not appear on collectables (blueprints, black box, etc.)]
0x70 05000348 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch 0F command
0x74 050002A0 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch boiler cuff
0x78 05000240 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch black tuxedo cuff
0x7C 05000270 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch connery cuff
0x80 050001E0 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch blue cuff
0x84 05000210 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch jungle cuff
0x88 050002D0 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 watch snowsuit cuff
0x8C 00000000 00000000 not present 00000000 00000000 00000000 00000000 00000000 00000000 not present 00000000 050001E0 pp7 silencer
-------------------
-------------------
Pchr-Z Item Models
---------------
Item pickups - especially weapons - differ slightly from other P-Z models insofar as different commands are used.
Most other objects use 02 commands to position pieces in the model. Most item pickups utilize the 15 position command instead. Just like the 02 commands, each command is relative to the last. The breakdown is such:
15 command:
0x0 4 (float) X Position
0x4 4 (float) Y Position
0x8 4 (float) Z Position
0xC 2 command ID number
0xE 2 unknown - probably piece ID number or reserved
0x10 4 (float) unknown
Many use the 04 display type as the primary display list type, and commonly 12 commands are also used. 12 commands are little more than a pointer to other commands, allowing the piece to either be selected independant from the object or selectively deactivated when rendering the object as a whole. Rendering these pieces is optional in most cases.
04 command:
0x0 4 offset to primary mapping
0x4 4 offset to secondary mapping
0x8 4 reserved
0xC 4 offset to point table
0x10 2 number of points in point table
0x12 2 0300 - unknown
12 command:
0x0 4 offset to command in table
0x4 4 reserved
Another command, used with most weapon pickups, is the 0C command. This sets the position and image used for the gunfire flare rendered when the player is using the weapon in 3rd person. The flare appears at the end of the firearm.
0C Command:
0x0 4 (float) X Position
0x4 4 (float) Y Position
0x8 4 (float) Z Position
0xC 4 (float) Width
0x10 4 (float) Height
0x14 4 (float) Depth
0x18 4 offset to image declaration for gunfire (0x847)
0x1C 4 (float) unknown
Occationally type 16 display lists are used. They are a special animation type to build gunfire. These are incredibly simple, despite the animation.
16 command: gunfire
0x0 4 number of flares created (4 points each, 1 04+B1-mapping command for each)
0x4 4 offset to point table
0x8 4 offset to mapping
It renders only one of the flares at a time, then switches to the next flare in the list. Notice this is different from the generic weapon flare when a weapon fires. It is probably the actual gunfire from the weapon. Note that most weapons use image 0x374, but the laser uses 0x851, colourshifted to 00B6FF (light blue). You probably will never render these commands, unless you are building objects or creating a port/clone.
Weapon pickups also utilize three offsets at the beginning of the file, not all of which are set for every weapon.
0x0 offset to 0C gunfire command in table
0x4 offset to 15 position command for gunfire animation
0x8 offset to 12 reference command for gunfire animation
Notice only weapons - and certain weapons at that - specify a special gunfire animation or flare when firing. When not present, these fields are left NULL (00000000).

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Every object and room requires different kinds of data in order to be rendered. The bare minimum requirement is a list of points in the model and a display list that maps those points.
Goldeneye Point Table Structure
Most N64 games follow this structure. It contains x, y, z data, as well as s/t coordinates to map textures to the surface and an RGBA value blended between the points composing the triangles.
offset size data type usage
0x0 2 signed short x coordinate
0x2 2 signed short y coordinate
0x4 2 signed short z coordinate
0x6 2 signed short reserved (0000)
0x8 2 signed short s value (x image mapping component)
0xA 2 signed short t value (y image mapping value)
0xC 1 unsigned byte Red Component, from 00-FF
0xD 1 unsigned byte Green Component, from 00-FF
0xE 1 unsigned byte Blue Component, from 00-FF
0xF 1 unsigned byte Alpha Component, from 00 (invisible) to FF (opaque)
Sample: FFE0 0000 0020 0000 0020 0020 FFFFFFFF
S/t coordinates are used for texture mapping. Unfortunately, the values are intimately tied to the image's own dimentions. There are several common mapping modes, including mirrorred, clamped, and tiled.
First, lets build a 32x32 square from these four points...
0000 0000 0020 0000 0000 0000 FF0000FF
0020 0000 0020 0000 0020 0000 00FF00FF
0020 0000 0000 0000 0020 FFE0 0000FFFF
0000 0000 0000 0000 0000 FFE0 FFFF00FF
Clockwise, from the upper left, the square is red, green, blue, and yellow. Notice the mapping coordinates already set. The s values match the x values for the square. However, the t values are negative. Negative s or t values naturally mirror the image on that axis. So, the image should appear inverted.
Now, to actually apply an image. Lets assume a greyscale image, 32x32 to match the square. When applied, it will fit precisely, albeit upside-down because of the t values. If the colour combining mode is active, the image will also be colourized to match the lighting of the square, red, blue, green, and yellow.
However, if the image is 64x64, it doesn't fit precisely on the square. Ordinarily, you will only see the upper-left corner of the image. To fit precisely, the 0020 needs to be 0040, and FFE0 changed to FFC0.
Lets try a 16x16 image now. For this example, the tile flag is assumed to be set. The image will repeat after being textured, so instead of seeing one image, four are mapped to the square! Without tiling set but with active clamps, it is more likely the image will be stretched to fit.
Imagine, for a minute, that you wish to draw four triangles, all meeting at a centerpoint, but still want the 32x32 texture to map perfectly to the surface. This is easy enough. The point list will look like so:
0000 0000 0020 0000 0000 0000 FF0000FF //ul
0020 0000 0020 0000 0020 0000 00FF00FF //ur
0020 0000 0000 0000 0020 FFE0 0000FFFF //lr
0000 0000 0000 0000 0000 FFE0 FFFF00FF //ll
0010 0000 0010 0000 0010 FFF0 FFFFFFFF //center
Notice the centerpoint chose mapping pins in the center of the image. Conforming to the image's properties ensures the image is rendered correctly.
Image sizes and other properties can be found in SubDrag's image index.
-------------
04 point table offset command
The RSP 04 command is used to set the offset within a point table. At most, 16 points can be declared at one time. Functionally, rooms and objects will be concidered seperately.
Rooms are the simplest case. The offset command is a literal offset within the point data file. You can expect:
04F00100 00000000
to grab the first 16 entries at the beginning of the point table. The 0100 indicates, in bytes, how much data is being copied. If only 8 points are being pulled, the command would look like this:
04700080 00000000
The offset is a literal offset in the point data binary. For instance,
04F00100 00000100
grabs the next 0x100 bytes at file offset 0x100. To get the next 5 points, you would use this:
04400050 00000200
-and the next 10 points...
049000A0 00000250
Objects are more difficult. Each offset is relative to the pointer set by the display list command. In other words-
04F00100 04000000
-would load the first 16 points and 0x100 bytes from the beginning of the display list's point table.
05 offsets can also be used to specificly state the offset within the file to start pulling points from.
-------------
B1 4-triangle draw routine
The primary triangle drawing routine draws up to four at once. This function is unique to Rare's games, so don't expect it to work with other ucodes.
The format is a little unusual, refering to the points in the point table loaded perviously. The values are one nibble long, ranging from 0-F, or point 1 to 16. If all the points are set to 0, that triangle is not drawn. Below, the first point in the triangle is listed as x, the second y, and the third z.
B100zzzz yxyxyxyx
0000000z 000000yx first triangle
000000z0 0000yx00 second triangle
00000z00 00yx0000 third triangle
0000z000 yx000000 fourth triangle
B1000002 00000010 Creates one triangle using points {0,1,2}
B1000042 00003110 Creates two triangles, using points {0,1,2} and {1,3,4}
B1000242 00413110 Creates three triangles; {0,1,2}, {1,3,4}, and {1,4,2}
B1007242 65413110 Creates four triangles; {0,1,2}, {1,3,4}, {1,4,2}, and {5,6,7}
Remember, don't try to use points that were not previously called with the 04 command. If only five points were declared (0-4), then the last example, B1007242 65413110 would be invalid and cause an exception.
-------------
BF single triangle draw routine
These are very infrequently used. They draw only one triangle at a time, again refering to the points in the point table loaded previously. Before each value can be used, they must be divided by 10 (0xA) to return the point index number.
BF000000 00zzyyxx
BF000000 00140A00 Creates a triangle using points {0,1,2}, or 0/A=0, A/A=1, 14/A=2
BF000000 00968C82 Creates a triangle using points {13,14,15}, or 82/A=D, 8C/A=E, 96/A=F
Again, you still can't use points that haven't been loaded with the 04 vertex command.
-------------

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HEAD:
0x0 sunglasses toggle
0x4 distant head toggle
CAM: cctv cameras
0x0 camera position
0x4 glass
0x8 glass dimentions
0xC camera toggle
TV1:
0x0 DL for screen
TV4: note that NULL is used if the screen is not present (ie. only 1-3 screens)
0x0 DL for screen 1
0x4 DL for screen 2
0x8 DL for screen 3
0xC DL for screen 4
RACK: main object is in group 0. position data alone exists for groups 1-4
0x0 position for monitor 1 (pos:grp 0001 0001)
0x4 position for monitor 2 (pos:grp 0002 0002)
0x8 position for monitor 3 (pos:grp 0003 0003)
0xC position for monitor 4 (pos:grp 0004 0004)
AUTOGUN: [note: only first three needed for SWIVEL objects]
0x0 group 0 position position of base
0x4 group 1 position position of horizontal swivel bar (gun mount)
0x8 group 2 position position of vertical swivel point/main body
0xC group 3 position position of autogun turret(s)
0x10 group 4 position position of gunfire; used when only gunfire 1 present
0x14 gunfire 1
0x18 group 5/4 position position of gunfire/object; used on groundgun
0x1C gunfire 2
EYE_DOOR:
0x0 group 0 position base position of door
0x4 group 1 position position for top?
0x8 group 2 position position for bottom?
IRIS_DOOR:
0x0 group 0 position base position of door
0x4 group 1 position position of inner spline
0x8 group 2 position position of outer track
0xC group 3 position position of inner spline
0x10 group 4 position position of outer track
0x14 group 5 position position of inner spline
0x18 group 6 position position of outer track
0x1C group 7 position position of inner spline
0x20 group 8 position position of outer track
0x24 group 9 position position of inner spline
0x28 group A position position of outer track
0x2C group B position position of inner spline
0x30 group C position position of outer track
MENU:
0x0 toggle for tabs on side of folder
0x4 toggle for basic folder
0x8 toggle for FOR YOUR EYES ONLY
0xC toggle for OHMSS
0x10 toggle for CONFIDENTIAL - briefing
0x14 toggle for CONFIDENTIAL - multi
0x18 toggle for CLASSIFIED
0x1C toggle for shadow beneath character image
0x20 toggle for 1st selected file image (Connery)
0x24 toggle for 2st selected file image (Dalton)
0x28 toggle for 3st selected file image (Moore)
0x2C toggle for 4st selected file image (Brosnan)
0x30 toggle for shadow beneath briefing image
0x34 toggle for main folder select screen
0x38 toggle for shadow beneath slot selection pic
0x3C toggle for 1st slot selection pic (Connery)
0x40 toggle for 2st slot selection pic (Dalton)
0x44 toggle for 3st slot selection pic (Moore)
0x48 toggle for 4st slot selection pic (Brosnan)
0x4C toggle for solo stage select
0x50 toggle for solo selection table (stage imgs)
0x54 solo selection table (stage imgs)
0x58 toggle for Dam briefing image
0x5C toggle for Facility briefing image
0x60 toggle for Runway briefing image
0x64 toggle for Surface I briefing image
0x68 toggle for Bunker I briefing image
0x6C toggle for Silo briefing image
0x70 toggle for Frigate briefing image
0x74 toggle for Surface II briefing image
0x78 toggle for Bunker II briefing image
0x7C toggle for Statue briefing image
0x80 toggle for Archives briefing image
0x84 toggle for Streets briefing image
0x88 toggle for Depot briefing image
0x8C toggle for Train briefing image
0x90 toggle for Jungle briefing image
0x94 toggle for Control briefing image
0x98 toggle for Caverns briefing image
0x9C toggle for Cradle briefing image
0xA0 toggle for Aztec briefing image
0xA4 toggle for Egypt briefing image
0xA8 toggle to secondary folder (multi, cheats, briefings)
CAR:
0x0 main object position
0x4 wheel 1 position
0x8 wheel 2 position
0xC wheel 3 position
0x10 wheel 4 position
0x14
0x18 dimentions wheel 1
0x1C dimentions wheel 2
0x20 dimentions wheel 3
0x24 dimentions wheel 4
0x28 dimentions main body
AIRCRAFT:
0x0 main 01 heading
0x4 main position
0x8 forward prop
0xC rear prop
0x10 position for turret
0x14 prop dimention
WIN_DOOR: note that first glass DL is dud, second generates glass
0x0 dimentions of door
0x4 toggle for glass
0x8 dimentions of glass
0xC glass
Generic DUD glass display list:
E7000000 00000000 pipesync
BA000C02 00002000 setothermode.h: bi-level interpretation
B8000000 00000000 enddl
TANK:
0x0 144 main position
0x4 18c position of cupola
0x8 204 group 2 position parent of turret, antennae, etc
0xC 21c group 3 position
0x10 234 group 4 position child of group 3; parent of firing effect
0x14 15c dimentions of tank chassis
0x18 1a4 dimentions of cupolla
0x1C 24c firing effect (0C)
0x20 264 toggle for turret
HAT:
none
STD_OBJ:
none
CHR_OBJ: note when fields aren't present set to NULL
0x0 gunfire
0x4 group 1 position rifles: isolated 15 command
0x8 toggle secondary flare rifles: horizontal flare
RARE:
Unknown Object...
ARM:
0x0 watch hour hand position
0x4 watch minute hand position
0x8 watch second hand position
0xC toggle watch dial face
0x10 boiler suit cuff toggle
0x14 brosnan tux cuff toggle
0x18 connery tux cuff toggle
0x1C blue suit cuff toggle
0x20 jungle suit cuff toggle
0x24 snowsuit cuff toggle
STD_GUN: hands are optional!
0x0 position (15), possibly of ejected shells (projectile weapons only)
0x4 gunfire toggle (on-screen blast from gun barrel)
0x8 gunfire flash position (linked to render for flash)
0xC gunfire position (origin of rendered beam)
0x10 horiz. gunfire flash/special feature position
0x14 hammer position
0x18 position of index [trigger] finger
0x1C position for 09 linked to trigger/slide
0x20 toggle (12) for fingers (first joint)
0x24 toggle (12) for index [trigger] finger
0x28 toggle (12) for 09s linked to tips of middle/ring/pinky fingers
0x2C toggle (12) for thumb
0x30 toggle (12) for flesh of hand
0x34 toggle (12) for arm
0x38 throwing knife toggle
0x3C throwing knife blade toggle
0x40 taser animation display list
0x44 taser animation toggle
0x48 shotgun shell toggle
0x4C shotgun shell toggle
0x50 shotgun shell toggle
0x54 shotgun shell toggle
0x58 shotgun shell toggle
0x5C autoshotgun shell toggle
0x60 autoshotgun shell toggle
0x64 autoshotgun shell toggle
0x68 autoshotgun shell toggle
0x6C autoshotgun shell toggle
//these and below are hand...
0x70 button? 0F type
0x74 boiler arm toggle
0x78 tux arm toggle
0x7C connery arm toggle
0x80 bluesuit arm toggle
0x84 jungle arm toggle
0x88 snowsuit toggle
0x8C toggle (12) for barrel (odd that. Could be to kill entire weapon...)
NULL_OBJ:
N/A
BARREL_GUN: all fields appear valid
same as STD_GUN, except entry #5
...
0x10 rotating barrel
...
UZI_GUN: only first five fields filled; rest appear valid
same as STD_GUN; uses a special flash effect in entry #5
...
0x10 gunfire flash position (linked to plane with second gunfire effect)
...
CTRL:
0x0 primary position data (all commands are its children)
0x4 start button position
0x8 directional pad position
0xC control stick position
0x10 c button position
0x14 c button position
0x18 c button position
0x1C c button position
0x20 a button position
0x24 b button position
0x28 r button position
0x2C l button position
0x30 z button position
0x34 switch for body (12 type)
ACTOR:
0x0 right arm position
0x4 right hand position
0x8 left hand position
0xC left hand position
0x10 head position or placeholder (17)
0x14 right hand position
0x18 hat position

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type 01 0x10 main object heading
4 ID command ID
4 child child entry
2 grp1 group 1 ID
2 grp2 group 2 ID
2 TAG
2 RESERVED
type 02 0x1C position
float xpos relative x,y,z position to parent
float ypos
float zpos
1 grp1 command ID
1 grp2 group 2 ID or 0
1 grp3 group 3 ID or -1
1 grp4 group 4 ID or -1
4 child child subcommand TBL offset
float unknown
type 03 ???? unknown type
type 04 0x14 display list
4 DL1 primary display list
4 DL2 secondary display list or NULL
2 grp1 group ID 1
2 grp2 group ID 2
4 PIN point table
2 pinnum # points in block
1 TAG
1 RESERVED
type 05 ???? unknown type
type 06 ???? unknown type
type 07 ???? unknown type
type 08 0x10 distance trigger
float min minimum distance from viewport
float max maximum distance from viewport
4 target display list used when within range
2 TAG
2 RESERVED
type 09 0x24 head/hat placement
float xmin dimentions
float xmax
float ymin
float ymax
float zmin
float zmax
4 head head DL or 17 placeholder
4 neck neckline display list
2 RESERVED
2 TAG
type 0A 0x1C dimentions
4 group
float xmin
float xmax
float ymin
float ymax
float zmin
float zmax
type 0B ???? unknown
type 0C 0x28 gunfire
float xpos could also be xmin/xmax, etc.
float ypos
float zpos
float xdim
float ydim
float zdim
4 imgdecl offset to entry in IMG block for firing effect
float unknown
2 TAG
2 RESERVED
4 RESERVED2
type 0D 0x24 shadow
0x0 float x position. + moves to character's left, - to character's right
0x4 float z position. + moves in front of character, - backward
0x8 float x size (width) width of image from side to side
0xC float z size (length) length of image from forward to back
4 imgdecl offset to entry in IMG block for shadow
4 parent gleans model offset from type01 parent
float unknown
2 TAG
2 RESERVED
type 0E ???? unknown
type 0F 0x1C interlinkage
float xpos
float ypos
float zpos
float unknown1
float unknown2
float unknown3
float unknown4
type 10 ???? unknown
type 11 ???? unknown
type 12 0x8 handle/switch
4 target
2 TAG
2 RESERVED
type 13 ???? unknown
type 14 ???? unknown
type 15 0x14 position - held items, especially
float xpos xyz position relative to parent
float ypos
float zpos
2 grp1 model group 1 ID
2 grp2 model group 2 ID
float unknown
type 16 0x10 display list - simple
2 unknown
2 ID
4 PIN
4 DL
4 RESERVED
type 17 0x4 placeholder for pointer to head
0x0 4 RESERVED
type 18 0x1C display list
4 DL1 primary display list
4 DL2 secondary display list or NULL
4 PIN point table offset
2 PINnum # points in table
2 MRGnum # points in merge table
4 MRG merge table offset
4 USE usage table offset
2 TAG
2 RESERVED

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Object headers in Goldeneye are seperate from the object files themselves as in Perfect Dark. This consists of 0x20 of data, as opposed to 0x1C in Perfect Dark. GE uses the final field to indicate if the object has been loaded.
When an object is editted this data must be set! It indicates how many offsets, images, and whatnot are in the model, as well as the archetype.
0x0 4 RESERVED for runtime: offset to object table
0x4 4 GE - pointer to archetype; PD - archetype number
0x8 4 RESERVED for runtime: offset to object offset block
0xC 2 number of offset entries
0xE 2 number of object groups
0x10 4 [float] UNKNOWN floating point value
0x14 2 RESERVED for runtime: number of entries in table
0x16 2 number of image entries
0x18 4 RESERVED for runtime: offset to image declarations
0x1C 4 GE only - RESERVED for runtime: nonzero indicates model is loaded in memory

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Models that Merge Points
------------------------
It isn't as confusing as you think. It only applies to models that use the point usage tables - 18 display lists. Points from one piece in a model can be borrowed by another. No fudging involved. It always really works.
-----------------------
Before rendering the object's display list, you have to change the points used in the point table. The changes are outlined in the 'collision' point table.
Collision Point Table
FF9B 001E FFB2 0000 00000000 FFFF 0000
FF9B FFC8 FFB8 0001 00000000 FFFF 0000
FF9B 004B 00A2 0002 00000000 FFFF 0000
FF9B FFCE 00AB 0003 00000000 FFFF 0000
FFBF 0026 0094 0004 00000000 FFFF 0000
FFF7 0030 FFFC 0005 05000190 000D 0000
FFFC FFDC FFCC 0006 05000190 0011 0000
FFBD FFEB 00AF 0007 00000000 FFFF 0000
0002 000C FFBF 0008 05000190 000F 0000
0003 FFE1 FFEF 0009 05000190 0010 0000
0002 FFE7 0015 000A 05000190 000E 0000
FFFB 0020 FFE1 000B 05000190 000C 0000
Notice how some points have offset values at 0x8. These are offsets to other 18 render commands that you'll steal points from. The short value following the offset (0xA) is the point in the linked 'collision' table that will be used. The fastest thing is to look up the entry in the point usage table, a weird little list of short values. 'Collision' points are the unique points in the piece, and the usage table indicates which points are shared by other points in the model. This sample is the usage list targetted by the point table above.
0xF28: Usage point table for display list linked at 0x190
0020 0016 0017 001A 001B 0014 0015 000C 001E 000D 001F 0018 001C 0019 FFFF FFFF FFFF
FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF 001D FFFF FFFF FFFF FFFF 0028
002A FFFF 0025 FFFF 002D 002C FFFF FFFF FFFF FFFF FFFF FFFF
Usage tables have one entry for each point in the display list's point table. The first point in the table is the first entry, second the second, etc. If a point is reused then the slot's number is given in the table. For instance, the first point is shared by point 32 (0x20). If you look at the 'collision' point table, there will not be an entry with ID 0x20, but there will be one for 0x0.
Every point in the table is given a number (offset 0x6), but if it isn't present you will need to check the point usage table to see which point is equivalent.
Taking the running example, let's swap out point 05 in the first table with the shared model's point. Point five is:
FFF7 0030 FFFC 0005 05000190 000D 0000
It calls the 18 command at offset 0x190, and merges with point 0xD. The 18 command's data is found at offset 05000F84...
point display struct: 0x190 right shin
0xF84 05005F48 00000000 05000AA8 002E 001A 05000D88 05000F28 0003 0000 00000000
mapping @ 0x5F48
normal point table @ 0xAA8; 2E normal points
collision point table @ 0xD88; 1A collision points
point usage table @ 0xF28
First, check the point usage table to ensure it isn't dummied up somehow. Scan through entries 0-C, and if 000D isn't found, the point will be a unique entry in the list:
0020 0016 0017 001A 001B 0014 0015 000C 001E*000D*001F 0018
Unfortuantely the point is not unique, but it is the same as point 0x9. So, search the 'collision' point list for the new position:
0x9 FE25 FFE2 FFB5 0009 00000000 FFFF 0000
All you need are the x, y, and z coordinates. These get copied onto the other model's point data.
Remember, because this point is from another piece of the object, you have to make certain that the point's position is corrected for that piece's position, etc. In this example (Bond's right leg) no conversion is necessary; the foot and shin share the same position. Otherwise, determine what positions affect the part you're stealing from and which ones affect the target to determine a global position.
Now, all you have to do is replace the point in the original piece. You copy the new data over point 05's x,y,z data - and anything that shares that point! To see if anything shares the point, you need to refer to the original model's point usage table.
0xA40 FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF
Good. The point is unique. Replace the x,y,z of fifth point in the normal point table. That point should now be merged with the leg.
Note:
If the point wasn't unique (something else used point five) you would change it and any entry that refers to it. Say the table looked more like this:
FFFF FFFF FFFF FFFF FFFF 0006 0007 0008 FFFF
Order of operations: point five is shared by point 6. Point 7 is set after point 6 is corrected, so it is also the same as 5. Point 8 is also sharing point 7's corrected data, so it is the same as 5.
-------------------------
Another note:
The plane *does not* use merging. Any render problems are due to some other sizing issue. No points in the collision table use offsets.
I haven't ID'd any objects that use merging yet, but the same rules apply. Undoubtedly there must be a few...

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@ -1,154 +0,0 @@
Memory locations - decompressed in ROM
First ROM offset is given, then relative offset, size, and description
29E560 02000000 0x18 unknown - RGB values?
29E580 02000020 0xAB8
0x0 RA 16bit 64x16 (21)
0x800 RA 16bit 32x10
29F040 02000AE0 0xAB8
0x0 RE 16bit 64x16 (21)
0x800 RE 16bit 32x10
29FB00 020015A0 0xAB8
0x0 RE 16bit 64x16 (21)
0x800 RE 16bit 32x10
2A05C0 02002060 0xAB8
0x0 WA 16bit 64x16 (21)
0x800 WA 16bit 32x10
2A1078 02002B18 0x18D0 vertex table
2A2948 020043E8 0xC8 blue DL
2A2A10 020044B0 0x2A8 text DL
2A2CB8 02004758 0x888 gold DL
2A3548 02004FE8 0x1000 blue 16bit 64x32
2A4550 02005FF0 0x800 gold 16bit 32x32
Special Note:
Two types of image commands may be used in these display lists.
FD commands may either use a relative data pointer (02xxxxxx) or physical data pointer (80xxxxxx/7Fxxxxxx) as usual.
You may also declare and load an image bank image using the code:
ABCD 0xxx
ABCD indicates to load the following short image ID to memory and link it here.
Also, images above contain mipmaps of varying sizes pregenerated. Emulators will select the primary and console, due to distances, will use a mipmap.
To alter this behaviour requires removing the mipmapping usage.
<_>
7F0084C0 3CFF0 Load Rare logo display lists
//7F0089AC 3D4DC blue DL + text line
3C0E0200 LUI T6,0200
25CE43E8 ADDIU T6,T6,43E8 ;T6=020043E8: int. off. to blue DL
3C060600 LUI A2,0600
02001025 OR V0,S0,R0
ACE60000 SW A2,0000 (A3) ;A2->uDL: 06000000 - branchdl
ACEE0004 SW T6,0004 (A3) ;T6->lDL: 020043E8 - blue DL
26100008 ADDIU S0,S0,0008
3C0F0200 LUI T7,0200
25EF44B0 ADDIU T7,T7,44B0 ;T7=020044B0: int. off. to text DL
02001825 OR V1,S0,R0
AC4F0004 SW T7,0004 (V0) ;T7->lDL: 020044B0 - text DL
AC460000 SW A2,0000 (V0) ;A2->uDL: 06000000 - branchdl
3C180200 LUI T8,0200
27185FF0 ADDIU T8,T8,5FF0 ;T8=02005FF0: int. off. to images
26100008 ADDIU S0,S0,0008
02002025 OR A0,S0,R0
AC780004 SW T8,0004 (V1) ;T8->lDL: 02005FF0 - gold image
AC6B0000 SW T3,0000 (V1) ;T3->uDL: FD100000 - loadimg
26100008 ADDIU S0,S0,0008
02002825 OR A1,S0,R0
26100008 ADDIU S0,S0,0008
AC8D0004 SW T5,0004 (A0) ;T5->lDL: 07014050 - tile 7 S: shift 0 mask 5 T: shift 0 mask 5
AC8C0000 SW T4,0000 (A0) ;T4->uDL: F5100000 - settile 16bit RGBA line 0 tmem 0 palette 0
02005025 OR T2,S0,R0
26100008 ADDIU S0,S0,0008
ACA00004 SW R0,0004 (A1)
ACBF0000 SW RA,0000 (A1)
3C19073F LUI T9,073F
3739F100 ORI T9,T9,F100 ;T9=0x073FF100:
02001025 OR V0,S0,R0
240700FF ADDIU A3,R0,00FF ;A3=0xFF
AD590004 SW T9,0004 (T2)
AD510000 SW S1,0000 (T2)
26100008 ADDIU S0,S0,0008
3C0F0001 LUI T7,0001
35EF4050 ORI T7,T7,4050 ;T7=0x00014050:
02001825 OR V1,S0,R0
AC400004 SW R0,0004 (V0)
AC490000 SW T1,0000 (V0)
AC6F0004 SW T7,0004 (A2)
00087900 SLL T7,T0,0x4
01E87823 SUBU T7,T7,T0
000F7900 SLL T7,T7,0x4
01E7001A DIV T7,A3
3C0EF510 LUI T6,F510
35CE1000 ORI T6,T6,1000 ;T6=F5101000
26100008 ADDIU S0,S0,0008
02002025 OR A0,S0,R0
AC6E0000 SW T6,0000 (V1)
3C190007 LUI T9,0007
3739C07C ORI T9,T9,C07C ;T7=0x0007C07C
26100008 ADDIU S0,S0,0008
3C18F200 LUI T8,F200
AC980000 SW T8,0000 (A0)
AC990004 SW T9,0004 (A0)
02002825 OR A1,S0,R0
3C0EFA00 LUI T6,FA00
ACAE0000 SW T6,0000 (A1)
00087080 SLL T6,T0,0x2
01C87023 SUBU T6,T6,T0
000E7080 SLL T6,T6,0x2
01C87021 ADDU T6,T6,T0
000E7100 SLL T7,T6,0x0
00003012 MFLO A2
30D800FF ANDI T8,A2,00FF
03003025 OR A2,T8,R0
01C7001A DIV T6,A3
0018CE00 SLL T9,T8,0x10
26100008 ADDIU S0,S0,0008
14E00002 BNE A3,R0,0002
00000000 NOP
0007000D BREAK 01C00
2401FFFF ADDIU AT,R0,FFFF
14E10004 BNE A3,AT,0004
3C018000 LUI AT,8000
15E10002 BNE A3,AT,0002
00000000 NOP
0006000D BREAK 01800
00007812 MFLO T7
31F800FF ANDI T9,T7,00FF
14E00002 BNE A3,R0,0002
00000000 NOP
0007000D BREAK 01C00
2401FFFF ADDIU AT,R0,FFFF
14E10004 BNE A3,AT,0004
3C018000 LUI AT,8000
15C10002 BNE T6,AT,0002
00000000 NOP
0006000D BREAK 01800
00187400 SLL T7,18,0x10
032E7825 OR T7,T9,T6
0006C200 SLL T8,A2,0x8
01F8C825 OR T9,T7,T9
372E00FF ORI T6,T9,00FF
ACAE0004 SW T6,0004 (A1)
//7F008B28 3D658 load gold DL
3C180200 LUI T8,0200
02001825 OR V1,S0,R0
27184758 ADDIU T8,T8,4758 ;T8=0x02004758
3C0F0600 LUI T7,0600
AC6F0000 SW T7,0000 (V1) ;T7->uDL: 06000000 - branchdl
AC780004 SW T8,0004 (V1) ;T8->lDL: 02004758 - gold DL
8FBF0034 LW RA,0034 (SP)
26020008 ADDIU V0,S0,0008
8FB0002C LW S0,002C (SP)
8FB10030 LW S1,0030 (SP)
03E00008 JR RA
27BD00E8 ADDIU SP,SP,00E8
7F00XXXX 3D688 loads the RareWare logo
// 3D6E8 ROM offset
3C05002A LUI A1,002A
AC440000 SW A0,0000 (V0)
24A5E560 ADDIU A1,A1,E560 ;A1=0x29E560: RAREWARE logo
0C001707 JAL 70005C1C
3B06003F ANDI A2,T8,003F

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