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007
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disasm and generic label all L*E text files, the ones that compress the same from make_text_rz.sh are used instead of rips from rom 

Former-commit-id: 09bd342dc4a11980a0d845a16b0840c3c85b6bf6 [formerly 66519316e463c16b88aaee0f9a638ff880562521]
Former-commit-id: 956b11a73cb93a14a8496477a3bdb73733baf72a
This commit is contained in:
Larry 2017-05-12 10:26:01 -05:00
parent cb93258f55
commit 05ed076e6b
184 changed files with 775 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
disassembly/GE007.sym.REMOVED.git-id
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@ -1 +1 @@
a08ff82abe847bf82e188ee7a9956fd30f7d6e02
48b4f89eb52b3fe3ae90845489c6a77d3cc2987f

1
disassembly/ob/make_objects.sh.REMOVED.git-id
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@ -1 +0,0 @@
aed596f05cda30b8394fda5c389e79ad64454a4e

1
disassembly/ob/make_text_rz.sh.REMOVED.git-id Normal file
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@ -0,0 +1 @@
12e08d9ef3a4c4e6b10061e8331fe00e8658bb11

2
disassembly/ob/text.asm.REMOVED.git-id
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@ -1 +1 @@
6956e3e020fe8145813b9cc79c08019c3499f261
3ad11b27f5a3eb2f1ff23810fc60fa8a658142d3

1
disassembly/ob/text.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
a903cc919f787df9b1fe9cfa4c803ba0acef8e5b

18
disassembly/ob/text/LameE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LameE.bin", create
base $00000000
seg_LameE_start:
seg_LameE_header_start:
ptr_seg_LameE_start:
dw seg_LameE_start
seg_LameE_header_end:
seg_LameE_strings_start:
seg_LameE_strings_end:
seg_LameE_end:
align(32)

7
disassembly/ob/text/LameE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LameE_start($00000000)
define seg_LameE_header_start($00000000)
define ptr_seg_LameE_start($00000000)
define seg_LameE_header_end($00000004)
define seg_LameE_strings_start($00000004)
define seg_LameE_strings_end($00000004)
define seg_LameE_end($00000004)

BIN
disassembly/ob/text/LameE.rz Normal file
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disassembly/ob/text/LameE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LameE_rom_start:
db 0x11, 0x72
insert LameE, "LameE.rz"
align(16)
seg_LameE_rom_end:

1
disassembly/ob/text/LarchE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
e16addb6498de2c2e0dd3c55ccf1b2ae7c6d86d7

1
disassembly/ob/text/LarchE.bin.REMOVED.git-id Normal file
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@ -0,0 +1 @@
d870b6c1ab0d1675a9867c3ceed6565f0c74a497

1
disassembly/ob/text/LarchE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
6b4bdc0a12bfe9cce27a3475256799c0404c3b53

1
disassembly/ob/text/LarchE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
073133a4f3bcbc763573527c561dbdd5223cbbea

6
disassembly/ob/text/LarchE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LarchE_rom_start:
db 0x11, 0x72
insert LarchE, "LarchE.rz"
align(16)
seg_LarchE_rom_end:

1
disassembly/ob/text/LarecE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
694af057f393d5abc992370e6b0da586b724309d

1
disassembly/ob/text/LarecE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
08ff591981be42aa0879cbe690e9d3c149b2c903

1
disassembly/ob/text/LarecE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
3aef2e37a8936f32ecda33039d0e260008d2f235

6
disassembly/ob/text/LarecE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LarecE_rom_start:
db 0x11, 0x72
insert LarecE, "LarecE.rz"
align(16)
seg_LarecE_rom_end:

1
disassembly/ob/text/LarkE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
b81ad5a074ea6afedfa0b4e98ee0009845f7dec0

1
disassembly/ob/text/LarkE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
c6282aafd784c90bbd1f63a505f01949894b1525

1
disassembly/ob/text/LarkE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
ef25902e0fede97feebc2a11f2341d186935b7c5

6
disassembly/ob/text/LarkE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LarkE_rom_start:
db 0x11, 0x72
insert LarkE, "LarkE.rz"
align(16)
seg_LarkE_rom_end:

18
disassembly/ob/text/LashE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LashE.bin", create
base $00000000
seg_LashE_start:
seg_LashE_header_start:
ptr_seg_LashE_start:
dw seg_LashE_start
seg_LashE_header_end:
seg_LashE_strings_start:
seg_LashE_strings_end:
seg_LashE_end:
align(32)

7
disassembly/ob/text/LashE.inc Normal file
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define seg_LashE_start($00000000)
define seg_LashE_header_start($00000000)
define ptr_seg_LashE_start($00000000)
define seg_LashE_header_end($00000004)
define seg_LashE_strings_start($00000004)
define seg_LashE_strings_end($00000004)
define seg_LashE_end($00000004)

BIN
disassembly/ob/text/LashE.rz Normal file
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6
disassembly/ob/text/LashE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LashE_rom_start:
db 0x11, 0x72
insert LashE, "LashE.rz"
align(16)
seg_LashE_rom_end:

1
disassembly/ob/text/LaztE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
80b37b759ce73357168123ffcf0b952f33f8bb67

1
disassembly/ob/text/LaztE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
398a2d497a3ed67176e8c7404b9b705b8e0c16d5

1
disassembly/ob/text/LaztE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
82284e38d86b82920cec9a69ba3c02a4c5bcb046

6
disassembly/ob/text/LaztE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LaztE_rom_start:
db 0x11, 0x72
insert LaztE, "LaztE.rz"
align(16)
seg_LaztE_rom_end:

18
disassembly/ob/text/LcatE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LcatE.bin", create
base $00000000
seg_LcatE_start:
seg_LcatE_header_start:
ptr_seg_LcatE_start:
dw seg_LcatE_start
seg_LcatE_header_end:
seg_LcatE_strings_start:
seg_LcatE_strings_end:
seg_LcatE_end:
align(32)

7
disassembly/ob/text/LcatE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LcatE_start($00000000)
define seg_LcatE_header_start($00000000)
define ptr_seg_LcatE_start($00000000)
define seg_LcatE_header_end($00000004)
define seg_LcatE_strings_start($00000004)
define seg_LcatE_strings_end($00000004)
define seg_LcatE_end($00000004)

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disassembly/ob/text/LcatE.rz Normal file
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disassembly/ob/text/LcatE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LcatE_rom_start:
db 0x11, 0x72
insert LcatE, "LcatE.rz"
align(16)
seg_LcatE_rom_end:

1
disassembly/ob/text/LcaveE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
cbcc421d269c79ff148ec8dab29fb3954a4b88cd

1
disassembly/ob/text/LcaveE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
c4b6c114c413e91b6275960c40cb947795923327

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disassembly/ob/text/LcaveE.rz Normal file
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6
disassembly/ob/text/LcaveE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LcaveE_rom_start:
db 0x11, 0x72
insert LcaveE, "LcaveE.rz"
align(16)
seg_LcaveE_rom_end:

1
disassembly/ob/text/LcradE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
232f61f6ee2951cb9eb95c8c8d248cb63a12b52d

1
disassembly/ob/text/LcradE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
8a452229cbde495f71d68bff0b5d25720aafce0a

1
disassembly/ob/text/LcradE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
6aec55d3c77a15b0b8ae4bca0baafe8d7b615c98

6
disassembly/ob/text/LcradE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LcradE_rom_start:
db 0x11, 0x72
insert LcradE, "LcradE.rz"
align(16)
seg_LcradE_rom_end:

1
disassembly/ob/text/LcrypE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
91032a0ad45d514f26c203203249f15763e49491

1
disassembly/ob/text/LcrypE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
62ad5491ec845daffc1d269bd9e0ce9ba422e6e2

BIN
disassembly/ob/text/LcrypE.rz Normal file
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Binary file not shown.

6
disassembly/ob/text/LcrypE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LcrypE_rom_start:
db 0x11, 0x72
insert LcrypE, "LcrypE.rz"
align(16)
seg_LcrypE_rom_end:

1
disassembly/ob/text/LdamE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
c62887ba977cb6539732f6a353126e63bf6a1899

1
disassembly/ob/text/LdamE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
2b7553dc39b47e3da9831353162e1ed029f75cf6

1
disassembly/ob/text/LdamE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
40709a7e7e94ce8a81720644ce7f33b038b24ad5

6
disassembly/ob/text/LdamE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LdamE_rom_start:
db 0x11, 0x72
insert LdamE, "LdamE.rz"
align(16)
seg_LdamE_rom_end:

1
disassembly/ob/text/LdepoE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
440bab56d0546fc6264a92fe874e7d86c5d75e43

1
disassembly/ob/text/LdepoE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
ed9e8576753c04c3eb1b3d2ae429a96376049c87

BIN
disassembly/ob/text/LdepoE.rz Normal file
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Binary file not shown.

6
disassembly/ob/text/LdepoE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LdepoE_rom_start:
db 0x11, 0x72
insert LdepoE, "LdepoE.rz"
align(16)
seg_LdepoE_rom_end:

1
disassembly/ob/text/LdestE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
abbca1b6edcb26197b898a1e0e464679e597eea4

1
disassembly/ob/text/LdestE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
e1ca29aa316eb163aa73ad5f4435abe5e760112f

1
disassembly/ob/text/LdestE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
d9119650c39befd2823c00c8fc2a0f0cf662c0e1

6
disassembly/ob/text/LdestE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LdestE_rom_start:
db 0x11, 0x72
insert LdestE, "LdestE.rz"
align(16)
seg_LdestE_rom_end:

19
disassembly/ob/text/LdishE.asm Normal file
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@ -0,0 +1,19 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LdishE.bin", create
base $00000000
seg_LdishE_start:
seg_LdishE_header_start:
ptr_seg_LdishE_start:
dw seg_LdishE_start
seg_LdishE_header_end:
seg_LdishE_strings_start:
seg_LdishE_strings_end:
seg_LdishE_end:
align(32)

7
disassembly/ob/text/LdishE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LdishE_start($00000000)
define seg_LdishE_header_start($00000000)
define ptr_seg_LdishE_start($00000000)
define seg_LdishE_header_end($00000004)
define seg_LdishE_strings_start($00000004)
define seg_LdishE_strings_end($00000004)
define seg_LdishE_end($00000004)

BIN
disassembly/ob/text/LdishE.rz Normal file
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Binary file not shown.

6
disassembly/ob/text/LdishE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LdishE_rom_start:
db 0x11, 0x72
insert LdishE, "LdishE.rz"
align(16)
seg_LdishE_rom_end:

18
disassembly/ob/text/LearE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LearE.bin", create
base $00000000
seg_LearE_start:
seg_LearE_header_start:
ptr_seg_LearE_start:
dw seg_LearE_start
seg_LearE_header_end:
seg_LearE_strings_start:
seg_LearE_strings_end:
seg_LearE_end:
align(32)

7
disassembly/ob/text/LearE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LearE_start($00000000)
define seg_LearE_header_start($00000000)
define ptr_seg_LearE_start($00000000)
define seg_LearE_header_end($00000004)
define seg_LearE_strings_start($00000004)
define seg_LearE_strings_end($00000004)
define seg_LearE_end($00000004)

BIN
disassembly/ob/text/LearE.rz Normal file
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Binary file not shown.

6
disassembly/ob/text/LearE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LearE_rom_start:
db 0x11, 0x72
insert LearE, "LearE.rz"
align(16)
seg_LearE_rom_end:

18
disassembly/ob/text/LeldE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LeldE.bin", create
base $00000000
seg_LeldE_start:
seg_LeldE_header_start:
ptr_seg_LeldE_start:
dw seg_LeldE_start
seg_LeldE_header_end:
seg_LeldE_strings_start:
seg_LeldE_strings_end:
seg_LeldE_end:
align(32)

7
disassembly/ob/text/LeldE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LeldE_start($00000000)
define seg_LeldE_header_start($00000000)
define ptr_seg_LeldE_start($00000000)
define seg_LeldE_header_end($00000004)
define seg_LeldE_strings_start($00000004)
define seg_LeldE_strings_end($00000004)
define seg_LeldE_end($00000004)

BIN
disassembly/ob/text/LeldE.rz Normal file
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Binary file not shown.

6
disassembly/ob/text/LeldE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LeldE_rom_start:
db 0x11, 0x72
insert LeldE, "LeldE.rz"
align(16)
seg_LeldE_rom_end:

1
disassembly/ob/text/LgunE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
07ff824d2f8aef6d0f35d2caaec2a181fb3672cf

1
disassembly/ob/text/LgunE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
4579add265c27ab122d1f2493ca644d51c7cc182

1
disassembly/ob/text/LgunE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
13fc2b91c46defd27fda23b8c5d185e5d4729414

6
disassembly/ob/text/LgunE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LgunE_rom_start:
db 0x11, 0x72
insert LgunE, "LgunE.rz"
align(16)
seg_LgunE_rom_end:

18
disassembly/ob/text/LimpE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LimpE.bin", create
base $00000000
seg_LimpE_start:
seg_LimpE_header_start:
ptr_seg_LimpE_start:
dw seg_LimpE_start
seg_LimpE_header_end:
seg_LimpE_strings_start:
seg_LimpE_strings_end:
seg_LimpE_end:
align(32)

7
disassembly/ob/text/LimpE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LimpE_start($00000000)
define seg_LimpE_header_start($00000000)
define ptr_seg_LimpE_start($00000000)
define seg_LimpE_header_end($00000004)
define seg_LimpE_strings_start($00000004)
define seg_LimpE_strings_end($00000004)
define seg_LimpE_end($00000004)

BIN
disassembly/ob/text/LimpE.rz Normal file
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6
disassembly/ob/text/LimpE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LimpE_rom_start:
db 0x11, 0x72
insert LimpE, "LimpE.rz"
align(16)
seg_LimpE_rom_end:

1
disassembly/ob/text/LjunE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
5290ac80e53e511639931f43f0b8d20abde322fb

1
disassembly/ob/text/LjunE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
5043f4eb5de156e3a84403cbc35f983e1b05608d

1
disassembly/ob/text/LjunE.rz.REMOVED.git-id Normal file
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@ -0,0 +1 @@
0ccdaf82aa952eb97837443b3edd556e0a18c536

6
disassembly/ob/text/LjunE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LjunE_rom_start:
db 0x11, 0x72
insert LjunE, "LjunE.rz"
align(16)
seg_LjunE_rom_end:

18
disassembly/ob/text/LleeE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LleeE.bin", create
base $00000000
seg_LleeE_start:
seg_LleeE_header_start:
ptr_seg_LleeE_start:
dw seg_LleeE_start
seg_LleeE_header_end:
seg_LleeE_strings_start:
seg_LleeE_strings_end:
seg_LleeE_end:
align(32)

7
disassembly/ob/text/LleeE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LleeE_start($00000000)
define seg_LleeE_header_start($00000000)
define ptr_seg_LleeE_start($00000000)
define seg_LleeE_header_end($00000004)
define seg_LleeE_strings_start($00000004)
define seg_LleeE_strings_end($00000004)
define seg_LleeE_end($00000004)

BIN
disassembly/ob/text/LleeE.rz Normal file
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6
disassembly/ob/text/LleeE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LleeE_rom_start:
db 0x11, 0x72
insert LleeE, "LleeE.rz"
align(16)
seg_LleeE_rom_end:

18
disassembly/ob/text/LlenE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LlenE.bin", create
base $00000000
seg_LlenE_start:
seg_LlenE_header_start:
ptr_seg_LlenE_start:
dw seg_LlenE_start
seg_LlenE_header_end:
seg_LlenE_strings_start:
seg_LlenE_strings_end:
seg_LlenE_end:
align(32)

7
disassembly/ob/text/LlenE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LlenE_start($00000000)
define seg_LlenE_header_start($00000000)
define ptr_seg_LlenE_start($00000000)
define seg_LlenE_header_end($00000004)
define seg_LlenE_strings_start($00000004)
define seg_LlenE_strings_end($00000004)
define seg_LlenE_end($00000004)

BIN
disassembly/ob/text/LlenE.rz Normal file
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6
disassembly/ob/text/LlenE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LlenE_rom_start:
db 0x11, 0x72
insert LlenE, "LlenE.rz"
align(16)
seg_LlenE_rom_end:

18
disassembly/ob/text/LlipE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LlipE.bin", create
base $00000000
seg_LlipE_start:
seg_LlipE_header_start:
ptr_seg_LlipE_start:
dw seg_LlipE_start
seg_LlipE_header_end:
seg_LlipE_strings_start:
seg_LlipE_strings_end:
seg_LlipE_end:
align(32)

7
disassembly/ob/text/LlipE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LlipE_start($00000000)
define seg_LlipE_header_start($00000000)
define ptr_seg_LlipE_start($00000000)
define seg_LlipE_header_end($00000004)
define seg_LlipE_strings_start($00000004)
define seg_LlipE_strings_end($00000004)
define seg_LlipE_end($00000004)

BIN
disassembly/ob/text/LlipE.rz Normal file
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6
disassembly/ob/text/LlipE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LlipE_rom_start:
db 0x11, 0x72
insert LlipE, "LlipE.rz"
align(16)
seg_LlipE_rom_end:

18
disassembly/ob/text/LlueE.asm Normal file
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@ -0,0 +1,18 @@
arch n64.cpu
endian msb
include "../../lib/N64.INC"
output "LlueE.bin", create
base $00000000
seg_LlueE_start:
seg_LlueE_header_start:
ptr_seg_LlueE_start:
dw seg_LlueE_start
seg_LlueE_header_end:
seg_LlueE_strings_start:
seg_LlueE_strings_end:
seg_LlueE_end:
align(32)

7
disassembly/ob/text/LlueE.inc Normal file
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@ -0,0 +1,7 @@
define seg_LlueE_start($00000000)
define seg_LlueE_header_start($00000000)
define ptr_seg_LlueE_start($00000000)
define seg_LlueE_header_end($00000004)
define seg_LlueE_strings_start($00000004)
define seg_LlueE_strings_end($00000004)
define seg_LlueE_end($00000004)

BIN
disassembly/ob/text/LlueE.rz Normal file
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6
disassembly/ob/text/LlueE.rz.asm Normal file
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@ -0,0 +1,6 @@
seg_LlueE_rom_start:
db 0x11, 0x72
insert LlueE, "LlueE.rz"
align(16)
seg_LlueE_rom_end:

1
disassembly/ob/text/LmiscE.asm.REMOVED.git-id Normal file
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@ -0,0 +1 @@
276775db9839dfe22927a461bbb3649ad8c68da4

1
disassembly/ob/text/LmiscE.inc.REMOVED.git-id Normal file
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@ -0,0 +1 @@
97d57664205583b680adda7a03fc6e82cb8bd462

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