diff --git a/disassembly/GE007.rom.asm b/disassembly/GE007.rom.asm
index 1dbeabc..8b31eea 100644
--- a/disassembly/GE007.rom.asm
+++ b/disassembly/GE007.rom.asm
@@ -1,10 +1,12 @@
 arch n64.cpu
 endian msb
 output "GE007.n64", create
-fill $00c00000, $FF
 include "lib/N64.INC"
-origin $00000000
-
+define romsize($C00000)
+fill {romsize}, $FF
+origin $00000000;rom_file_start:;rom_start:
+include "code/bss.asm"
+include "code/stack.asm"
 include "rom/romheader.asm"
 include "code/boot.asm"
 include "rodata/rodata.rz.asm"
@@ -28,7 +30,9 @@ insert ob_end.seg, "ob/ob_end.seg", (origin() - $008f7de0)
 
 include "images/images.asm"
 
-include "code/bss.asm"
-include "code/80300000.asm"
+rom_end:;base {romsize};rom_file_end:
+
+
+
 
 
diff --git a/disassembly/GE007.sym.REMOVED.git-id b/disassembly/GE007.sym.REMOVED.git-id
index 8122d13..d65bff7 100644
--- a/disassembly/GE007.sym.REMOVED.git-id
+++ b/disassembly/GE007.sym.REMOVED.git-id
@@ -1 +1 @@
-9763d0432f371a62084e699615f219f674196364
\ No newline at end of file
+efb384ef7cc4ce8e0e1a963396ea2c580d337a6e
\ No newline at end of file
diff --git a/disassembly/code/boot.asm.REMOVED.git-id b/disassembly/code/boot.asm.REMOVED.git-id
index c6ea3a9..c9c3085 100644
--- a/disassembly/code/boot.asm.REMOVED.git-id
+++ b/disassembly/code/boot.asm.REMOVED.git-id
@@ -1 +1 @@
-ce9e5f5497021e2435d5d023de4ceecac1c8a375
\ No newline at end of file
+48cee3ccec613860f2337c13f3fd4d5ea574514f
\ No newline at end of file
diff --git a/disassembly/code/bss.asm b/disassembly/code/bss.asm
index 4521b51..4e12685 100644
--- a/disassembly/code/bss.asm
+++ b/disassembly/code/bss.asm
@@ -1,9 +1,11 @@
 base $8005D2E0
-bss_start:
+seg_bss_start:
 
 base $8005D640
 mainthread:
 
 base $8008E360
-bss_end:
+seg_bss_end:
+
+variable seg_bss_size(seg_bss_end-seg_bss_start)
 
diff --git a/disassembly/code/rarezip.asm b/disassembly/code/rarezip.asm
index 09e3250..9cab162 100644
--- a/disassembly/code/rarezip.asm
+++ b/disassembly/code/rarezip.asm
@@ -1,12 +1,13 @@
 base origin()
-rarezip_rom_start:
-
+seg_rarezip_rom_start:
 base $70200000
-RareZip_vaddr:
+seg_rarezip_vaddr_start:
 
 base $7020141C
 decompressfile:
 
 insert binaryrarezipcode, "rarezip.bin", (origin() - $033590)
+
+seg_rarezip_vaddr_end:
 base origin()
-rarezip_rom_end:
+seg_rarezip_rom_end:
diff --git a/disassembly/code/80300000.asm b/disassembly/code/stack.asm
similarity index 54%
rename from disassembly/code/80300000.asm
rename to disassembly/code/stack.asm
index 860b08a..8c96e2c 100644
--- a/disassembly/code/80300000.asm
+++ b/disassembly/code/stack.asm
@@ -4,6 +4,15 @@ decompression_buffer:
 base $803AB400
 sp_boot:
 
+base $803AB3D0
+sp_init:;scope sp_init {
+define sp_init_s0($1C)
+define sp_init_s1($20)
+define sp_init_ra($24)
+define rarezip_pos($28)
+define rodata_pos($34)
+}
+
 base $803AB410
 sp_rmon:
 
diff --git a/disassembly/code/tlb_code.asm b/disassembly/code/tlb_code.asm
index 2e1c4b0..6a87860 100644
--- a/disassembly/code/tlb_code.asm
+++ b/disassembly/code/tlb_code.asm
@@ -1,5 +1,13 @@
+base origin()
+seg_tlbcode_start:
 base $7F000000
-tlb_code_start:
+tlb_code_vaddr_start:
 
 insert binarytlbcode, "tlb_code.bin", (origin() - $34B30)
-tlb_code_end:
+
+tlb_code_vaddr_end:
+base origin()
+seg_tlbcode_end:
+
+variable seg_tlbcode_size(seg_tlbcode_end-seg_tlbcode_start)
+
diff --git a/disassembly/rodata/rodata.inc b/disassembly/rodata/rodata.inc
index 2948f1c..dc1bcc0 100644
--- a/disassembly/rodata/rodata.inc
+++ b/disassembly/rodata/rodata.inc
@@ -1,5 +1,5 @@
 base $80020D90
-rodata_start:
+seg_rodata_vaddr_start:
 
 base $80020D90
 rspcode_start:
@@ -14,4 +14,4 @@ base $80023048
 cart_hw_address:
 
 base $8005D2E0
-rodata_end:
+seg_rodata_vaddr_end:
diff --git a/disassembly/rodata/rodata.rz.asm b/disassembly/rodata/rodata.rz.asm
index 842d168..0aab00c 100644
--- a/disassembly/rodata/rodata.rz.asm
+++ b/disassembly/rodata/rodata.rz.asm
@@ -1,9 +1,12 @@
 base origin()
-rodata_rom_start:
+seg_rodata_rom_start:
 
 include "rodata.inc"
 insert rodata_rz, "021990.rz"
 
 insert padding,"pad_to_33590"
+
 base origin()
-rodata_rom_end:
+seg_rodata_rom_end:
+
+variable seg_rodata_rom_size(seg_rodata_rom_end-seg_rodata_rom_start)