mirror of https://github.com/zeldaret/oot.git
				
				
				
			
		
			
				
	
	
		
			62 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
| .include "macro.inc"
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| 
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| # assembler directives
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| .set noat      # allow manual use of $at
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| .set noreorder # don't insert nops after branches
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| .set gp=64     # allow use of 64-bit general purposee registers
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| 
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| .section .text
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| 
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| .align 4
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|  
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| glabel osInvalDCache
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| /* 006E00 80006200 18A0001F */  blez  $a1, .L80006280
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| /* 006E04 80006204 00000000 */   nop   
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| /* 006E08 80006208 240B2000 */  li    $t3, 8192
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| /* 006E0C 8000620C 00AB082B */  sltu  $at, $a1, $t3
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| /* 006E10 80006210 1020001D */  beqz  $at, .L80006288
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| /* 006E14 80006214 00000000 */   nop   
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| /* 006E18 80006218 00804025 */  move  $t0, $a0
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| /* 006E1C 8000621C 00854821 */  addu  $t1, $a0, $a1
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| /* 006E20 80006220 0109082B */  sltu  $at, $t0, $t1
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| /* 006E24 80006224 10200016 */  beqz  $at, .L80006280
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| /* 006E28 80006228 00000000 */   nop   
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| /* 006E2C 8000622C 310A000F */  andi  $t2, $t0, 0xf
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| /* 006E30 80006230 11400007 */  beqz  $t2, .L80006250
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| /* 006E34 80006234 2529FFF0 */   addiu $t1, $t1, -0x10
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| /* 006E38 80006238 010A4023 */  subu  $t0, $t0, $t2
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| /* 006E3C 8000623C BD150000 */  cache 0x15, ($t0)
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| /* 006E40 80006240 0109082B */  sltu  $at, $t0, $t1
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| /* 006E44 80006244 1020000E */  beqz  $at, .L80006280
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| /* 006E48 80006248 00000000 */   nop   
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| /* 006E4C 8000624C 25080010 */  addiu $t0, $t0, 0x10
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| .L80006250:
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| /* 006E50 80006250 312A000F */  andi  $t2, $t1, 0xf
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| /* 006E54 80006254 11400006 */  beqz  $t2, .L80006270
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| /* 006E58 80006258 00000000 */   nop   
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| /* 006E5C 8000625C 012A4823 */  subu  $t1, $t1, $t2
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| /* 006E60 80006260 BD350010 */  cache 0x15, 0x10($t1)
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| /* 006E64 80006264 0128082B */  sltu  $at, $t1, $t0
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| /* 006E68 80006268 14200005 */  bnez  $at, .L80006280
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| /* 006E6C 8000626C 00000000 */   nop   
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| .L80006270:
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| /* 006E70 80006270 BD110000 */  cache 0x11, ($t0)
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| /* 006E74 80006274 0109082B */  sltu  $at, $t0, $t1
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| /* 006E78 80006278 1420FFFD */  bnez  $at, .L80006270
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| /* 006E7C 8000627C 25080010 */   addiu $t0, $t0, 0x10
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| .L80006280:
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| /* 006E80 80006280 03E00008 */  jr    $ra
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| /* 006E84 80006284 00000000 */   nop   
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| 
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| .L80006288:
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| /* 006E88 80006288 3C088000 */  lui   $t0, %hi(D_80000010) # $t0, 0x8000
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| /* 006E8C 8000628C 010B4821 */  addu  $t1, $t0, $t3
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| /* 006E90 80006290 2529FFF0 */  addiu $t1, $t1, -0x10
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| .L80006294:
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| /* 006E94 80006294 BD010000 */  cache 1, ($t0)
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| /* 006E98 80006298 0109082B */  sltu  $at, $t0, $t1
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| /* 006E9C 8000629C 1420FFFD */  bnez  $at, .L80006294
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| /* 006EA0 800062A0 25080010 */   addiu $t0, %lo(D_80000010) # addiu $t0, $t0, 0x10
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| /* 006EA4 800062A4 03E00008 */  jr    $ra
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| /* 006EA8 800062A8 00000000 */   nop   
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