mirror of https://github.com/pmret/papermario.git
84 lines
3.9 KiB
ArmAsm
84 lines
3.9 KiB
ArmAsm
.include "macro.inc"
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/* assembler directives */
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.set noat /* allow manual use of $at */
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.set noreorder /* don't insert nops after branches */
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.set gp=64 /* allow use of 64-bit general purpose registers */
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.section .text, "ax"
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/* Generated by spimdisasm 1.11.1 */
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glabel osAiSetFrequency
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/* 3B730 80060330 44841000 */ mtc1 $a0, $f2
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/* 3B734 80060334 468010A1 */ cvt.d.w $f2, $f2
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/* 3B738 80060338 3C018009 */ lui $at, %hi(osViClock)
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/* 3B73C 8006033C C42445A8 */ lwc1 $f4, %lo(osViClock)($at)
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/* 3B740 80060340 46802120 */ cvt.s.w $f4, $f4
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/* 3B744 80060344 04830006 */ bgezl $a0, .LIQUE_80060360
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/* 3B748 80060348 46201020 */ cvt.s.d $f0, $f2
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/* 3B74C 8006034C 3C0141F0 */ lui $at, (0x41F00000 >> 16)
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/* 3B750 80060350 44810800 */ mtc1 $at, $f1
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/* 3B754 80060354 44800000 */ mtc1 $zero, $f0
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/* 3B758 80060358 46201080 */ add.d $f2, $f2, $f0
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/* 3B75C 8006035C 46201020 */ cvt.s.d $f0, $f2
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.LIQUE_80060360:
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/* 3B760 80060360 3C013F00 */ lui $at, (0x3F000000 >> 16)
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/* 3B764 80060364 44811000 */ mtc1 $at, $f2
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/* 3B768 80060368 46002003 */ div.s $f0, $f4, $f0
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/* 3B76C 8006036C 46020000 */ add.s $f0, $f0, $f2
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/* 3B770 80060370 3C014F00 */ lui $at, (0x4F000000 >> 16)
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/* 3B774 80060374 44811000 */ mtc1 $at, $f2
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/* 3B778 80060378 4600103E */ c.le.s $f2, $f0
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/* 3B77C 8006037C 45030005 */ bc1tl .LIQUE_80060394
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/* 3B780 80060380 46020001 */ sub.s $f0, $f0, $f2
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/* 3B784 80060384 4600018D */ trunc.w.s $f6, $f0
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/* 3B788 80060388 44073000 */ mfc1 $a3, $f6
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/* 3B78C 8006038C 080180EA */ j .LIQUE_800603A8
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/* 3B790 80060390 2CE20084 */ sltiu $v0, $a3, 0x84
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.LIQUE_80060394:
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/* 3B794 80060394 3C028000 */ lui $v0, 0x8000
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/* 3B798 80060398 4600018D */ trunc.w.s $f6, $f0
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/* 3B79C 8006039C 44073000 */ mfc1 $a3, $f6
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/* 3B7A0 800603A0 00E23825 */ or $a3, $a3, $v0
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/* 3B7A4 800603A4 2CE20084 */ sltiu $v0, $a3, 0x84
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.LIQUE_800603A8:
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/* 3B7A8 800603A8 10400003 */ beqz $v0, .LIQUE_800603B8
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/* 3B7AC 800603AC 3C023E0F */ lui $v0, (0x3E0F83E1 >> 16)
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/* 3B7B0 800603B0 03E00008 */ jr $ra
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/* 3B7B4 800603B4 2402FFFF */ addiu $v0, $zero, -0x1
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.LIQUE_800603B8:
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/* 3B7B8 800603B8 344283E1 */ ori $v0, $v0, (0x3E0F83E1 & 0xFFFF)
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/* 3B7BC 800603BC 00E20019 */ multu $a3, $v0
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/* 3B7C0 800603C0 00001010 */ mfhi $v0
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/* 3B7C4 800603C4 00021102 */ srl $v0, $v0, 4
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/* 3B7C8 800603C8 304400FF */ andi $a0, $v0, 0xFF
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/* 3B7CC 800603CC 2C830011 */ sltiu $v1, $a0, 0x11
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/* 3B7D0 800603D0 50600001 */ beql $v1, $zero, .LIQUE_800603D8
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/* 3B7D4 800603D4 24040010 */ addiu $a0, $zero, 0x10
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.LIQUE_800603D8:
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/* 3B7D8 800603D8 3C05A450 */ lui $a1, (0xA4500010 >> 16)
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/* 3B7DC 800603DC 34A50010 */ ori $a1, $a1, (0xA4500010 & 0xFFFF)
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/* 3B7E0 800603E0 3C06A450 */ lui $a2, (0xA4500014 >> 16)
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/* 3B7E4 800603E4 34C60014 */ ori $a2, $a2, (0xA4500014 & 0xFFFF)
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/* 3B7E8 800603E8 24E3FFFF */ addiu $v1, $a3, -0x1
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/* 3B7EC 800603EC ACA30000 */ sw $v1, 0x0($a1)
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/* 3B7F0 800603F0 3C028009 */ lui $v0, %hi(osViClock)
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/* 3B7F4 800603F4 8C4245A8 */ lw $v0, %lo(osViClock)($v0)
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/* 3B7F8 800603F8 2484FFFF */ addiu $a0, $a0, -0x1
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/* 3B7FC 800603FC ACC40000 */ sw $a0, 0x0($a2)
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/* 3B800 80060400 14E00002 */ bnez $a3, .LIQUE_8006040C
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/* 3B804 80060404 0047001A */ div $zero, $v0, $a3
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/* 3B808 80060408 0007000D */ break 7
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.LIQUE_8006040C:
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/* 3B80C 8006040C 2401FFFF */ addiu $at, $zero, -0x1
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/* 3B810 80060410 14E10004 */ bne $a3, $at, .LIQUE_80060424
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/* 3B814 80060414 3C018000 */ lui $at, (0x80000000 >> 16)
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/* 3B818 80060418 14410002 */ bne $v0, $at, .LIQUE_80060424
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/* 3B81C 8006041C 00000000 */ nop
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/* 3B820 80060420 0006000D */ break 6
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.LIQUE_80060424:
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/* 3B824 80060424 00001012 */ mflo $v0
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/* 3B828 80060428 03E00008 */ jr $ra
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/* 3B82C 8006042C 00000000 */ nop
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