lahf/sahf cpuid test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
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			@ -1,16 +1,10 @@
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Correctness issues:
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- some eflags manipulation incorrectly reset the bit 0x2.
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- rework eflags optimization (will be a consequence of TCG port)
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- SVM: rework the implementation: simplify code, move most intercept
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  tests as dynamic, correct segment access, verify exception safety,
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  cpu save/restore, SMM save/restore. 
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- x86_64: fxsave/fxrestore intel/amd differences
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- x86_64: lcall/ljmp intel/amd differences ?
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- x86_64: cmpxchgl intel/amd differences ?
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- x86_64: cmovl intel/amd differences ?
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- cmpxchg16b + cmpxchg8b cpuid test
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- x86: monitor invalid 
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- better code fetch (different exception handling + CS.limit support)
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- user/kernel PUSHL/POPL in helper.c
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- add missing cpuid tests
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			@ -27,11 +21,12 @@ Correctness issues:
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Optimizations/Features:
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- finish TCG port
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- add SVM nested paging support
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- add VMX support
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- add AVX support
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- add SSE5 support
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- fxsave/fxrstor AMD extensions
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- improve monitor/mwait support
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- faster EFLAGS update: consider SZAP, C, O can be updated separately
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  with a bit field in CC_OP and more state variables.
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- evaluate x87 stack pointer statically
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			@ -103,6 +103,7 @@ typedef struct DisasContext {
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    int cpuid_features;
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    int cpuid_ext_features;
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    int cpuid_ext2_features;
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    int cpuid_ext3_features;
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} DisasContext;
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static void gen_eob(DisasContext *s);
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			@ -5829,7 +5830,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
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        }
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        break;
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    case 0x9e: /* sahf */
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        if (CODE64(s))
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        if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
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            goto illegal_op;
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        gen_op_mov_TN_reg(OT_BYTE, 0, R_AH);
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        if (s->cc_op != CC_OP_DYNAMIC)
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			@ -5841,7 +5842,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
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        s->cc_op = CC_OP_EFLAGS;
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        break;
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    case 0x9f: /* lahf */
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        if (CODE64(s))
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        if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
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            goto illegal_op;
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        if (s->cc_op != CC_OP_DYNAMIC)
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            gen_op_set_cc_op(s->cc_op);
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			@ -7058,6 +7059,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
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    dc->cpuid_features = env->cpuid_features;
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    dc->cpuid_ext_features = env->cpuid_ext_features;
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    dc->cpuid_ext2_features = env->cpuid_ext2_features;
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    dc->cpuid_ext3_features = env->cpuid_ext3_features;
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#ifdef TARGET_X86_64
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    dc->lma = (flags >> HF_LMA_SHIFT) & 1;
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    dc->code64 = (flags >> HF_CS64_SHIFT) & 1;
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