target-i386: create a separate AddressSpace for each CPU
Different CPUs can be in SMM or not at the same time, thus they will see different things where the chipset places SMRAM. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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			@ -111,6 +111,7 @@ typedef struct X86CPU {
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    /* in order to simplify APIC support, we leave this pointer to the
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       user */
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    struct DeviceState *apic_state;
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    struct MemoryRegion *cpu_as_root;
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} X86CPU;
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static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
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			@ -44,6 +44,7 @@
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#include "hw/qdev-properties.h"
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#include "hw/cpu/icc_bus.h"
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#ifndef CONFIG_USER_ONLY
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#include "exec/address-spaces.h"
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#include "hw/xen/xen.h"
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#include "hw/i386/apic_internal.h"
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#endif
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			@ -2811,6 +2812,18 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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#endif
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    mce_init(cpu);
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#ifndef CONFIG_USER_ONLY
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    if (tcg_enabled()) {
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        cpu->cpu_as_root = g_new(MemoryRegion, 1);
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        cs->as = g_new(AddressSpace, 1);
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        memory_region_init_alias(cpu->cpu_as_root, OBJECT(cpu), "memory",
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                                 get_system_memory(), 0, ~0ull);
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        memory_region_set_enabled(cpu->cpu_as_root, true);
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        address_space_init(cs->as, cpu->cpu_as_root, "CPU");
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    }
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#endif
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    qemu_init_vcpu(cs);
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    /* Only Intel CPUs support hyperthreading. Even though QEMU fixes this
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			@ -2834,6 +2847,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
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    cpu_reset(cs);
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    xcc->parent_realize(dev, &local_err);
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out:
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    if (local_err != NULL) {
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        error_propagate(errp, local_err);
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