msi_supported -> msi_nonbroken
Rename controller flag to make it clearer what it means. Add some documentation as well. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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			@ -186,7 +186,7 @@ static void kvm_apic_realize(DeviceState *dev, Error **errp)
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                          APIC_SPACE_SIZE);
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    if (kvm_has_gsi_routing()) {
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        msi_supported = true;
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        msi_nonbroken = true;
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    }
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}
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			@ -44,7 +44,7 @@ static void xen_apic_realize(DeviceState *dev, Error **errp)
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    s->vapic_control = 0;
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    memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
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                          "xen-apic-msi", APIC_SPACE_SIZE);
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    msi_supported = true;
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    msi_nonbroken = true;
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}
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static void xen_apic_set_base(APICCommonState *s, uint64_t val)
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			@ -874,7 +874,7 @@ static void apic_realize(DeviceState *dev, Error **errp)
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    s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s);
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    local_apics[s->idx] = s;
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    msi_supported = true;
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    msi_nonbroken = true;
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}
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static void apic_class_init(ObjectClass *klass, void *data)
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			@ -148,7 +148,7 @@ static void gicv2m_realize(DeviceState *dev, Error **errp)
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        sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->spi[i]);
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    }
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    msi_supported = true;
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    msi_nonbroken = true;
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    kvm_gsi_direct_mapping = true;
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    kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
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}
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			@ -1375,7 +1375,7 @@ static void fsl_common_init(OpenPICState *opp)
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    opp->irq_msi = 224;
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    msi_supported = true;
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    msi_nonbroken = true;
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    for (i = 0; i < opp->fsl->max_ext; i++) {
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        opp->src[i].level = false;
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    }
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			@ -239,7 +239,7 @@ static void kvm_openpic_realize(DeviceState *dev, Error **errp)
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    memory_listener_register(&opp->mem_listener, &address_space_memory);
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    /* indicate pic capabilities */
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    msi_supported = true;
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    msi_nonbroken = true;
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    kvm_kernel_irqchip = true;
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    kvm_async_interrupts_allowed = true;
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			@ -72,7 +72,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
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        goto slotid_error;
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    }
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    if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) &&
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        msi_supported) {
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        msi_nonbroken) {
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        err = msi_init(dev, 0, 1, true, true);
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        if (err < 0) {
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            goto msi_error;
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										19
									
								
								hw/pci/msi.c
								
								
								
								
							
							
						
						
									
										19
									
								
								hw/pci/msi.c
								
								
								
								
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			@ -34,8 +34,21 @@
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#define PCI_MSI_VECTORS_MAX     32
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/* Flag for interrupt controller to declare MSI/MSI-X support */
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bool msi_supported;
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/*
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 * Flag for interrupt controllers to declare broken MSI/MSI-X support.
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 * values: false - broken; true - non-broken.
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 *
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 * Setting this flag to false will remove MSI/MSI-X capability from all devices.
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 *
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 * It is preferrable for controllers to set this to true (non-broken) even if
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 * they do not actually support MSI/MSI-X: guests normally probe the controller
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 * type and do not attempt to enable MSI/MSI-X with interrupt controllers not
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 * supporting such, so removing the capability is not required, and
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 * it seems cleaner to have a given device look the same for all boards.
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 *
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 * TODO: some existing controllers violate the above rule. Identify and fix them.
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 */
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bool msi_nonbroken;
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/* If we get rid of cap allocator, we won't need this. */
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static inline uint8_t msi_cap_sizeof(uint16_t flags)
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			@ -160,7 +173,7 @@ int msi_init(struct PCIDevice *dev, uint8_t offset,
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    uint8_t cap_size;
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    int config_offset;
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    if (!msi_supported) {
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    if (!msi_nonbroken) {
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        return -ENOTSUP;
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    }
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			@ -249,7 +249,7 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
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    uint8_t *config;
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    /* Nothing to do if MSI is not supported by interrupt controller */
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    if (!msi_supported) {
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    if (!msi_nonbroken) {
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        return -ENOTSUP;
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    }
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			@ -439,7 +439,7 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
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    _FDT((fdt_property_cell(fdt, "rtas-event-scan-rate",
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                            RTAS_EVENT_SCAN_RATE)));
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    if (msi_supported) {
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    if (msi_nonbroken) {
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        _FDT((fdt_property(fdt, "ibm,change-msix-capable", NULL, 0)));
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    }
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			@ -1743,7 +1743,7 @@ static void ppc_spapr_init(MachineState *machine)
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    bool kernel_le = false;
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    char *filename;
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    msi_supported = true;
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    msi_nonbroken = true;
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    QLIST_INIT(&spapr->phbs);
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			@ -1790,7 +1790,7 @@ void spapr_pci_rtas_init(void)
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                        rtas_ibm_read_pci_config);
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    spapr_rtas_register(RTAS_IBM_WRITE_PCI_CONFIG, "ibm,write-pci-config",
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                        rtas_ibm_write_pci_config);
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    if (msi_supported) {
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    if (msi_nonbroken) {
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        spapr_rtas_register(RTAS_IBM_QUERY_INTERRUPT_SOURCE_NUMBER,
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                            "ibm,query-interrupt-source-number",
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                            rtas_ibm_query_interrupt_source_number);
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			@ -597,7 +597,7 @@ static void s390_pcihost_class_init(ObjectClass *klass, void *data)
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    k->init = s390_pcihost_init;
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    hc->plug = s390_pcihost_hot_plug;
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    hc->unplug = s390_pcihost_hot_unplug;
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    msi_supported = true;
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    msi_nonbroken = true;
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}
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static const TypeInfo s390_pcihost_info = {
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			@ -29,7 +29,7 @@ struct MSIMessage {
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    uint32_t data;
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};
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extern bool msi_supported;
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extern bool msi_nonbroken;
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void msi_set_message(PCIDevice *dev, MSIMessage msg);
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MSIMessage msi_get_message(PCIDevice *dev, unsigned int vector);
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