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Avoid unused input arguments which triggered tcg errors. Spotted by 

Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-06-27 10:03:42 +00:00
parent b5dc7732e1
commit 2796188e56
3 changed files with 30 additions and 28 deletions
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12
target-mips/helper.h
View File

@ -239,14 +239,14 @@ FOP_PROTO(ngt)
#undef FOP_PROTO #undef FOP_PROTO
/* Special functions */ /* Special functions */
DEF_HELPER(target_ulong, do_di, (target_ulong t0)) DEF_HELPER(target_ulong, do_di, (void))
DEF_HELPER(target_ulong, do_ei, (target_ulong t0)) DEF_HELPER(target_ulong, do_ei, (void))
DEF_HELPER(void, do_eret, (void)) DEF_HELPER(void, do_eret, (void))
DEF_HELPER(void, do_deret, (void)) DEF_HELPER(void, do_deret, (void))
DEF_HELPER(target_ulong, do_rdhwr_cpunum, (target_ulong t0)) DEF_HELPER(target_ulong, do_rdhwr_cpunum, (void))
DEF_HELPER(target_ulong, do_rdhwr_synci_step, (target_ulong t0)) DEF_HELPER(target_ulong, do_rdhwr_synci_step, (void))
DEF_HELPER(target_ulong, do_rdhwr_cc, (target_ulong t0)) DEF_HELPER(target_ulong, do_rdhwr_cc, (void))
DEF_HELPER(target_ulong, do_rdhwr_ccres, (target_ulong t0)) DEF_HELPER(target_ulong, do_rdhwr_ccres, (void))
DEF_HELPER(void, do_pmon, (int function)) DEF_HELPER(void, do_pmon, (int function))
DEF_HELPER(void, do_wait, (void)) DEF_HELPER(void, do_wait, (void))

34
target-mips/op_helper.c
View File

@ -1746,18 +1746,20 @@ void r4k_do_tlbr (void)
#endif /* !CONFIG_USER_ONLY */ #endif /* !CONFIG_USER_ONLY */
/* Specials */ /* Specials */
target_ulong do_di (target_ulong t0) target_ulong do_di (void)
{ {
t0 = env->CP0_Status; target_ulong t0 = env->CP0_Status;
env->CP0_Status = t0 & ~(1 << CP0St_IE); env->CP0_Status = t0 & ~(1 << CP0St_IE);
cpu_mips_update_irq(env); cpu_mips_update_irq(env);
return t0; return t0;
} }
target_ulong do_ei (target_ulong t0) target_ulong do_ei (void)
{ {
t0 = env->CP0_Status; target_ulong t0 = env->CP0_Status;
env->CP0_Status = t0 | (1 << CP0St_IE); env->CP0_Status = t0 | (1 << CP0St_IE);
cpu_mips_update_irq(env); cpu_mips_update_irq(env);
@ -1820,48 +1822,48 @@ void do_deret (void)
env->CP0_LLAddr = 1; env->CP0_LLAddr = 1;
} }
target_ulong do_rdhwr_cpunum(target_ulong t0) target_ulong do_rdhwr_cpunum(void)
{ {
if ((env->hflags & MIPS_HFLAG_CP0) || if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 0))) (env->CP0_HWREna & (1 << 0)))
t0 = env->CP0_EBase & 0x3ff; return env->CP0_EBase & 0x3ff;
else else
do_raise_exception(EXCP_RI); do_raise_exception(EXCP_RI);
return t0; return 0;
} }
target_ulong do_rdhwr_synci_step(target_ulong t0) target_ulong do_rdhwr_synci_step(void)
{ {
if ((env->hflags & MIPS_HFLAG_CP0) || if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 1))) (env->CP0_HWREna & (1 << 1)))
t0 = env->SYNCI_Step; return env->SYNCI_Step;
else else
do_raise_exception(EXCP_RI); do_raise_exception(EXCP_RI);
return t0; return 0;
} }
target_ulong do_rdhwr_cc(target_ulong t0) target_ulong do_rdhwr_cc(void)
{ {
if ((env->hflags & MIPS_HFLAG_CP0) || if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 2))) (env->CP0_HWREna & (1 << 2)))
t0 = env->CP0_Count; return env->CP0_Count;
else else
do_raise_exception(EXCP_RI); do_raise_exception(EXCP_RI);
return t0; return 0;
} }
target_ulong do_rdhwr_ccres(target_ulong t0) target_ulong do_rdhwr_ccres(void)
{ {
if ((env->hflags & MIPS_HFLAG_CP0) || if ((env->hflags & MIPS_HFLAG_CP0) ||
(env->CP0_HWREna & (1 << 3))) (env->CP0_HWREna & (1 << 3)))
t0 = env->CCRes; return env->CCRes;
else else
do_raise_exception(EXCP_RI); do_raise_exception(EXCP_RI);
return t0; return 0;
} }
/* Bitfield operations. */ /* Bitfield operations. */

12
target-mips/translate.c
View File

@ -7386,19 +7386,19 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
switch (rd) { switch (rd) {
case 0: case 0:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_rdhwr_cpunum, t0, t0); tcg_gen_helper_1_0(do_rdhwr_cpunum, t0);
break; break;
case 1: case 1:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_rdhwr_synci_step, t0, t0); tcg_gen_helper_1_0(do_rdhwr_synci_step, t0);
break; break;
case 2: case 2:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_rdhwr_cc, t0, t0); tcg_gen_helper_1_0(do_rdhwr_cc, t0);
break; break;
case 3: case 3:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_rdhwr_ccres, t0, t0); tcg_gen_helper_1_0(do_rdhwr_ccres, t0);
break; break;
case 29: case 29:
#if defined (CONFIG_USER_ONLY) #if defined (CONFIG_USER_ONLY)
@ -7548,14 +7548,14 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
case OPC_DI: case OPC_DI:
check_insn(env, ctx, ISA_MIPS32R2); check_insn(env, ctx, ISA_MIPS32R2);
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_di, t0, t0); tcg_gen_helper_1_0(do_di, t0);
/* Stop translation as we may have switched the execution mode */ /* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP; ctx->bstate = BS_STOP;
break; break;
case OPC_EI: case OPC_EI:
check_insn(env, ctx, ISA_MIPS32R2); check_insn(env, ctx, ISA_MIPS32R2);
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
tcg_gen_helper_1_1(do_ei, t0, t0); tcg_gen_helper_1_0(do_ei, t0);
/* Stop translation as we may have switched the execution mode */ /* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP; ctx->bstate = BS_STOP;
break; break;