Net patches
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJTlbmOAAoJEJykq7OBq3PI4osIAJ/uUykcwA6hP9NIqdluvXu1 72JExcErDvaQGR723hp/Ojmzl0R99W+7VIMaLd7/3Z1nkQLIOlq//Pf42gm00Xrb jts2T3SHVB2aYO5FfQj0sJ5clIvmSco8WkgutybXd2zUdNZ4XOSmNgv8lC6R0egF iKAC7cM8bCBhcZgWjzDtGUgBBd6J627EH/veV8gWxq2eX+nJ8mHEj7zhgBshql4/ IVESw97AqPf62ZuHIpBtsO2szYL28Jr6GhW0poyOXT4OM8VH+NkebG/1RjXzOskb h4iNPZYrGR9GGxqfaX3E4wDx2+4uKrrDJrvcMq+MR6Dmn0/48tiNuianR0E8stQ= =g3qS -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into staging Net patches # gpg: Signature made Mon 09 Jun 2014 14:41:34 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/net-pull-request: e1000: remove broken support for 82573L tests: e1000: test additional device IDs e1000: allow command-line selection of card model vmxnet3: fix msix vectors unuse net: xilinx_ethlite: Fix Rx-pong interrupt Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
4a331bb33b
110
hw/net/e1000.c
110
hw/net/e1000.c
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@ -69,23 +69,11 @@ static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL);
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/*
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* HW models:
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* E1000_DEV_ID_82540EM works with Windows and Linux
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* E1000_DEV_ID_82573L OK with windoze and Linux 2.6.22,
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* appears to perform better than 82540EM, but breaks with Linux 2.6.18
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* E1000_DEV_ID_82540EM works with Windows, Linux, and OS X <= 10.8
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* E1000_DEV_ID_82544GC_COPPER appears to work; not well tested
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* E1000_DEV_ID_82545EM_COPPER works with Linux and OS X >= 10.6
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* Others never tested
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*/
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enum { E1000_DEVID = E1000_DEV_ID_82540EM };
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/*
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* May need to specify additional MAC-to-PHY entries --
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* Intel's Windows driver refuses to initialize unless they match
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*/
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enum {
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PHY_ID2_INIT = E1000_DEVID == E1000_DEV_ID_82573L ? 0xcc2 :
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E1000_DEVID == E1000_DEV_ID_82544GC_COPPER ? 0xc30 :
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/* default to E1000_DEV_ID_82540EM */ 0xc20
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};
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typedef struct E1000State_st {
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/*< private >*/
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@ -151,10 +139,20 @@ typedef struct E1000State_st {
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uint32_t compat_flags;
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} E1000State;
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#define TYPE_E1000 "e1000"
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typedef struct E1000BaseClass {
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PCIDeviceClass parent_class;
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uint16_t phy_id2;
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} E1000BaseClass;
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#define TYPE_E1000_BASE "e1000-base"
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#define E1000(obj) \
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OBJECT_CHECK(E1000State, (obj), TYPE_E1000)
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OBJECT_CHECK(E1000State, (obj), TYPE_E1000_BASE)
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#define E1000_DEVICE_CLASS(klass) \
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OBJECT_CLASS_CHECK(E1000BaseClass, (klass), TYPE_E1000_BASE)
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#define E1000_DEVICE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(E1000BaseClass, (obj), TYPE_E1000_BASE)
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#define defreg(x) x = (E1000_##x>>2)
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enum {
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@ -232,10 +230,11 @@ static const char phy_regcap[0x20] = {
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[PHY_ID2] = PHY_R, [M88E1000_PHY_SPEC_STATUS] = PHY_R
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};
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/* PHY_ID2 documented in 8254x_GBe_SDM.pdf, pp. 250 */
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static const uint16_t phy_reg_init[] = {
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[PHY_CTRL] = 0x1140,
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[PHY_STATUS] = 0x794d, /* link initially up with not completed autoneg */
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[PHY_ID1] = 0x141, [PHY_ID2] = PHY_ID2_INIT,
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[PHY_ID1] = 0x141, /* [PHY_ID2] configured per DevId, from e1000_reset() */
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[PHY_1000T_CTRL] = 0x0e00, [M88E1000_PHY_SPEC_CTRL] = 0x360,
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[M88E1000_EXT_PHY_SPEC_CTRL] = 0x0d60, [PHY_AUTONEG_ADV] = 0xde1,
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[PHY_LP_ABILITY] = 0x1e0, [PHY_1000T_STATUS] = 0x3c00,
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@ -272,10 +271,6 @@ set_interrupt_cause(E1000State *s, int index, uint32_t val)
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uint32_t pending_ints;
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uint32_t mit_delay;
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if (val && (E1000_DEVID >= E1000_DEV_ID_82547EI_MOBILE)) {
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/* Only for 8257x */
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val |= E1000_ICR_INT_ASSERTED;
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}
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s->mac_reg[ICR] = val;
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/*
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@ -375,6 +370,7 @@ rxbufsize(uint32_t v)
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static void e1000_reset(void *opaque)
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{
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E1000State *d = opaque;
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E1000BaseClass *edc = E1000_DEVICE_GET_CLASS(d);
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uint8_t *macaddr = d->conf.macaddr.a;
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int i;
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@ -385,6 +381,7 @@ static void e1000_reset(void *opaque)
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d->mit_ide = 0;
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memset(d->phy_reg, 0, sizeof d->phy_reg);
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memmove(d->phy_reg, phy_reg_init, sizeof phy_reg_init);
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d->phy_reg[PHY_ID2] = edc->phy_id2;
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memset(d->mac_reg, 0, sizeof d->mac_reg);
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memmove(d->mac_reg, mac_reg_init, sizeof mac_reg_init);
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d->rxbuf_min_shift = 1;
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@ -1440,9 +1437,13 @@ static const VMStateDescription vmstate_e1000 = {
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}
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};
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/*
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* EEPROM contents documented in Tables 5-2 and 5-3, pp. 98-102.
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* Note: A valid DevId will be inserted during pci_e1000_init().
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*/
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static const uint16_t e1000_eeprom_template[64] = {
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0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0x0000, 0x0000, 0x0000,
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0x3000, 0x1000, 0x6403, E1000_DEVID, 0x8086, E1000_DEVID, 0x8086, 0x3040,
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0x3000, 0x1000, 0x6403, 0 /*DevId*/, 0x8086, 0 /*DevId*/, 0x8086, 0x3040,
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0x0008, 0x2000, 0x7e14, 0x0048, 0x1000, 0x00d8, 0x0000, 0x2700,
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0x6cc9, 0x3150, 0x0722, 0x040b, 0x0984, 0x0000, 0xc000, 0x0706,
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0x1008, 0x0000, 0x0f04, 0x7fff, 0x4d01, 0xffff, 0xffff, 0xffff,
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@ -1507,6 +1508,7 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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{
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DeviceState *dev = DEVICE(pci_dev);
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E1000State *d = E1000(pci_dev);
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PCIDeviceClass *pdc = PCI_DEVICE_GET_CLASS(pci_dev);
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uint8_t *pci_conf;
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uint16_t checksum = 0;
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int i;
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@ -1531,6 +1533,7 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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macaddr = d->conf.macaddr.a;
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for (i = 0; i < 3; i++)
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d->eeprom_data[i] = (macaddr[2*i+1]<<8) | macaddr[2*i];
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d->eeprom_data[11] = d->eeprom_data[13] = pdc->device_id;
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for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
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checksum += d->eeprom_data[i];
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checksum = (uint16_t) EEPROM_SUM - checksum;
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@ -1564,17 +1567,27 @@ static Property e1000_properties[] = {
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DEFINE_PROP_END_OF_LIST(),
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};
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typedef struct E1000Info {
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const char *name;
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uint16_t device_id;
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uint8_t revision;
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uint16_t phy_id2;
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} E1000Info;
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static void e1000_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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E1000BaseClass *e = E1000_DEVICE_CLASS(klass);
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const E1000Info *info = data;
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k->init = pci_e1000_init;
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k->exit = pci_e1000_uninit;
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k->romfile = "efi-e1000.rom";
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k->vendor_id = PCI_VENDOR_ID_INTEL;
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k->device_id = E1000_DEVID;
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k->revision = 0x03;
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k->device_id = info->device_id;
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k->revision = info->revision;
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e->phy_id2 = info->phy_id2;
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k->class_id = PCI_CLASS_NETWORK_ETHERNET;
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set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
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dc->desc = "Intel Gigabit Ethernet";
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@ -1583,16 +1596,57 @@ static void e1000_class_init(ObjectClass *klass, void *data)
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dc->props = e1000_properties;
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}
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static const TypeInfo e1000_info = {
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.name = TYPE_E1000,
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static const TypeInfo e1000_base_info = {
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.name = TYPE_E1000_BASE,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(E1000State),
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.class_init = e1000_class_init,
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.class_size = sizeof(E1000BaseClass),
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.abstract = true,
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};
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static const E1000Info e1000_devices[] = {
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{
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.name = "e1000-82540em",
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.device_id = E1000_DEV_ID_82540EM,
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.revision = 0x03,
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.phy_id2 = E1000_PHY_ID2_8254xx_DEFAULT,
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},
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{
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.name = "e1000-82544gc",
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.device_id = E1000_DEV_ID_82544GC_COPPER,
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.revision = 0x03,
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.phy_id2 = E1000_PHY_ID2_82544x,
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},
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{
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.name = "e1000-82545em",
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.device_id = E1000_DEV_ID_82545EM_COPPER,
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.revision = 0x03,
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.phy_id2 = E1000_PHY_ID2_8254xx_DEFAULT,
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},
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};
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static const TypeInfo e1000_default_info = {
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.name = "e1000",
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.parent = "e1000-82540em",
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};
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static void e1000_register_types(void)
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{
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type_register_static(&e1000_info);
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int i;
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type_register_static(&e1000_base_info);
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for (i = 0; i < ARRAY_SIZE(e1000_devices); i++) {
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const E1000Info *info = &e1000_devices[i];
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TypeInfo type_info = {};
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type_info.name = info->name;
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type_info.parent = TYPE_E1000_BASE;
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type_info.class_data = (void *)info;
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type_info.class_init = e1000_class_init;
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type_register(&type_info);
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}
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type_register_static(&e1000_default_info);
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}
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type_init(e1000_register_types)
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@ -99,6 +99,12 @@
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#define E1000_DEV_ID_ICH8_IFE_G 0x10C5
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#define E1000_DEV_ID_ICH8_IGP_M 0x104D
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/* Device Specific Register Defaults */
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#define E1000_PHY_ID2_82541x 0x380
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#define E1000_PHY_ID2_82544x 0xC30
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#define E1000_PHY_ID2_8254xx_DEFAULT 0xC20 /* 82540x, 82545x, and 82546x */
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#define E1000_PHY_ID2_82573x 0xCC0
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/* Register Set. (82543, 82544)
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*
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* Registers are defined to be 32 bits and should be accessed as 32 bit values.
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@ -2050,7 +2050,7 @@ vmxnet3_cleanup_msix(VMXNET3State *s)
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PCIDevice *d = PCI_DEVICE(s);
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if (s->msix_used) {
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msix_vector_unuse(d, VMXNET3_MAX_INTRS);
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vmxnet3_unuse_msix_vectors(s, VMXNET3_MAX_INTRS);
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msix_uninit(d, &s->msix_bar, &s->msix_bar);
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}
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}
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@ -196,8 +196,9 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
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memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size);
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s->regs[rxbase + R_RX_CTRL0] |= CTRL_S;
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if (s->regs[rxbase + R_RX_CTRL0] & CTRL_I)
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if (s->regs[R_RX_CTRL0] & CTRL_I) {
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eth_pulse_irq(s);
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}
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/* If c_rx_pingpong was set flip buffers. */
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s->rxbuf ^= s->c_rx_pingpong;
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@ -13,21 +13,40 @@
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#include "qemu/osdep.h"
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/* Tests only initialization so far. TODO: Replace with functional tests */
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static void nop(void)
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static void test_device(gconstpointer data)
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{
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const char *model = data;
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QTestState *s;
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char *args;
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args = g_strdup_printf("-device %s", model);
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s = qtest_start(args);
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if (s) {
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qtest_quit(s);
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}
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g_free(args);
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}
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static const char *models[] = {
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"e1000",
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"e1000-82540em",
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"e1000-82544gc",
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"e1000-82545em",
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};
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int main(int argc, char **argv)
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{
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int ret;
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int i;
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g_test_init(&argc, &argv, NULL);
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qtest_add_func("/e1000/nop", nop);
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qtest_start("-device e1000");
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ret = g_test_run();
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for (i = 0; i < ARRAY_SIZE(models); i++) {
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char *path;
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qtest_end();
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path = g_strdup_printf("/%s/e1000/%s", qtest_get_arch(), models[i]);
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g_test_add_data_func(path, models[i], test_device);
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}
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return ret;
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return g_test_run();
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}
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