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libqos/ahci: add ahci command functions 

This patch adds the AHCICommand structure, and a set of functions to
operate on the structure.

ahci_command_create - Initialize and create a new AHCICommand in memory
ahci_command_free - Destroy this object.
ahci_command_set_buffer - Set where the guest memory DMA buffer is.
ahci_command_commit - Write this command to the AHCI HBA.
ahci_command_issue - Issue the committed command synchronously.
ahci_command_issue_async - Issue the committed command asynchronously.
ahci_command_wait - Wait for an asynchronous command to finish.
ahci_command_slot - Get the number of the command slot we committed to.

Helpers:
size_to_prdtl       - Calculate the required minimum PRDTL size from
                      a buffer size.
ahci_command_find   - Given an ATA command mnemonic, look it up in the
                      properties table to obtain info about the command.
command_header_init - Initialize the command header with sane values.
command_table_init  - Initialize the command table with sane values.

[Peter Maydell <peter.maydell@linaro.org> reported the following clang
warning:

  tests/libqos/ahci.c:598:3: warning: redefinition
  of typedef 'AHCICommand' is a C11 feature
      [-Wtypedef-redefinition]
  } AHCICommand;

I have replaced typedef struct ... AHCICommand; with struct ... ;
--Stefan]

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Message-id: 1423158090-25580-13-git-send-email-jsnow@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
John Snow 2015-02-05 12:41:23 -05:00 committed by Stefan Hajnoczi
parent 716b64079c
commit 64a5a272e3
3 changed files with 237 additions and 56 deletions
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73
tests/ahci-test.c
View File

@ -657,30 +657,28 @@ static void ahci_test_port_spec(AHCIQState *ahci, uint8_t port)
*/
static void ahci_test_identify(AHCIQState *ahci)
{
RegH2DFIS fis;
AHCICommandHeader cmd;
PRD prd;
uint32_t data_ptr;
uint16_t buff[256];
unsigned i;
int rc;
AHCICommand *cmd;
uint8_t cx;
uint64_t table;
g_assert(ahci != NULL);
/* We need to:
* (1) Create a Command Table Buffer and update the Command List Slot #0
* to point to this buffer.
* (2) Construct an FIS host-to-device command structure, and write it to
* (1) Create a data buffer for the IDENTIFY response to be sent to,
* (2) Create a Command Table Buffer
* (3) Construct an FIS host-to-device command structure, and write it to
* the top of the command table buffer.
* (3) Create a data buffer for the IDENTIFY response to be sent to
* (4) Create a Physical Region Descriptor that points to the data buffer,
* and write it to the bottom (offset 0x80) of the command table.
* (5) Now, PxCLB points to the command list, command 0 points to
* (5) Obtain a Command List slot, and update this header to point to
* the Command Table we built above.
* (6) Now, PxCLB points to the command list, command 0 points to
* our table, and our table contains an FIS instruction and a
* PRD that points to our rx buffer.
* (6) We inform the HBA via PxCI that there is a command ready in slot #0.
* (7) We inform the HBA via PxCI that there is a command ready in slot #0.
*/
/* Pick the first implemented and running port */
@ -690,61 +688,24 @@ static void ahci_test_identify(AHCIQState *ahci)
/* Clear out the FIS Receive area and any pending interrupts. */
ahci_port_clear(ahci, i);
/* Create a Command Table buffer. 0x80 is the smallest with a PRDTL of 0. */
/* We need at least one PRD, so round up to the nearest 0x80 multiple. */
table = ahci_alloc(ahci, CMD_TBL_SIZ(1));
g_assert(table);
ASSERT_BIT_CLEAR(table, 0x7F);
/* Create a data buffer ... where we will dump the IDENTIFY data to. */
/* Create a data buffer where we will dump the IDENTIFY data to. */
data_ptr = ahci_alloc(ahci, 512);
g_assert(data_ptr);
/* pick a command slot (should be 0!) */
cx = ahci_pick_cmd(ahci, i);
/* Construct our Command Header (set_command_header handles endianness.) */
memset(&cmd, 0x00, sizeof(cmd));
cmd.flags = 5; /* reg_h2d_fis is 5 double-words long */
cmd.flags |= CMDH_CLR_BSY; /* clear PxTFD.STS.BSY when done */
cmd.prdtl = 1; /* One PRD table entry. */
cmd.prdbc = 0;
cmd.ctba = table;
/* Construct our PRD, noting that DBC is 0-indexed. */
prd.dba = cpu_to_le64(data_ptr);
prd.res = 0;
/* 511+1 bytes, request DPS interrupt */
prd.dbc = cpu_to_le32(511 | 0x80000000);
/* Construct our Command FIS, Based on http://wiki.osdev.org/AHCI */
memset(&fis, 0x00, sizeof(fis));
fis.fis_type = REG_H2D_FIS; /* Register Host-to-Device FIS */
fis.command = CMD_IDENTIFY;
fis.device = 0;
fis.flags = REG_H2D_FIS_CMD; /* Indicate this is a command FIS */
/* We've committed nothing yet, no interrupts should be posted yet. */
g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
/* Commit the Command FIS to the Command Table */
ahci_write_fis(ahci, &fis, table);
/* Commit the PRD entry to the Command Table */
memwrite(table + 0x80, &prd, sizeof(prd));
/* Commit Command #cx, pointing to the Table, to the Command List Buffer. */
ahci_set_command_header(ahci, i, cx, &cmd);
/* Construct the Command Table (FIS and PRDT) and Command Header */
cmd = ahci_command_create(CMD_IDENTIFY);
ahci_command_set_buffer(cmd, data_ptr);
/* Write the command header and PRDT to guest memory */
ahci_command_commit(ahci, cmd, i);
/* Everything is in place, but we haven't given the go-ahead yet,
* so we should find that there are no pending interrupts yet. */
g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
/* Issue Command #cx via PxCI */
ahci_px_wreg(ahci, i, AHCI_PX_CI, (1 << cx));
while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) {
usleep(50);
}
ahci_command_issue(ahci, cmd);
cx = ahci_command_slot(cmd);
/* Check registers for post-command consistency */
ahci_port_check_error(ahci, i);
/* BUG: we expect AHCI_PX_IS_DPS to be set. */

202
tests/libqos/ahci.c
View File

@ -539,3 +539,205 @@ unsigned ahci_pick_cmd(AHCIQState *ahci, uint8_t port)
g_test_message("All command slots were busy.");
g_assert_not_reached();
}
inline unsigned size_to_prdtl(unsigned bytes, unsigned bytes_per_prd)
{
/* Each PRD can describe up to 4MiB */
g_assert_cmphex(bytes_per_prd, <=, 4096 * 1024);
g_assert_cmphex(bytes_per_prd & 0x01, ==, 0x00);
return (bytes + bytes_per_prd - 1) / bytes_per_prd;
}
struct AHCICommand {
/* Test Management Data */
uint8_t name;
uint8_t port;
uint8_t slot;
uint32_t interrupts;
uint64_t xbytes;
uint32_t prd_size;
uint64_t buffer;
AHCICommandProp *props;
/* Data to be transferred to the guest */
AHCICommandHeader header;
RegH2DFIS fis;
void *atapi_cmd;
};
static AHCICommandProp *ahci_command_find(uint8_t command_name)
{
int i;
for (i = 0; i < ARRAY_SIZE(ahci_command_properties); i++) {
if (ahci_command_properties[i].cmd == command_name) {
return &ahci_command_properties[i];
}
}
return NULL;
}
/**
* Initializes a basic command header in memory.
* We assume that this is for an ATA command using RegH2DFIS.
*/
static void command_header_init(AHCICommand *cmd)
{
AHCICommandHeader *hdr = &cmd->header;
AHCICommandProp *props = cmd->props;
hdr->flags = 5; /* RegH2DFIS is 5 DW long. Must be < 32 */
hdr->flags |= CMDH_CLR_BSY; /* Clear the BSY bit when done */
if (props->write) {
hdr->flags |= CMDH_WRITE;
}
if (props->atapi) {
hdr->flags |= CMDH_ATAPI;
}
/* Other flags: PREFETCH, RESET, and BIST */
hdr->prdtl = size_to_prdtl(cmd->xbytes, cmd->prd_size);
hdr->prdbc = 0;
hdr->ctba = 0;
}
static void command_table_init(AHCICommand *cmd)
{
RegH2DFIS *fis = &(cmd->fis);
fis->fis_type = REG_H2D_FIS;
fis->flags = REG_H2D_FIS_CMD; /* "Command" bit */
fis->command = cmd->name;
cmd->fis.feature_low = 0x00;
cmd->fis.feature_high = 0x00;
if (cmd->props->lba28 || cmd->props->lba48) {
cmd->fis.device = ATA_DEVICE_LBA;
}
cmd->fis.count = (cmd->xbytes / AHCI_SECTOR_SIZE);
cmd->fis.icc = 0x00;
cmd->fis.control = 0x00;
memset(cmd->fis.aux, 0x00, ARRAY_SIZE(cmd->fis.aux));
}
AHCICommand *ahci_command_create(uint8_t command_name)
{
AHCICommandProp *props = ahci_command_find(command_name);
AHCICommand *cmd;
g_assert(props);
cmd = g_malloc0(sizeof(AHCICommand));
g_assert(!(props->dma && props->pio));
g_assert(!(props->lba28 && props->lba48));
g_assert(!(props->read && props->write));
g_assert(!props->size || props->data);
/* Defaults and book-keeping */
cmd->props = props;
cmd->name = command_name;
cmd->xbytes = props->size;
cmd->prd_size = 4096;
cmd->buffer = 0xabad1dea;
cmd->interrupts = AHCI_PX_IS_DHRS;
/* BUG: We expect the DPS interrupt for data commands */
/* cmd->interrupts |= props->data ? AHCI_PX_IS_DPS : 0; */
/* BUG: We expect the DMA Setup interrupt for DMA commands */
/* cmd->interrupts |= props->dma ? AHCI_PX_IS_DSS : 0; */
cmd->interrupts |= props->pio ? AHCI_PX_IS_PSS : 0;
command_header_init(cmd);
command_table_init(cmd);
return cmd;
}
void ahci_command_free(AHCICommand *cmd)
{
g_free(cmd);
}
void ahci_command_set_buffer(AHCICommand *cmd, uint64_t buffer)
{
cmd->buffer = buffer;
}
void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port)
{
uint16_t i, prdtl;
uint64_t table_size, table_ptr, remaining;
PRD prd;
/* This command is now tied to this port/command slot */
cmd->port = port;
cmd->slot = ahci_pick_cmd(ahci, port);
/* Create a buffer for the command table */
prdtl = size_to_prdtl(cmd->xbytes, cmd->prd_size);
table_size = CMD_TBL_SIZ(prdtl);
table_ptr = ahci_alloc(ahci, table_size);
g_assert(table_ptr);
/* AHCI 1.3: Must be aligned to 0x80 */
g_assert((table_ptr & 0x7F) == 0x00);
cmd->header.ctba = table_ptr;
/* Commit the command header and command FIS */
ahci_set_command_header(ahci, port, cmd->slot, &(cmd->header));
ahci_write_fis(ahci, &(cmd->fis), table_ptr);
/* Construct and write the PRDs to the command table */
g_assert_cmphex(prdtl, ==, cmd->header.prdtl);
remaining = cmd->xbytes;
for (i = 0; i < prdtl; ++i) {
prd.dba = cpu_to_le64(cmd->buffer + (cmd->prd_size * i));
prd.res = 0;
if (remaining > cmd->prd_size) {
/* Note that byte count is 0-based. */
prd.dbc = cpu_to_le32(cmd->prd_size - 1);
remaining -= cmd->prd_size;
} else {
/* Again, dbc is 0-based. */
prd.dbc = cpu_to_le32(remaining - 1);
remaining = 0;
}
prd.dbc |= cpu_to_le32(0x80000000); /* Request DPS Interrupt */
/* Commit the PRD entry to the Command Table */
memwrite(table_ptr + 0x80 + (i * sizeof(PRD)),
&prd, sizeof(PRD));
}
/* Bookmark the PRDTL and CTBA values */
ahci->port[port].ctba[cmd->slot] = table_ptr;
ahci->port[port].prdtl[cmd->slot] = prdtl;
}
void ahci_command_issue_async(AHCIQState *ahci, AHCICommand *cmd)
{
if (cmd->props->ncq) {
ahci_px_wreg(ahci, cmd->port, AHCI_PX_SACT, (1 << cmd->slot));
}
ahci_px_wreg(ahci, cmd->port, AHCI_PX_CI, (1 << cmd->slot));
}
void ahci_command_wait(AHCIQState *ahci, AHCICommand *cmd)
{
/* We can't rely on STS_BSY until the command has started processing.
* Therefore, we also use the Command Issue bit as indication of
* a command in-flight. */
while (BITSET(ahci_px_rreg(ahci, cmd->port, AHCI_PX_TFD),
AHCI_PX_TFD_STS_BSY) ||
BITSET(ahci_px_rreg(ahci, cmd->port, AHCI_PX_CI), (1 << cmd->slot))) {
usleep(50);
}
}
void ahci_command_issue(AHCIQState *ahci, AHCICommand *cmd)
{
ahci_command_issue_async(ahci, cmd);
ahci_command_wait(ahci, cmd);
}
uint8_t ahci_command_slot(AHCICommand *cmd)
{
return cmd->slot;
}

18
tests/libqos/ahci.h
View File

@ -418,6 +418,9 @@ typedef struct PRD {
uint32_t dbc; /* Data Byte Count (0-indexed) & Interrupt Flag (bit 2^31) */
} __attribute__((__packed__)) PRD;
/* Opaque, defined within ahci.c */
typedef struct AHCICommand AHCICommand;
/*** Macro Utilities ***/
#define BITANY(data, mask) (((data) & (mask)) != 0)
#define BITSET(data, mask) (((data) & (mask)) == (mask))
@ -517,5 +520,20 @@ void ahci_set_command_header(AHCIQState *ahci, uint8_t port,
void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot);
void ahci_write_fis(AHCIQState *ahci, RegH2DFIS *fis, uint64_t addr);
unsigned ahci_pick_cmd(AHCIQState *ahci, uint8_t port);
unsigned size_to_prdtl(unsigned bytes, unsigned bytes_per_prd);
/* Command Lifecycle */
AHCICommand *ahci_command_create(uint8_t command_name);
void ahci_command_commit(AHCIQState *ahci, AHCICommand *cmd, uint8_t port);
void ahci_command_issue(AHCIQState *ahci, AHCICommand *cmd);
void ahci_command_issue_async(AHCIQState *ahci, AHCICommand *cmd);
void ahci_command_wait(AHCIQState *ahci, AHCICommand *cmd);
void ahci_command_free(AHCICommand *cmd);
/* Command adjustments */
void ahci_command_set_buffer(AHCICommand *cmd, uint64_t buffer);
/* Command Misc */
uint8_t ahci_command_slot(AHCICommand *cmd);
#endif