spitz: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
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								hw/spitz.c
								
								
								
								
							
							
						
						
									
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								hw/spitz.c
								
								
								
								
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			@ -49,6 +49,7 @@
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typedef struct {
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    SysBusDevice busdev;
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    MemoryRegion iomem;
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    DeviceState *nand;
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    uint8_t ctl;
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    uint8_t manf_id;
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			@ -56,7 +57,7 @@ typedef struct {
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    ECCState ecc;
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} SLNANDState;
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static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
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static uint64_t sl_read(void *opaque, target_phys_addr_t addr, unsigned size)
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{
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    SLNANDState *s = (SLNANDState *) opaque;
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    int ryby;
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			@ -86,6 +87,10 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
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            return s->ctl;
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    case FLASH_FLASHIO:
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        if (size == 4) {
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            return ecc_digest(&s->ecc, nand_getio(s->nand)) |
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                (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
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        }
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        return ecc_digest(&s->ecc, nand_getio(s->nand));
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    default:
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			@ -94,19 +99,8 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
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    return 0;
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}
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static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
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{
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    SLNANDState *s = (SLNANDState *) opaque;
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    if (addr == FLASH_FLASHIO)
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        return ecc_digest(&s->ecc, nand_getio(s->nand)) |
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                (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
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    return sl_readb(opaque, addr);
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}
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static void sl_writeb(void *opaque, target_phys_addr_t addr,
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                uint32_t value)
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static void sl_write(void *opaque, target_phys_addr_t addr,
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                     uint64_t value, unsigned size)
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{
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    SLNANDState *s = (SLNANDState *) opaque;
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			@ -140,15 +134,10 @@ enum {
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    FLASH_1024M,
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};
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static CPUReadMemoryFunc * const sl_readfn[] = {
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    sl_readb,
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    sl_readb,
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    sl_readl,
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};
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static CPUWriteMemoryFunc * const sl_writefn[] = {
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    sl_writeb,
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    sl_writeb,
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    sl_writeb,
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static const MemoryRegionOps sl_ops = {
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    .read = sl_read,
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    .write = sl_write,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void sl_flash_register(PXA2xxState *cpu, int size)
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			@ -168,7 +157,6 @@ static void sl_flash_register(PXA2xxState *cpu, int size)
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}
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static int sl_nand_init(SysBusDevice *dev) {
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    int iomemtype;
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    SLNANDState *s;
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    DriveInfo *nand;
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			@ -178,10 +166,8 @@ static int sl_nand_init(SysBusDevice *dev) {
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    nand = drive_get(IF_MTD, 0, 0);
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    s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
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    iomemtype = cpu_register_io_memory(sl_readfn,
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                    sl_writefn, s, DEVICE_NATIVE_ENDIAN);
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    sysbus_init_mmio(dev, 0x40, iomemtype);
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    memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
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    sysbus_init_mmio_region(dev, &s->iomem);
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    return 0;
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}
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			@ -898,6 +884,7 @@ static void spitz_common_init(ram_addr_t ram_size,
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    PXA2xxState *cpu;
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    DeviceState *scp0, *scp1 = NULL;
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    MemoryRegion *address_space_mem = get_system_memory();
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    MemoryRegion *rom = g_new(MemoryRegion, 1);
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    if (!cpu_model)
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        cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
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			@ -907,8 +894,9 @@ static void spitz_common_init(ram_addr_t ram_size,
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    sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
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    cpu_register_physical_memory(0, SPITZ_ROM,
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                    qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
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    memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
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    memory_region_set_readonly(rom, true);
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    memory_region_add_subregion(address_space_mem, 0, rom);
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    /* Setup peripherals */
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    spitz_keyboard_register(cpu);
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