vga: fixes for virtio-gpu and cirrus.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJYdgfYAAoJEEy22O7T6HE4tDYQAM4Pte9qCTi8yf1f9oOPnM5L 9R86SPNwV42b162s+v1l3bZ1mebReJHcRmYWN53Mbv/M4jhuuGN678gGa0ok3cN/ Jo0J8DdpycjbqM07bF/YOa001mjxX9eRw2hJhIkxAG1Dd64DSRslqPz5PDUz9/1z dvxHovDC/jL3YfNKXqihLogWzIAlw458Z5f7EHIlKURjaNQ+fi5ZKyzNl4PTzkAm DkN3CSiXg0DR6++50ds9HrTeXyhCkByU6dEqffmN2VofPnhSnNmem3p1SQum88XY 7WYi2WHUWuncFw+4zzOvMU+8WD52Y6xe2Y5a/VBmK/hUqrHb+1V7Q3Ck+6PTIBlx pY/KZUrKr3M4rY1Ik0SiJSRx8Ub50oMJdQ2pCsWhHjNJXECCGgUWt/d1oWMyug1y 3sONKCq9BggSISvX1QN48lXKSdObd5B8aWmSxxsaR42eUok2Bv2OV4LQIUQ4vtFx mxe31H6YNt4/zgX/BOhs85+VLFLXvjrc9u1fS5PFIS+CyToepn/4G9T85AsQ3RsB 9HE0Mue00x8EhcrBh7YVjq98LGnkvPpabHV02DaJTG47koWli7ApxHz1PNCym2hM vaowH2pltoR4bb/2tEcokF6P/kV/DlxgjRAFrxDHjKKJX24vTPDNDxMhWXgC4wE1 3OdKARbysrrXqVtWW8eq =W7M/ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20170111-1' into staging vga: fixes for virtio-gpu and cirrus. # gpg: Signature made Wed 11 Jan 2017 10:24:24 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-vga-20170111-1: virtio-gpu: tag as not hotpluggable virtio-gpu: Fix memory leak in virtio_gpu_load() virtio-gpu: Recalculate VirtIOGPU::hostmem on VM load display: cirrus: ignore source pitch value as needed in blit_is_unsafe virtio-gpu: fix information leak in capset get dispatch Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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			@ -294,7 +294,7 @@ static bool blit_region_is_unsafe(struct CirrusVGAState *s,
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    return false;
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}
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static bool blit_is_unsafe(struct CirrusVGAState *s)
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static bool blit_is_unsafe(struct CirrusVGAState *s, bool dst_only)
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{
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    /* should be the case, see cirrus_bitblt_start */
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    assert(s->cirrus_blt_width > 0);
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			@ -308,6 +308,9 @@ static bool blit_is_unsafe(struct CirrusVGAState *s)
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                              s->cirrus_blt_dstaddr & s->cirrus_addr_mask)) {
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        return true;
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    }
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    if (dst_only) {
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        return false;
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    }
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    if (blit_region_is_unsafe(s, s->cirrus_blt_srcpitch,
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                              s->cirrus_blt_srcaddr & s->cirrus_addr_mask)) {
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        return true;
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			@ -673,7 +676,7 @@ static int cirrus_bitblt_common_patterncopy(CirrusVGAState * s,
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    dst = s->vga.vram_ptr + (s->cirrus_blt_dstaddr & s->cirrus_addr_mask);
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    if (blit_is_unsafe(s))
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    if (blit_is_unsafe(s, false))
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        return 0;
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    (*s->cirrus_rop) (s, dst, src,
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			@ -691,7 +694,7 @@ static int cirrus_bitblt_solidfill(CirrusVGAState *s, int blt_rop)
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{
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    cirrus_fill_t rop_func;
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    if (blit_is_unsafe(s)) {
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    if (blit_is_unsafe(s, true)) {
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        return 0;
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    }
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    rop_func = cirrus_fill[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1];
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			@ -795,7 +798,7 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h)
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static int cirrus_bitblt_videotovideo_copy(CirrusVGAState * s)
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{
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    if (blit_is_unsafe(s))
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    if (blit_is_unsafe(s, false))
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        return 0;
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    return cirrus_do_copy(s, s->cirrus_blt_dstaddr - s->vga.start_addr,
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			@ -379,7 +379,7 @@ static void virgl_cmd_get_capset(VirtIOGPU *g,
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        return;
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    }
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    resp = g_malloc(sizeof(*resp) + max_size);
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    resp = g_malloc0(sizeof(*resp) + max_size);
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    resp->hdr.type = VIRTIO_GPU_RESP_OK_CAPSET;
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    virgl_renderer_fill_caps(gc.capset_id,
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                             gc.capset_version,
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			@ -1038,6 +1038,8 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size)
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    uint32_t resource_id, pformat;
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    int i;
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    g->hostmem = 0;
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    resource_id = qemu_get_be32(f);
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    while (resource_id != 0) {
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        res = g_new0(struct virtio_gpu_simple_resource, 1);
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			@ -1050,15 +1052,19 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size)
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        /* allocate */
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        pformat = get_pixman_format(res->format);
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        if (!pformat) {
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            g_free(res);
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            return -EINVAL;
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        }
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        res->image = pixman_image_create_bits(pformat,
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                                              res->width, res->height,
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                                              NULL, 0);
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        if (!res->image) {
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            g_free(res);
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            return -EINVAL;
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        }
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        res->hostmem = PIXMAN_FORMAT_BPP(pformat) * res->width * res->height;
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        res->addrs = g_new(uint64_t, res->iov_cnt);
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        res->iov = g_new(struct iovec, res->iov_cnt);
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			@ -1076,11 +1082,22 @@ static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size)
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            res->iov[i].iov_base =
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                cpu_physical_memory_map(res->addrs[i], &len, 1);
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            if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
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                /* Clean up the half-a-mapping we just created... */
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                if (res->iov[i].iov_base) {
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                    cpu_physical_memory_unmap(res->iov[i].iov_base,
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                                              len, 0, 0);
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                }
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                /* ...and the mappings for previous loop iterations */
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                res->iov_cnt = i;
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                virtio_gpu_cleanup_mapping(res);
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                pixman_image_unref(res->image);
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                g_free(res);
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                return -EINVAL;
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            }
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        }
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        QTAILQ_INSERT_HEAD(&g->reslist, res, next);
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        g->hostmem += res->hostmem;
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        resource_id = qemu_get_be32(f);
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    }
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			@ -1282,6 +1299,7 @@ static void virtio_gpu_class_init(ObjectClass *klass, void *data)
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    dc->props = virtio_gpu_properties;
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    dc->vmsd = &vmstate_virtio_gpu;
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    dc->hotpluggable = false;
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}
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static const TypeInfo virtio_gpu_info = {
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