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xilinx_spips: Make interrupts clear on read 

By default these interrupts are clear on read.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 999ff0091ed3cc3969a431bf55c00ef934cecc8e.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Crosthwaite 2013-06-03 17:17:41 +01:00 committed by Peter Maydell
parent 6b91f0155b
commit 87920b44a1
1 changed files with 4 additions and 0 deletions
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4
hw/ssi/xilinx_spips.c
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@ -330,6 +330,10 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr,
mask = 0x0002FFFF; mask = 0x0002FFFF;
break; break;
case R_INTR_STATUS: case R_INTR_STATUS:
ret = s->regs[addr] & IXR_ALL;
s->regs[addr] = 0;
DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret);
return ret;
case R_INTR_MASK: case R_INTR_MASK:
mask = IXR_ALL; mask = IXR_ALL;
break; break;