openpic: remove dead code to make a PCI device version
bus is always NULL so the code in this if clause is dead (and therefore untested). Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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								hw/openpic.c
								
								
								
								
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			@ -1181,41 +1181,17 @@ static void openpic_irq_raise(openpic_t *opp, int n_CPU, IRQ_src_t *src)
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    qemu_irq_raise(opp->dst[n_CPU].irqs[OPENPIC_OUTPUT_INT]);
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}
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qemu_irq *openpic_init (PCIBus *bus, MemoryRegion **pmem, int nb_cpus,
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qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
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                        qemu_irq **irqs, qemu_irq irq_out)
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{
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    openpic_t *opp;
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    uint8_t *pci_conf;
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    int i, m;
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    /* XXX: for now, only one CPU is supported */
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    if (nb_cpus != 1)
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        return NULL;
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    if (bus) {
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        opp = (openpic_t *)pci_register_device(bus, "OpenPIC", sizeof(openpic_t),
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                                               -1, NULL, NULL);
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        pci_conf = opp->pci_dev.config;
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        pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
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        pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_OPENPIC2);
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        pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER); // FIXME?
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        pci_conf[0x3d] = 0x00; // no interrupt pin
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        memory_region_init_io(&opp->mem, &openpic_ops, opp, "openpic", 0x40000);
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#if 0 // Don't implement ISU for now
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        opp_io_memory = cpu_register_io_memory(openpic_src_read,
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                                               openpic_src_write, NULL
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                                               DEVICE_NATIVE_ENDIAN);
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        cpu_register_physical_memory(isu_base, 0x20 * (EXT_IRQ + 2),
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                                     opp_io_memory);
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#endif
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        /* Register I/O spaces */
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        pci_register_bar(&opp->pci_dev, 0,
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                         PCI_BASE_ADDRESS_SPACE_MEMORY, &opp->mem);
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    } else {
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    opp = g_malloc0(sizeof(openpic_t));
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    memory_region_init_io(&opp->mem, &openpic_ops, opp, "openpic", 0x40000);
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    }
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    //    isu_base &= 0xFFFC0000;
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    opp->nb_cpus = nb_cpus;
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			@ -11,7 +11,7 @@ enum {
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    OPENPIC_OUTPUT_NB,
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};
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qemu_irq *openpic_init (PCIBus *bus, MemoryRegion **pmem, int nb_cpus,
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qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
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                        qemu_irq **irqs, qemu_irq irq_out);
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qemu_irq *mpic_init (MemoryRegion *address_space, target_phys_addr_t base,
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                     int nb_cpus, qemu_irq **irqs, qemu_irq irq_out);
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			@ -311,7 +311,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
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            exit(1);
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        }
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    }
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    pic = openpic_init(NULL, &pic_mem, smp_cpus, openpic_irqs, NULL);
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    pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
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    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
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        /* 970 gets a U3 bus */
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        pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
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