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target-mips: fix CpU exception for coprocessor 0 

When we signal a CpU exception for coprocessor 0, we should indicate
that it's for coprocessor 0 instead of coprocessor 1.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit 13f160cebd0778113ba8d251aea297286b1666cb)
This commit is contained in:
Nathan Froyd 2010-02-20 10:19:09 -08:00 committed by Aurelien Jarno
parent 307331a42a
commit 9f59ddcc4f
1 changed files with 1 additions and 1 deletions
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2
target-mips/translate.c
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@ -821,7 +821,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv
static inline void check_cp0_enabled(DisasContext *ctx) static inline void check_cp0_enabled(DisasContext *ctx)
{ {
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0)))
generate_exception_err(ctx, EXCP_CpU, 1); generate_exception_err(ctx, EXCP_CpU, 0);
} }
static inline void check_cp1_enabled(DisasContext *ctx) static inline void check_cp1_enabled(DisasContext *ctx)