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spapr: use memory core for iommu support 

Now we can stop using a "translating" DMAContext, but we do not yet modify
the sPAPRTCETable users to get an AddressSpace; they keep using the table
via a DMAContext.

Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2013-04-11 12:35:33 +02:00
parent a71bfbfe9d
commit a84bb43669
2 changed files with 28 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

48
hw/ppc/spapr_iommu.c
View File

@ -37,12 +37,16 @@ enum sPAPRTCEAccess {
};
struct sPAPRTCETable {
/* temporary until everyone has its own AddressSpace */
DMAContext dma;
AddressSpace as;
uint32_t liobn;
uint32_t window_size;
sPAPRTCE *table;
bool bypass;
int fd;
MemoryRegion iommu;
QLIST_ENTRY(sPAPRTCETable) list;
};
@ -68,8 +72,9 @@ static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
return NULL;
}
static IOMMUTLBEntry spapr_tce_translate_iommu(sPAPRTCETable *tcet, hwaddr addr)
static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
{
sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
uint64_t tce;
#ifdef DEBUG_TCE
@ -111,24 +116,9 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(sPAPRTCETable *tcet, hwaddr addr)
};
}
static int spapr_tce_translate(DMAContext *dma,
dma_addr_t addr,
hwaddr *paddr,
hwaddr *len,
DMADirection dir)
{
sPAPRTCETable *tcet = DO_UPCAST(sPAPRTCETable, dma, dma);
bool is_write = (dir == DMA_DIRECTION_FROM_DEVICE);
IOMMUTLBEntry entry = spapr_tce_translate_iommu(tcet, addr);
if (!(entry.perm & (1 << is_write))) {
return -EPERM;
}
/* Translate */
*paddr = entry.translated_addr | (addr & entry.addr_mask);
*len = (addr | entry.addr_mask) - addr + 1;
return 0;
}
static MemoryRegionIOMMUOps spapr_iommu_ops = {
.translate = spapr_tce_translate_iommu,
};
sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
{
@ -145,8 +135,6 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
}
tcet = g_malloc0(sizeof(*tcet));
dma_context_init(&tcet->dma, &address_space_memory, spapr_tce_translate, NULL, NULL);
tcet->liobn = liobn;
tcet->window_size = window_size;
@ -167,6 +155,11 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
"table @ %p, fd=%d\n", tcet, liobn, tcet->table, tcet->fd);
#endif
memory_region_init_iommu(&tcet->iommu, &spapr_iommu_ops,
"iommu-spapr", UINT64_MAX);
address_space_init(&tcet->as, &tcet->iommu);
dma_context_init(&tcet->dma, &tcet->as, NULL, NULL, NULL);
QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
return tcet;
@ -190,6 +183,11 @@ DMAContext *spapr_tce_get_dma(sPAPRTCETable *tcet)
return &tcet->dma;
}
MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
{
return &tcet->iommu;
}
void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
{
tcet->bypass = bypass;
@ -208,6 +206,7 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
target_ulong tce)
{
sPAPRTCE *tcep;
IOMMUTLBEntry entry;
if (ioba >= tcet->window_size) {
hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
@ -218,6 +217,13 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
tcep = tcet->table + (ioba >> SPAPR_TCE_PAGE_SHIFT);
tcep->tce = tce;
entry.target_as = &address_space_memory,
entry.iova = ioba & ~SPAPR_TCE_PAGE_MASK;
entry.translated_addr = tce & ~SPAPR_TCE_PAGE_MASK;
entry.addr_mask = SPAPR_TCE_PAGE_MASK;
entry.perm = tce;
memory_region_notify_iommu(&tcet->iommu, entry);
return H_SUCCESS;
}

1
include/hw/ppc/spapr.h
View File

@ -349,6 +349,7 @@ void spapr_events_init(sPAPREnvironment *spapr);
void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq);
sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size);
DMAContext *spapr_tce_get_dma(sPAPRTCETable *tcet);
MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet);
void spapr_tce_free(sPAPRTCETable *tcet);
void spapr_tce_reset(sPAPRTCETable *tcet);
void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass);