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target-i386: bugfix of Intel MPX 

The correct size of cpuid 0x0d sub-leaf 4 is 0x40, not 0x10.
This is confirmed by Anvin H Peter and Mallick Asit K.

Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Asit K Mallick <asit.k.mallick@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
This commit is contained in:
Liu, Jinsong 2014-03-03 05:24:14 +00:00 committed by Paolo Bonzini
parent f9a49dfa02
commit b0f15a5d56
1 changed files with 1 additions and 1 deletions
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target-i386/cpu.c
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@ -339,7 +339,7 @@ static const ExtSaveArea ext_save_areas[] = {
[3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
.offset = 0x3c0, .size = 0x40 },
[4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
.offset = 0x400, .size = 0x10 },
.offset = 0x400, .size = 0x40 },
};
const char *get_register_name_32(unsigned int reg)