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i386: avoid null pointer dereference 

Hello,

A null pointer dereference issue was reported by Mr Ling Liu, CC'd here. It
occurs while doing I/O port write operations via hmp interface. In that,
'current_cpu' remains null as it is not called from cpu_exec loop, which
results in the said issue.

Below is a proposed (tested)patch to fix this issue; Does it look okay?

===
From ae88a4947fab9a148cd794f8ad2d812e7f5a1d0f Mon Sep 17 00:00:00 2001
From: Prasad J Pandit <pjp@fedoraproject.org>
Date: Fri, 18 Dec 2015 11:16:07 +0530
Subject: [PATCH] i386: avoid null pointer dereference

When I/O port write operation is called from hmp interface,
'current_cpu' remains null, as it is not called from cpu_exec()
loop. This leads to a null pointer dereference in vapic_write
routine. Add check to avoid it.

Reported-by: Ling Liu <liuling-it@360.cn>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
Message-Id: <alpine.LFD.2.20.1512181129320.9805@wniryva>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: P J P <ppandit@redhat.com>
(cherry picked from commit 4c1396cb57)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
This commit is contained in:
P J P 2015-12-18 11:35:07 +05:30 committed by Michael Roth
parent 24fe899c3c
commit b47809c6b3
1 changed files with 10 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
hw/i386/kvmvapic.c
View File

@ -634,13 +634,18 @@ static int vapic_prepare(VAPICROMState *s)
static void vapic_write(void *opaque, hwaddr addr, uint64_t data, static void vapic_write(void *opaque, hwaddr addr, uint64_t data,
unsigned int size) unsigned int size)
{ {
CPUState *cs = current_cpu;
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
hwaddr rom_paddr;
VAPICROMState *s = opaque; VAPICROMState *s = opaque;
X86CPU *cpu;
CPUX86State *env;
hwaddr rom_paddr;
cpu_synchronize_state(cs); if (!current_cpu) {
return;
}
cpu_synchronize_state(current_cpu);
cpu = X86_CPU(current_cpu);
env = &cpu->env;
/* /*
* The VAPIC supports two PIO-based hypercalls, both via port 0x7E. * The VAPIC supports two PIO-based hypercalls, both via port 0x7E.