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pc: Generalize ISA IRQs to GSIs 

The ISA bus IRQ range is 0..15. What isa_irq_handler and IsaIrqState are
actually dealing with are the Global System Interrupts. Refactor the
code to clarify this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Jan Kiszka 2011-10-07 09:19:35 +02:00 committed by Blue Swirl
parent 2e9947d2ea
commit b881fbe9f7
5 changed files with 42 additions and 31 deletions
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7
hw/ioapic.h
View File

@ -17,4 +17,11 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#ifndef HW_IOAPIC_H
#define HW_IOAPIC_H
#define IOAPIC_NUM_PINS 24
void ioapic_eoi_broadcast(int vector); void ioapic_eoi_broadcast(int vector);
#endif /* !HW_IOAPIC_H */

2
hw/isa.h
View File

@ -7,6 +7,8 @@
#include "memory.h" #include "memory.h"
#include "qdev.h" #include "qdev.h"
#define ISA_NUM_IRQS 16
typedef struct ISABus ISABus; typedef struct ISABus ISABus;
typedef struct ISADevice ISADevice; typedef struct ISADevice ISADevice;
typedef struct ISADeviceInfo ISADeviceInfo; typedef struct ISADeviceInfo ISADeviceInfo;

18
hw/pc.c
View File

@ -88,15 +88,15 @@ struct e820_table {
static struct e820_table e820_table; static struct e820_table e820_table;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
void isa_irq_handler(void *opaque, int n, int level) void gsi_handler(void *opaque, int n, int level)
{ {
IsaIrqState *isa = (IsaIrqState *)opaque; GSIState *s = opaque;
DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n); DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n);
if (n < 16) { if (n < ISA_NUM_IRQS) {
qemu_set_irq(isa->i8259[n], level); qemu_set_irq(s->i8259_irq[n], level);
} }
qemu_set_irq(isa->ioapic[n], level); qemu_set_irq(s->ioapic_irq[n], level);
} }
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
@ -1125,7 +1125,7 @@ static void cpu_request_exit(void *opaque, int irq, int level)
} }
} }
void pc_basic_device_init(qemu_irq *isa_irq, void pc_basic_device_init(qemu_irq *gsi,
ISADevice **rtc_state, ISADevice **rtc_state,
bool no_vmport) bool no_vmport)
{ {
@ -1144,8 +1144,8 @@ void pc_basic_device_init(qemu_irq *isa_irq,
DeviceState *hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL); DeviceState *hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
if (hpet) { if (hpet) {
for (i = 0; i < 24; i++) { for (i = 0; i < GSI_NUM_PINS; i++) {
sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]); sysbus_connect_irq(sysbus_from_qdev(hpet), i, gsi[i]);
} }
rtc_irq = qdev_get_gpio_in(hpet, 0); rtc_irq = qdev_get_gpio_in(hpet, 0);
} }

18
hw/pc.h
View File

@ -8,6 +8,7 @@
#include "fdc.h" #include "fdc.h"
#include "net.h" #include "net.h"
#include "memory.h" #include "memory.h"
#include "ioapic.h"
/* PC-style peripherals (also used by other machines). */ /* PC-style peripherals (also used by other machines). */
@ -70,15 +71,16 @@ uint32_t pic_intack_read(PicState2 *s);
void pic_info(Monitor *mon); void pic_info(Monitor *mon);
void irq_info(Monitor *mon); void irq_info(Monitor *mon);
/* ISA */ /* Global System Interrupts */
#define IOAPIC_NUM_PINS 0x18
typedef struct isa_irq_state { #define GSI_NUM_PINS IOAPIC_NUM_PINS
qemu_irq *i8259;
qemu_irq ioapic[IOAPIC_NUM_PINS];
} IsaIrqState;
void isa_irq_handler(void *opaque, int n, int level); typedef struct GSIState {
qemu_irq *i8259_irq;
qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;
void gsi_handler(void *opaque, int n, int level);
/* i8254.c */ /* i8254.c */
@ -141,7 +143,7 @@ void pc_memory_init(MemoryRegion *system_memory,
MemoryRegion **ram_memory); MemoryRegion **ram_memory);
qemu_irq *pc_allocate_cpu_irq(void); qemu_irq *pc_allocate_cpu_irq(void);
void pc_vga_init(PCIBus *pci_bus); void pc_vga_init(PCIBus *pci_bus);
void pc_basic_device_init(qemu_irq *isa_irq, void pc_basic_device_init(qemu_irq *gsi,
ISADevice **rtc_state, ISADevice **rtc_state,
bool no_vmport); bool no_vmport);
void pc_init_ne2k_isa(NICInfo *nd); void pc_init_ne2k_isa(NICInfo *nd);

28
hw/pc_piix.c
View File

@ -53,7 +53,7 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static void ioapic_init(IsaIrqState *isa_irq_state) static void ioapic_init(GSIState *gsi_state)
{ {
DeviceState *dev; DeviceState *dev;
SysBusDevice *d; SysBusDevice *d;
@ -65,7 +65,7 @@ static void ioapic_init(IsaIrqState *isa_irq_state)
sysbus_mmio_map(d, 0, 0xfec00000); sysbus_mmio_map(d, 0, 0xfec00000);
for (i = 0; i < IOAPIC_NUM_PINS; i++) { for (i = 0; i < IOAPIC_NUM_PINS; i++) {
isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i); gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
} }
} }
@ -87,11 +87,11 @@ static void pc_init1(MemoryRegion *system_memory,
PCII440FXState *i440fx_state; PCII440FXState *i440fx_state;
int piix3_devfn = -1; int piix3_devfn = -1;
qemu_irq *cpu_irq; qemu_irq *cpu_irq;
qemu_irq *isa_irq; qemu_irq *gsi;
qemu_irq *i8259; qemu_irq *i8259;
qemu_irq *cmos_s3; qemu_irq *cmos_s3;
qemu_irq *smi_irq; qemu_irq *smi_irq;
IsaIrqState *isa_irq_state; GSIState *gsi_state;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BusState *idebus[MAX_IDE_BUS]; BusState *idebus[MAX_IDE_BUS];
ISADevice *rtc_state; ISADevice *rtc_state;
@ -130,11 +130,11 @@ static void pc_init1(MemoryRegion *system_memory,
pci_enabled ? rom_memory : system_memory, &ram_memory); pci_enabled ? rom_memory : system_memory, &ram_memory);
} }
isa_irq_state = g_malloc0(sizeof(*isa_irq_state)); gsi_state = g_malloc0(sizeof(*gsi_state));
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24); gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
if (pci_enabled) { if (pci_enabled) {
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, gsi,
system_memory, system_io, ram_size, system_memory, system_io, ram_size,
below_4g_mem_size, below_4g_mem_size,
0x100000000ULL - below_4g_mem_size, 0x100000000ULL - below_4g_mem_size,
@ -149,7 +149,7 @@ static void pc_init1(MemoryRegion *system_memory,
isa_bus_new(NULL, system_io); isa_bus_new(NULL, system_io);
no_hpet = 1; no_hpet = 1;
} }
isa_bus_irqs(isa_irq); isa_bus_irqs(gsi);
if (!xen_enabled()) { if (!xen_enabled()) {
cpu_irq = pc_allocate_cpu_irq(); cpu_irq = pc_allocate_cpu_irq();
@ -158,12 +158,12 @@ static void pc_init1(MemoryRegion *system_memory,
i8259 = xen_interrupt_controller_init(); i8259 = xen_interrupt_controller_init();
} }
isa_irq_state->i8259 = i8259; gsi_state->i8259_irq = i8259;
if (pci_enabled) { if (pci_enabled) {
ioapic_init(isa_irq_state); ioapic_init(gsi_state);
} }
pc_register_ferr_irq(isa_get_irq(13)); pc_register_ferr_irq(gsi[13]);
pc_vga_init(pci_enabled? pci_bus: NULL); pc_vga_init(pci_enabled? pci_bus: NULL);
@ -172,7 +172,7 @@ static void pc_init1(MemoryRegion *system_memory,
} }
/* init basic PC hardware */ /* init basic PC hardware */
pc_basic_device_init(isa_irq, &rtc_state, xen_enabled()); pc_basic_device_init(gsi, &rtc_state, xen_enabled());
for(i = 0; i < nb_nics; i++) { for(i = 0; i < nb_nics; i++) {
NICInfo *nd = &nd_table[i]; NICInfo *nd = &nd_table[i];
@ -202,7 +202,7 @@ static void pc_init1(MemoryRegion *system_memory,
} }
} }
audio_init(isa_irq, pci_enabled ? pci_bus : NULL); audio_init(gsi, pci_enabled ? pci_bus : NULL);
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
idebus[0], idebus[1], rtc_state); idebus[0], idebus[1], rtc_state);
@ -222,7 +222,7 @@ static void pc_init1(MemoryRegion *system_memory,
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
/* TODO: Populate SPD eeprom data. */ /* TODO: Populate SPD eeprom data. */
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
isa_get_irq(9), *cmos_s3, *smi_irq, gsi[9], *cmos_s3, *smi_irq,
kvm_enabled()); kvm_enabled());
smbus_eeprom_init(smbus, 8, NULL, 0); smbus_eeprom_init(smbus, 8, NULL, 0);
} }