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macio: call dma_memory_unmap() at the end of each DMA transfer 

This ensures that the underlying memory is marked dirty once the transfer
is complete and resolves cache coherency problems under MacOS 9.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland 2016-06-10 19:26:37 +01:00 committed by David Gibson
parent 42bff4772e
commit bc9ca5958d
2 changed files with 31 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
hw/ide/macio.c
View File

@ -66,8 +66,7 @@ static void pmac_dma_read(BlockBackend *blk,
DBDMA_io *io = opaque; DBDMA_io *io = opaque;
MACIOIDEState *m = io->opaque; MACIOIDEState *m = io->opaque;
IDEState *s = idebus_active_if(&m->bus); IDEState *s = idebus_active_if(&m->bus);
dma_addr_t dma_addr, dma_len; dma_addr_t dma_addr;
void *mem;
int64_t sector_num; int64_t sector_num;
int nsector; int nsector;
uint64_t align = BDRV_SECTOR_SIZE; uint64_t align = BDRV_SECTOR_SIZE;
@ -84,9 +83,10 @@ static void pmac_dma_read(BlockBackend *blk,
sector_num, nsector); sector_num, nsector);
dma_addr = io->addr; dma_addr = io->addr;
dma_len = io->len; io->dir = DMA_DIRECTION_FROM_DEVICE;
mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len, io->dma_len = io->len;
DMA_DIRECTION_FROM_DEVICE); io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
io->dir);
if (offset & (align - 1)) { if (offset & (align - 1)) {
head_bytes = offset & (align - 1); head_bytes = offset & (align - 1);
@ -100,7 +100,7 @@ static void pmac_dma_read(BlockBackend *blk,
offset = offset & ~(align - 1); offset = offset & ~(align - 1);
} }
qemu_iovec_add(&io->iov, mem, io->len); qemu_iovec_add(&io->iov, io->dma_mem, io->len);
if ((offset + bytes) & (align - 1)) { if ((offset + bytes) & (align - 1)) {
tail_bytes = (offset + bytes) & (align - 1); tail_bytes = (offset + bytes) & (align - 1);
@ -130,8 +130,7 @@ static void pmac_dma_write(BlockBackend *blk,
DBDMA_io *io = opaque; DBDMA_io *io = opaque;
MACIOIDEState *m = io->opaque; MACIOIDEState *m = io->opaque;
IDEState *s = idebus_active_if(&m->bus); IDEState *s = idebus_active_if(&m->bus);
dma_addr_t dma_addr, dma_len; dma_addr_t dma_addr;
void *mem;
int64_t sector_num; int64_t sector_num;
int nsector; int nsector;
uint64_t align = BDRV_SECTOR_SIZE; uint64_t align = BDRV_SECTOR_SIZE;
@ -149,9 +148,10 @@ static void pmac_dma_write(BlockBackend *blk,
sector_num, nsector); sector_num, nsector);
dma_addr = io->addr; dma_addr = io->addr;
dma_len = io->len; io->dir = DMA_DIRECTION_TO_DEVICE;
mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len, io->dma_len = io->len;
DMA_DIRECTION_TO_DEVICE); io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
io->dir);
if (offset & (align - 1)) { if (offset & (align - 1)) {
head_bytes = offset & (align - 1); head_bytes = offset & (align - 1);
@ -163,7 +163,7 @@ static void pmac_dma_write(BlockBackend *blk,
blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align); blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align);
qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes); qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes);
qemu_iovec_add(&io->iov, mem, io->len); qemu_iovec_add(&io->iov, io->dma_mem, io->len);
bytes += offset & (align - 1); bytes += offset & (align - 1);
offset = offset & ~(align - 1); offset = offset & ~(align - 1);
@ -181,7 +181,7 @@ static void pmac_dma_write(BlockBackend *blk,
blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align); blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align);
if (!unaligned_head) { if (!unaligned_head) {
qemu_iovec_add(&io->iov, mem, io->len); qemu_iovec_add(&io->iov, io->dma_mem, io->len);
} }
qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes, qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes,
@ -193,7 +193,7 @@ static void pmac_dma_write(BlockBackend *blk,
} }
if (!unaligned_head && !unaligned_tail) { if (!unaligned_head && !unaligned_tail) {
qemu_iovec_add(&io->iov, mem, io->len); qemu_iovec_add(&io->iov, io->dma_mem, io->len);
} }
s->io_buffer_size -= io->len; s->io_buffer_size -= io->len;
@ -214,18 +214,18 @@ static void pmac_dma_trim(BlockBackend *blk,
DBDMA_io *io = opaque; DBDMA_io *io = opaque;
MACIOIDEState *m = io->opaque; MACIOIDEState *m = io->opaque;
IDEState *s = idebus_active_if(&m->bus); IDEState *s = idebus_active_if(&m->bus);
dma_addr_t dma_addr, dma_len; dma_addr_t dma_addr;
void *mem;
qemu_iovec_destroy(&io->iov); qemu_iovec_destroy(&io->iov);
qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1); qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);
dma_addr = io->addr; dma_addr = io->addr;
dma_len = io->len; io->dir = DMA_DIRECTION_TO_DEVICE;
mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len, io->dma_len = io->len;
DMA_DIRECTION_TO_DEVICE); io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
io->dir);
qemu_iovec_add(&io->iov, mem, io->len); qemu_iovec_add(&io->iov, io->dma_mem, io->len);
s->io_buffer_size -= io->len; s->io_buffer_size -= io->len;
s->io_buffer_index += io->len; s->io_buffer_index += io->len;
io->len = 0; io->len = 0;
@ -285,6 +285,9 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
return; return;
done: done:
dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len,
io->dir, io->dma_len);
if (ret < 0) { if (ret < 0) {
block_acct_failed(blk_get_stats(s->blk), &s->acct); block_acct_failed(blk_get_stats(s->blk), &s->acct);
} else { } else {
@ -351,6 +354,9 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
return; return;
done: done:
dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len,
io->dir, io->dma_len);
if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) { if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
if (ret < 0) { if (ret < 0) {
block_acct_failed(blk_get_stats(s->blk), &s->acct); block_acct_failed(blk_get_stats(s->blk), &s->acct);

5
include/hw/ppc/mac_dbdma.h
View File

@ -24,6 +24,7 @@
#include "exec/memory.h" #include "exec/memory.h"
#include "qemu/iov.h" #include "qemu/iov.h"
#include "sysemu/dma.h"
typedef struct DBDMA_io DBDMA_io; typedef struct DBDMA_io DBDMA_io;
@ -44,6 +45,10 @@ struct DBDMA_io {
uint8_t head_remainder[0x200]; uint8_t head_remainder[0x200];
uint8_t tail_remainder[0x200]; uint8_t tail_remainder[0x200];
QEMUIOVector iov; QEMUIOVector iov;
/* DMA request */
void *dma_mem;
dma_addr_t dma_len;
DMADirection dir;
}; };
/* /*