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hw/timer: QOM'ify m48txx_sysbus 

* split the old SysBus init function into an instance_init
  and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
* assign DeviceClass::vmsd instead of using vmstate_register function

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
xiaoqiang zhao 2017-05-25 21:34:48 +08:00 committed by Mark Cave-Ayland
parent 46eedc0e69
commit c04e34a982
1 changed files with 19 additions and 19 deletions
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38
hw/timer/m48t59.c
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@ -640,34 +640,33 @@ void m48t59_realize_common(M48t59State *s, Error **errp)
s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s); s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s);
} }
qemu_get_timedate(&s->alarm, 0); qemu_get_timedate(&s->alarm, 0);
vmstate_register(NULL, -1, &vmstate_m48t59, s);
} }
static int m48t59_init1(SysBusDevice *dev) static void m48t59_init1(Object *obj)
{ {
M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(dev); M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(obj);
M48txxSysBusState *d = M48TXX_SYS_BUS(dev); M48txxSysBusState *d = M48TXX_SYS_BUS(obj);
Object *o = OBJECT(dev); SysBusDevice *dev = SYS_BUS_DEVICE(obj);
M48t59State *s = &d->state; M48t59State *s = &d->state;
Error *err = NULL;
s->model = u->info.model; s->model = u->info.model;
s->size = u->info.size; s->size = u->info.size;
sysbus_init_irq(dev, &s->IRQ); sysbus_init_irq(dev, &s->IRQ);
memory_region_init_io(&s->iomem, o, &nvram_ops, s, "m48t59.nvram", memory_region_init_io(&s->iomem, obj, &nvram_ops, s, "m48t59.nvram",
s->size); s->size);
memory_region_init_io(&d->io, o, &m48t59_io_ops, s, "m48t59", 4); memory_region_init_io(&d->io, obj, &m48t59_io_ops, s, "m48t59", 4);
sysbus_init_mmio(dev, &s->iomem); }
sysbus_init_mmio(dev, &d->io);
m48t59_realize_common(s, &err);
if (err != NULL) {
error_free(err);
return -1;
}
return 0; static void m48t59_realize(DeviceState *dev, Error **errp)
{
M48txxSysBusState *d = M48TXX_SYS_BUS(dev);
M48t59State *s = &d->state;
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
sysbus_init_mmio(sbd, &s->iomem);
sysbus_init_mmio(sbd, &d->io);
m48t59_realize_common(s, errp);
} }
static uint32_t m48txx_sysbus_read(Nvram *obj, uint32_t addr) static uint32_t m48txx_sysbus_read(Nvram *obj, uint32_t addr)
@ -696,12 +695,12 @@ static Property m48t59_sysbus_properties[] = {
static void m48txx_sysbus_class_init(ObjectClass *klass, void *data) static void m48txx_sysbus_class_init(ObjectClass *klass, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
NvramClass *nc = NVRAM_CLASS(klass); NvramClass *nc = NVRAM_CLASS(klass);
k->init = m48t59_init1; dc->realize = m48t59_realize;
dc->reset = m48t59_reset_sysbus; dc->reset = m48t59_reset_sysbus;
dc->props = m48t59_sysbus_properties; dc->props = m48t59_sysbus_properties;
dc->vmsd = &vmstate_m48t59;
nc->read = m48txx_sysbus_read; nc->read = m48txx_sysbus_read;
nc->write = m48txx_sysbus_write; nc->write = m48txx_sysbus_write;
nc->toggle_lock = m48txx_sysbus_toggle_lock; nc->toggle_lock = m48txx_sysbus_toggle_lock;
@ -725,6 +724,7 @@ static const TypeInfo m48txx_sysbus_type_info = {
.name = TYPE_M48TXX_SYS_BUS, .name = TYPE_M48TXX_SYS_BUS,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(M48txxSysBusState), .instance_size = sizeof(M48txxSysBusState),
.instance_init = m48t59_init1,
.abstract = true, .abstract = true,
.class_init = m48txx_sysbus_class_init, .class_init = m48txx_sysbus_class_init,
.interfaces = (InterfaceInfo[]) { .interfaces = (InterfaceInfo[]) {