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kvm: Change cpu_synchronize_state() argument to CPUState 

Change Monitor::mon_cpu to CPUState as well.

Reviewed-by: liguang <lig.fnst@cn.fujitsu.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-05-01 14:24:52 +02:00
parent dd1750d798
commit cb446ecab7
13 changed files with 28 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
cpus.c
View File

@ -407,10 +407,10 @@ void hw_error(const char *fmt, ...)
void cpu_synchronize_all_states(void) void cpu_synchronize_all_states(void)
{ {
CPUArchState *cpu; CPUArchState *env;
for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { for (env = first_cpu; env; env = env->next_cpu) {
cpu_synchronize_state(cpu); cpu_synchronize_state(ENV_GET_CPU(env));
} }
} }
@ -1219,7 +1219,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
CPUState *cpu = ENV_GET_CPU(env); CPUState *cpu = ENV_GET_CPU(env);
CpuInfoList *info; CpuInfoList *info;
cpu_synchronize_state(env); cpu_synchronize_state(cpu);
info = g_malloc0(sizeof(*info)); info = g_malloc0(sizeof(*info));
info->value = g_malloc0(sizeof(*info->value)); info->value = g_malloc0(sizeof(*info->value));

8
gdbstub.c
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@ -2033,7 +2033,7 @@ static void gdb_breakpoint_remove_all(void)
static void gdb_set_cpu_pc(GDBState *s, target_ulong pc) static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
{ {
cpu_synchronize_state(s->c_cpu); cpu_synchronize_state(ENV_GET_CPU(s->c_cpu));
#if defined(TARGET_I386) #if defined(TARGET_I386)
s->c_cpu->eip = pc; s->c_cpu->eip = pc;
#elif defined (TARGET_PPC) #elif defined (TARGET_PPC)
@ -2228,7 +2228,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
} }
break; break;
case 'g': case 'g':
cpu_synchronize_state(s->g_cpu); cpu_synchronize_state(ENV_GET_CPU(s->g_cpu));
env = s->g_cpu; env = s->g_cpu;
len = 0; len = 0;
for (addr = 0; addr < num_g_regs; addr++) { for (addr = 0; addr < num_g_regs; addr++) {
@ -2239,7 +2239,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
put_packet(s, buf); put_packet(s, buf);
break; break;
case 'G': case 'G':
cpu_synchronize_state(s->g_cpu); cpu_synchronize_state(ENV_GET_CPU(s->g_cpu));
env = s->g_cpu; env = s->g_cpu;
registers = mem_buf; registers = mem_buf;
len = strlen(p) / 2; len = strlen(p) / 2;
@ -2407,7 +2407,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
env = find_cpu(thread); env = find_cpu(thread);
if (env != NULL) { if (env != NULL) {
CPUState *cpu = ENV_GET_CPU(env); CPUState *cpu = ENV_GET_CPU(env);
cpu_synchronize_state(env); cpu_synchronize_state(cpu);
len = snprintf((char *)mem_buf, sizeof(mem_buf), len = snprintf((char *)mem_buf, sizeof(mem_buf),
"CPU#%d [%s]", cpu->cpu_index, "CPU#%d [%s]", cpu->cpu_index,
cpu->halted ? "halted " : "running"); cpu->halted ? "halted " : "running");

2
hw/i386/kvm/apic.c
View File

@ -129,7 +129,7 @@ static void do_inject_external_nmi(void *data)
uint32_t lvt; uint32_t lvt;
int ret; int ret;
cpu_synchronize_state(&s->cpu->env); cpu_synchronize_state(cpu);
lvt = s->lvt[APIC_LVT_LINT1]; lvt = s->lvt[APIC_LVT_LINT1];
if (!(lvt & APIC_LVT_MASKED) && ((lvt >> 8) & 7) == APIC_DM_NMI) { if (!(lvt & APIC_LVT_MASKED) && ((lvt >> 8) & 7) == APIC_DM_NMI) {

4
hw/i386/kvmvapic.c
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@ -456,7 +456,7 @@ void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip,
X86CPU *cpu = X86_CPU(cs); X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env; CPUX86State *env = &cpu->env;
cpu_synchronize_state(env); cpu_synchronize_state(cs);
if (evaluate_tpr_instruction(s, env, &ip, access) < 0) { if (evaluate_tpr_instruction(s, env, &ip, access) < 0) {
if (s->state == VAPIC_ACTIVE) { if (s->state == VAPIC_ACTIVE) {
@ -627,7 +627,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data,
hwaddr rom_paddr; hwaddr rom_paddr;
VAPICROMState *s = opaque; VAPICROMState *s = opaque;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(x86_env_get_cpu(env)));
/* /*
* The VAPIC supports two PIO-based hypercalls, both via port 0x7E. * The VAPIC supports two PIO-based hypercalls, both via port 0x7E.

2
hw/misc/vmport.c
View File

@ -66,7 +66,7 @@ static uint64_t vmport_ioport_read(void *opaque, hwaddr addr,
unsigned char command; unsigned char command;
uint32_t eax; uint32_t eax;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(x86_env_get_cpu(env)));
eax = env->regs[R_EAX]; eax = env->regs[R_EAX];
if (eax != VMPORT_MAGIC) if (eax != VMPORT_MAGIC)

2
hw/ppc/ppce500_spin.c
View File

@ -98,7 +98,7 @@ static void spin_kick(void *data)
hwaddr map_size = 64 * 1024 * 1024; hwaddr map_size = 64 * 1024 * 1024;
hwaddr map_start; hwaddr map_start;
cpu_synchronize_state(env); cpu_synchronize_state(cpu);
stl_p(&curspin->pir, env->spr[SPR_PIR]); stl_p(&curspin->pir, env->spr[SPR_PIR]);
env->nip = ldq_p(&curspin->addr) & (map_size - 1); env->nip = ldq_p(&curspin->addr) & (map_size - 1);
env->gpr[3] = ldq_p(&curspin->r3); env->gpr[3] = ldq_p(&curspin->r3);

4
include/sysemu/kvm.h
View File

@ -263,10 +263,10 @@ void kvm_cpu_synchronize_state(CPUState *cpu);
/* generic hooks - to be moved/refactored once there are more users */ /* generic hooks - to be moved/refactored once there are more users */
static inline void cpu_synchronize_state(CPUArchState *env) static inline void cpu_synchronize_state(CPUState *cpu)
{ {
if (kvm_enabled()) { if (kvm_enabled()) {
kvm_cpu_synchronize_state(ENV_GET_CPU(env)); kvm_cpu_synchronize_state(cpu);
} }
} }

6
monitor.c
View File

@ -191,7 +191,7 @@ struct Monitor {
QString *outbuf; QString *outbuf;
ReadLineState *rs; ReadLineState *rs;
MonitorControl *mc; MonitorControl *mc;
CPUArchState *mon_cpu; CPUState *mon_cpu;
BlockDriverCompletionFunc *password_completion_cb; BlockDriverCompletionFunc *password_completion_cb;
void *password_opaque; void *password_opaque;
QError *error; QError *error;
@ -900,7 +900,7 @@ int monitor_set_cpu(int cpu_index)
if (cpu == NULL) { if (cpu == NULL) {
return -1; return -1;
} }
cur_mon->mon_cpu = cpu->env_ptr; cur_mon->mon_cpu = cpu;
return 0; return 0;
} }
@ -910,7 +910,7 @@ static CPUArchState *mon_get_cpu(void)
monitor_set_cpu(0); monitor_set_cpu(0);
} }
cpu_synchronize_state(cur_mon->mon_cpu); cpu_synchronize_state(cur_mon->mon_cpu);
return cur_mon->mon_cpu; return cur_mon->mon_cpu->env_ptr;
} }
int monitor_get_cpu_index(void) int monitor_get_cpu_index(void)

4
target-i386/helper.c
View File

@ -187,7 +187,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf,
char cc_op_name[32]; char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
cpu_synchronize_state(env); cpu_synchronize_state(cs);
eflags = cpu_compute_eflags(env); eflags = cpu_compute_eflags(env);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
@ -1116,7 +1116,7 @@ static void do_inject_x86_mce(void *data)
CPUState *cpu = CPU(params->cpu); CPUState *cpu = CPU(params->cpu);
uint64_t *banks = cenv->mce_banks + 4 * params->bank; uint64_t *banks = cenv->mce_banks + 4 * params->bank;
cpu_synchronize_state(cenv); cpu_synchronize_state(cpu);
/* /*
* If there is an MCE exception being processed, ignore this SRAO MCE * If there is an MCE exception being processed, ignore this SRAO MCE

2
target-i386/kvm.c
View File

@ -2079,7 +2079,7 @@ static int kvm_handle_debug(X86CPU *cpu,
ret = EXCP_DEBUG; ret = EXCP_DEBUG;
} }
if (ret == 0) { if (ret == 0) {
cpu_synchronize_state(env); cpu_synchronize_state(CPU(cpu));
assert(env->exception_injected == -1); assert(env->exception_injected == -1);
/* pass to guest */ /* pass to guest */

2
target-ppc/mmu-hash64.c
View File

@ -78,7 +78,7 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
int i; int i;
uint64_t slbe, slbv; uint64_t slbe, slbv;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(ppc_env_get_cpu(env)));
cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n"); cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n");
for (i = 0; i < env->slb_nr; i++) { for (i = 0; i < env->slb_nr; i++) {

2
target-ppc/translate.c
View File

@ -9534,7 +9534,7 @@ void cpu_dump_state (CPUPPCState *env, FILE *f, fprintf_function cpu_fprintf,
int i; int i;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(ppc_env_get_cpu(env)));
cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
TARGET_FMT_lx " XER " TARGET_FMT_lx "\n", TARGET_FMT_lx " XER " TARGET_FMT_lx "\n",

9
target-s390x/kvm.c
View File

@ -450,7 +450,7 @@ static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run,
uint64_t code; uint64_t code;
int r = 0; int r = 0;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(cpu));
sccb = env->regs[ipbh0 & 0xf]; sccb = env->regs[ipbh0 & 0xf];
code = env->regs[(ipbh0 & 0xf0) >> 4]; code = env->regs[(ipbh0 & 0xf0) >> 4];
@ -656,16 +656,17 @@ static int s390_store_status(CPUS390XState *env, uint32_t parameter)
static int s390_cpu_initial_reset(S390CPU *cpu) static int s390_cpu_initial_reset(S390CPU *cpu)
{ {
CPUState *cs = CPU(cpu);
CPUS390XState *env = &cpu->env; CPUS390XState *env = &cpu->env;
int i; int i;
s390_del_running_cpu(cpu); s390_del_running_cpu(cpu);
if (kvm_vcpu_ioctl(CPU(cpu), KVM_S390_INITIAL_RESET, NULL) < 0) { if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL) < 0) {
perror("cannot init reset vcpu"); perror("cannot init reset vcpu");
} }
/* Manually zero out all registers */ /* Manually zero out all registers */
cpu_synchronize_state(env); cpu_synchronize_state(cs);
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
env->regs[i] = 0; env->regs[i] = 0;
} }
@ -685,7 +686,7 @@ static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1)
S390CPU *target_cpu; S390CPU *target_cpu;
CPUS390XState *target_env; CPUS390XState *target_env;
cpu_synchronize_state(env); cpu_synchronize_state(CPU(cpu));
/* get order code */ /* get order code */
order_code = run->s390_sieic.ipb >> 28; order_code = run->s390_sieic.ipb >> 28;