tpm-tis: remove RAISE_STS_IRQ
This look like temporary hacking code. It shouldn't be necessary in release code, or there should be a runtime option for it. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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@ -43,9 +43,6 @@
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} \
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} \
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} while (0);
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} while (0);
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/* whether the STS interrupt is supported */
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#define RAISE_STS_IRQ
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/* tis registers */
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/* tis registers */
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#define TPM_TIS_REG_ACCESS 0x00
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#define TPM_TIS_REG_ACCESS 0x00
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#define TPM_TIS_REG_INT_ENABLE 0x08
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#define TPM_TIS_REG_INT_ENABLE 0x08
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@ -98,21 +95,11 @@
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#define TPM_TIS_INT_POLARITY_MASK (3 << 3)
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#define TPM_TIS_INT_POLARITY_MASK (3 << 3)
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#define TPM_TIS_INT_POLARITY_LOW_LEVEL (1 << 3)
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#define TPM_TIS_INT_POLARITY_LOW_LEVEL (1 << 3)
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#ifndef RAISE_STS_IRQ
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#define TPM_TIS_INTERRUPTS_SUPPORTED (TPM_TIS_INT_LOCALITY_CHANGED | \
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TPM_TIS_INT_DATA_AVAILABLE | \
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TPM_TIS_INT_COMMAND_READY)
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#else
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#define TPM_TIS_INTERRUPTS_SUPPORTED (TPM_TIS_INT_LOCALITY_CHANGED | \
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#define TPM_TIS_INTERRUPTS_SUPPORTED (TPM_TIS_INT_LOCALITY_CHANGED | \
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TPM_TIS_INT_DATA_AVAILABLE | \
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TPM_TIS_INT_DATA_AVAILABLE | \
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TPM_TIS_INT_STS_VALID | \
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TPM_TIS_INT_STS_VALID | \
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TPM_TIS_INT_COMMAND_READY)
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TPM_TIS_INT_COMMAND_READY)
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#endif
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#define TPM_TIS_CAP_INTERFACE_VERSION1_3 (2 << 28)
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#define TPM_TIS_CAP_INTERFACE_VERSION1_3 (2 << 28)
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#define TPM_TIS_CAP_INTERFACE_VERSION1_3_FOR_TPM2_0 (3 << 28)
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#define TPM_TIS_CAP_INTERFACE_VERSION1_3_FOR_TPM2_0 (3 << 28)
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#define TPM_TIS_CAP_DATA_TRANSFER_64B (3 << 9)
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#define TPM_TIS_CAP_DATA_TRANSFER_64B (3 << 9)
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@ -377,12 +364,8 @@ static void tpm_tis_receive_bh(void *opaque)
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tpm_tis_abort(s, locty);
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tpm_tis_abort(s, locty);
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}
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}
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#ifndef RAISE_STS_IRQ
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tpm_tis_raise_irq(s, locty, TPM_TIS_INT_DATA_AVAILABLE);
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#else
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tpm_tis_raise_irq(s, locty,
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tpm_tis_raise_irq(s, locty,
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TPM_TIS_INT_DATA_AVAILABLE | TPM_TIS_INT_STS_VALID);
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TPM_TIS_INT_DATA_AVAILABLE | TPM_TIS_INT_STS_VALID);
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#endif
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}
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}
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/*
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/*
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@ -421,9 +404,7 @@ static uint32_t tpm_tis_data_read(TPMState *s, uint8_t locty)
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if (tis->loc[locty].r_offset >= len) {
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if (tis->loc[locty].r_offset >= len) {
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/* got last byte */
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/* got last byte */
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tpm_tis_sts_set(&tis->loc[locty], TPM_TIS_STS_VALID);
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tpm_tis_sts_set(&tis->loc[locty], TPM_TIS_STS_VALID);
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#ifdef RAISE_STS_IRQ
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tpm_tis_raise_irq(s, locty, TPM_TIS_INT_STS_VALID);
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tpm_tis_raise_irq(s, locty, TPM_TIS_INT_STS_VALID);
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#endif
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}
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}
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DPRINTF("tpm_tis: tpm_tis_data_read byte 0x%02x [%d]\n",
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DPRINTF("tpm_tis: tpm_tis_data_read byte 0x%02x [%d]\n",
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ret, tis->loc[locty].r_offset-1);
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ret, tis->loc[locty].r_offset-1);
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@ -912,9 +893,8 @@ static void tpm_tis_mmio_write(void *opaque, hwaddr addr,
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if (tis->loc[locty].w_offset > 5 &&
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if (tis->loc[locty].w_offset > 5 &&
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(tis->loc[locty].sts & TPM_TIS_STS_EXPECT)) {
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(tis->loc[locty].sts & TPM_TIS_STS_EXPECT)) {
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/* we have a packet length - see if we have all of it */
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/* we have a packet length - see if we have all of it */
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#ifdef RAISE_STS_IRQ
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bool need_irq = !(tis->loc[locty].sts & TPM_TIS_STS_VALID);
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bool need_irq = !(tis->loc[locty].sts & TPM_TIS_STS_VALID);
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#endif
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len = tpm_tis_get_size_from_buffer(&tis->loc[locty].w_buffer);
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len = tpm_tis_get_size_from_buffer(&tis->loc[locty].w_buffer);
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if (len > tis->loc[locty].w_offset) {
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if (len > tis->loc[locty].w_offset) {
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tpm_tis_sts_set(&tis->loc[locty],
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tpm_tis_sts_set(&tis->loc[locty],
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@ -923,11 +903,9 @@ static void tpm_tis_mmio_write(void *opaque, hwaddr addr,
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/* packet complete */
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/* packet complete */
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tpm_tis_sts_set(&tis->loc[locty], TPM_TIS_STS_VALID);
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tpm_tis_sts_set(&tis->loc[locty], TPM_TIS_STS_VALID);
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}
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}
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#ifdef RAISE_STS_IRQ
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if (need_irq) {
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if (need_irq) {
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tpm_tis_raise_irq(s, locty, TPM_TIS_INT_STS_VALID);
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tpm_tis_raise_irq(s, locty, TPM_TIS_INT_STS_VALID);
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}
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}
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#endif
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}
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}
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}
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}
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break;
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break;
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