falso
/
qemu-irix
mirror of https://github.com/n64decomp/qemu-irix.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

hw/sparc: QOM'ify sun4m.c 

Drop the old SysBusDeviceClass::init and use instance_init
or DeviceClass::realize instead

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
xiaoqiang zhao 2017-05-25 21:34:50 +08:00 committed by Mark Cave-Ayland
parent 4410b94cce
commit dc8b6dd984
1 changed files with 19 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
hw/sparc/sun4m.c
View File

@ -585,30 +585,23 @@ typedef struct IDRegState {
MemoryRegion mem; MemoryRegion mem;
} IDRegState; } IDRegState;
static int idreg_init1(SysBusDevice *dev) static void idreg_init1(Object *obj)
{ {
IDRegState *s = MACIO_ID_REGISTER(dev); IDRegState *s = MACIO_ID_REGISTER(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
memory_region_init_ram(&s->mem, OBJECT(s), memory_region_init_ram(&s->mem, obj,
"sun4m.idreg", sizeof(idreg_data), &error_fatal); "sun4m.idreg", sizeof(idreg_data), &error_fatal);
vmstate_register_ram_global(&s->mem); vmstate_register_ram_global(&s->mem);
memory_region_set_readonly(&s->mem, true); memory_region_set_readonly(&s->mem, true);
sysbus_init_mmio(dev, &s->mem); sysbus_init_mmio(dev, &s->mem);
return 0;
}
static void idreg_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = idreg_init1;
} }
static const TypeInfo idreg_info = { static const TypeInfo idreg_info = {
.name = TYPE_MACIO_ID_REGISTER, .name = TYPE_MACIO_ID_REGISTER,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IDRegState), .instance_size = sizeof(IDRegState),
.class_init = idreg_class_init, .instance_init = idreg_init1,
}; };
#define TYPE_TCX_AFX "tcx_afx" #define TYPE_TCX_AFX "tcx_afx"
@ -633,28 +626,21 @@ static void afx_init(hwaddr addr)
sysbus_mmio_map(s, 0, addr); sysbus_mmio_map(s, 0, addr);
} }
static int afx_init1(SysBusDevice *dev) static void afx_init1(Object *obj)
{ {
AFXState *s = TCX_AFX(dev); AFXState *s = TCX_AFX(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
memory_region_init_ram(&s->mem, OBJECT(s), "sun4m.afx", 4, &error_fatal); memory_region_init_ram(&s->mem, obj, "sun4m.afx", 4, &error_fatal);
vmstate_register_ram_global(&s->mem); vmstate_register_ram_global(&s->mem);
sysbus_init_mmio(dev, &s->mem); sysbus_init_mmio(dev, &s->mem);
return 0;
}
static void afx_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = afx_init1;
} }
static const TypeInfo afx_info = { static const TypeInfo afx_info = {
.name = TYPE_TCX_AFX, .name = TYPE_TCX_AFX,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(AFXState), .instance_size = sizeof(AFXState),
.class_init = afx_class_init, .instance_init = afx_init1,
}; };
#define TYPE_OPENPROM "openprom" #define TYPE_OPENPROM "openprom"
@ -707,16 +693,16 @@ static void prom_init(hwaddr addr, const char *bios_name)
} }
} }
static int prom_init1(SysBusDevice *dev) static void prom_init1(Object *obj)
{ {
PROMState *s = OPENPROM(dev); PROMState *s = OPENPROM(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
memory_region_init_ram(&s->prom, OBJECT(s), "sun4m.prom", PROM_SIZE_MAX, memory_region_init_ram(&s->prom, obj, "sun4m.prom", PROM_SIZE_MAX,
&error_fatal); &error_fatal);
vmstate_register_ram_global(&s->prom); vmstate_register_ram_global(&s->prom);
memory_region_set_readonly(&s->prom, true); memory_region_set_readonly(&s->prom, true);
sysbus_init_mmio(dev, &s->prom); sysbus_init_mmio(dev, &s->prom);
return 0;
} }
static Property prom_properties[] = { static Property prom_properties[] = {
@ -726,9 +712,7 @@ static Property prom_properties[] = {
static void prom_class_init(ObjectClass *klass, void *data) static void prom_class_init(ObjectClass *klass, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = prom_init1;
dc->props = prom_properties; dc->props = prom_properties;
} }
@ -737,6 +721,7 @@ static const TypeInfo prom_info = {
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PROMState), .instance_size = sizeof(PROMState),
.class_init = prom_class_init, .class_init = prom_class_init,
.instance_init = prom_init1,
}; };
#define TYPE_SUN4M_MEMORY "memory" #define TYPE_SUN4M_MEMORY "memory"
@ -750,14 +735,14 @@ typedef struct RamDevice {
} RamDevice; } RamDevice;
/* System RAM */ /* System RAM */
static int ram_init1(SysBusDevice *dev) static void ram_realize(DeviceState *dev, Error **errp)
{ {
RamDevice *d = SUN4M_RAM(dev); RamDevice *d = SUN4M_RAM(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
memory_region_allocate_system_memory(&d->ram, OBJECT(d), "sun4m.ram", memory_region_allocate_system_memory(&d->ram, OBJECT(d), "sun4m.ram",
d->size); d->size);
sysbus_init_mmio(dev, &d->ram); sysbus_init_mmio(sbd, &d->ram);
return 0;
} }
static void ram_init(hwaddr addr, ram_addr_t RAM_size, static void ram_init(hwaddr addr, ram_addr_t RAM_size,
@ -793,9 +778,8 @@ static Property ram_properties[] = {
static void ram_class_init(ObjectClass *klass, void *data) static void ram_class_init(ObjectClass *klass, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = ram_init1; dc->realize = ram_realize;
dc->props = ram_properties; dc->props = ram_properties;
} }