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Remove unneeded type casts 

cpu_physical_memory_read, cpu_physical_memory_write take any pointer
as 2nd argument without needing a type cast.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Weil 2013-04-12 20:53:58 +02:00 committed by Stefan Hajnoczi
parent fd1ca7e0d5
commit e1fe50dcb3
16 changed files with 37 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
hw/arm/armv7m.c
View File

@ -56,7 +56,7 @@ static uint32_t bitband_readw(void *opaque, hwaddr offset)
addr = bitband_addr(opaque, offset) & ~1; addr = bitband_addr(opaque, offset) & ~1;
mask = (1 << ((offset >> 2) & 15)); mask = (1 << ((offset >> 2) & 15));
mask = tswap16(mask); mask = tswap16(mask);
cpu_physical_memory_read(addr, (uint8_t *)&v, 2); cpu_physical_memory_read(addr, &v, 2);
return (v & mask) != 0; return (v & mask) != 0;
} }
@ -69,12 +69,12 @@ static void bitband_writew(void *opaque, hwaddr offset,
addr = bitband_addr(opaque, offset) & ~1; addr = bitband_addr(opaque, offset) & ~1;
mask = (1 << ((offset >> 2) & 15)); mask = (1 << ((offset >> 2) & 15));
mask = tswap16(mask); mask = tswap16(mask);
cpu_physical_memory_read(addr, (uint8_t *)&v, 2); cpu_physical_memory_read(addr, &v, 2);
if (value & 1) if (value & 1)
v |= mask; v |= mask;
else else
v &= ~mask; v &= ~mask;
cpu_physical_memory_write(addr, (uint8_t *)&v, 2); cpu_physical_memory_write(addr, &v, 2);
} }
static uint32_t bitband_readl(void *opaque, hwaddr offset) static uint32_t bitband_readl(void *opaque, hwaddr offset)
@ -85,7 +85,7 @@ static uint32_t bitband_readl(void *opaque, hwaddr offset)
addr = bitband_addr(opaque, offset) & ~3; addr = bitband_addr(opaque, offset) & ~3;
mask = (1 << ((offset >> 2) & 31)); mask = (1 << ((offset >> 2) & 31));
mask = tswap32(mask); mask = tswap32(mask);
cpu_physical_memory_read(addr, (uint8_t *)&v, 4); cpu_physical_memory_read(addr, &v, 4);
return (v & mask) != 0; return (v & mask) != 0;
} }
@ -98,12 +98,12 @@ static void bitband_writel(void *opaque, hwaddr offset,
addr = bitband_addr(opaque, offset) & ~3; addr = bitband_addr(opaque, offset) & ~3;
mask = (1 << ((offset >> 2) & 31)); mask = (1 << ((offset >> 2) & 31));
mask = tswap32(mask); mask = tswap32(mask);
cpu_physical_memory_read(addr, (uint8_t *)&v, 4); cpu_physical_memory_read(addr, &v, 4);
if (value & 1) if (value & 1)
v |= mask; v |= mask;
else else
v &= ~mask; v &= ~mask;
cpu_physical_memory_write(addr, (uint8_t *)&v, 4); cpu_physical_memory_write(addr, &v, 4);
} }
static const MemoryRegionOps bitband_ops = { static const MemoryRegionOps bitband_ops = {

4
hw/arm/boot.c
View File

@ -128,7 +128,7 @@ static void set_kernel_args(const struct arm_boot_info *info)
int cmdline_size; int cmdline_size;
cmdline_size = strlen(info->kernel_cmdline); cmdline_size = strlen(info->kernel_cmdline);
cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline, cpu_physical_memory_write(p + 8, info->kernel_cmdline,
cmdline_size + 1); cmdline_size + 1);
cmdline_size = (cmdline_size >> 2) + 1; cmdline_size = (cmdline_size >> 2) + 1;
WRITE_WORD(p, cmdline_size + 2); WRITE_WORD(p, cmdline_size + 2);
@ -219,7 +219,7 @@ static void set_kernel_args_old(const struct arm_boot_info *info)
} }
s = info->kernel_cmdline; s = info->kernel_cmdline;
if (s) { if (s) {
cpu_physical_memory_write(p, (void *)s, strlen(s) + 1); cpu_physical_memory_write(p, s, strlen(s) + 1);
} else { } else {
WRITE_WORD(p, 0); WRITE_WORD(p, 0);
} }

8
hw/arm/musicpal.c
View File

@ -170,12 +170,12 @@ static void eth_rx_desc_put(uint32_t addr, mv88w8618_rx_desc *desc)
cpu_to_le16s(&desc->buffer_size); cpu_to_le16s(&desc->buffer_size);
cpu_to_le32s(&desc->buffer); cpu_to_le32s(&desc->buffer);
cpu_to_le32s(&desc->next); cpu_to_le32s(&desc->next);
cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc)); cpu_physical_memory_write(addr, desc, sizeof(*desc));
} }
static void eth_rx_desc_get(uint32_t addr, mv88w8618_rx_desc *desc) static void eth_rx_desc_get(uint32_t addr, mv88w8618_rx_desc *desc)
{ {
cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc)); cpu_physical_memory_read(addr, desc, sizeof(*desc));
le32_to_cpus(&desc->cmdstat); le32_to_cpus(&desc->cmdstat);
le16_to_cpus(&desc->bytes); le16_to_cpus(&desc->bytes);
le16_to_cpus(&desc->buffer_size); le16_to_cpus(&desc->buffer_size);
@ -229,12 +229,12 @@ static void eth_tx_desc_put(uint32_t addr, mv88w8618_tx_desc *desc)
cpu_to_le16s(&desc->bytes); cpu_to_le16s(&desc->bytes);
cpu_to_le32s(&desc->buffer); cpu_to_le32s(&desc->buffer);
cpu_to_le32s(&desc->next); cpu_to_le32s(&desc->next);
cpu_physical_memory_write(addr, (void *)desc, sizeof(*desc)); cpu_physical_memory_write(addr, desc, sizeof(*desc));
} }
static void eth_tx_desc_get(uint32_t addr, mv88w8618_tx_desc *desc) static void eth_tx_desc_get(uint32_t addr, mv88w8618_tx_desc *desc)
{ {
cpu_physical_memory_read(addr, (void *)desc, sizeof(*desc)); cpu_physical_memory_read(addr, desc, sizeof(*desc));
le32_to_cpus(&desc->cmdstat); le32_to_cpus(&desc->cmdstat);
le16_to_cpus(&desc->res); le16_to_cpus(&desc->res);
le16_to_cpus(&desc->bytes); le16_to_cpus(&desc->bytes);

4
hw/arm/nseries.c
View File

@ -970,7 +970,7 @@ static void n800_gpmc_init(struct n800_s *s)
(4 << 0); /* BASEADDRESS */ (4 << 0); /* BASEADDRESS */
cpu_physical_memory_write(0x6800a078, /* GPMC_CONFIG7_0 */ cpu_physical_memory_write(0x6800a078, /* GPMC_CONFIG7_0 */
(void *) &config7, sizeof(config7)); &config7, sizeof(config7));
} }
/* Setup sequence done by the bootloader */ /* Setup sequence done by the bootloader */
@ -982,7 +982,7 @@ static void n8x0_boot_init(void *opaque)
/* PRCM setup */ /* PRCM setup */
#define omap_writel(addr, val) \ #define omap_writel(addr, val) \
buf = (val); \ buf = (val); \
cpu_physical_memory_write(addr, (void *) &buf, sizeof(buf)) cpu_physical_memory_write(addr, &buf, sizeof(buf))
omap_writel(0x48008060, 0x41); /* PRCM_CLKSRC_CTRL */ omap_writel(0x48008060, 0x41); /* PRCM_CLKSRC_CTRL */
omap_writel(0x48008070, 1); /* PRCM_CLKOUT_CTRL */ omap_writel(0x48008070, 1); /* PRCM_CLKOUT_CTRL */

12
hw/arm/omap1.c
View File

@ -31,7 +31,7 @@ uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
uint8_t ret; uint8_t ret;
OMAP_8B_REG(addr); OMAP_8B_REG(addr);
cpu_physical_memory_read(addr, (void *) &ret, 1); cpu_physical_memory_read(addr, &ret, 1);
return ret; return ret;
} }
@ -41,7 +41,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr,
uint8_t val8 = value; uint8_t val8 = value;
OMAP_8B_REG(addr); OMAP_8B_REG(addr);
cpu_physical_memory_write(addr, (void *) &val8, 1); cpu_physical_memory_write(addr, &val8, 1);
} }
uint32_t omap_badwidth_read16(void *opaque, hwaddr addr) uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
@ -49,7 +49,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
uint16_t ret; uint16_t ret;
OMAP_16B_REG(addr); OMAP_16B_REG(addr);
cpu_physical_memory_read(addr, (void *) &ret, 2); cpu_physical_memory_read(addr, &ret, 2);
return ret; return ret;
} }
@ -59,7 +59,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr,
uint16_t val16 = value; uint16_t val16 = value;
OMAP_16B_REG(addr); OMAP_16B_REG(addr);
cpu_physical_memory_write(addr, (void *) &val16, 2); cpu_physical_memory_write(addr, &val16, 2);
} }
uint32_t omap_badwidth_read32(void *opaque, hwaddr addr) uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
@ -67,7 +67,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
uint32_t ret; uint32_t ret;
OMAP_32B_REG(addr); OMAP_32B_REG(addr);
cpu_physical_memory_read(addr, (void *) &ret, 4); cpu_physical_memory_read(addr, &ret, 4);
return ret; return ret;
} }
@ -75,7 +75,7 @@ void omap_badwidth_write32(void *opaque, hwaddr addr,
uint32_t value) uint32_t value)
{ {
OMAP_32B_REG(addr); OMAP_32B_REG(addr);
cpu_physical_memory_write(addr, (void *) &value, 4); cpu_physical_memory_write(addr, &value, 4);
} }
/* MPU OS timers */ /* MPU OS timers */

3
hw/audio/marvell_88w8618.c
View File

@ -77,8 +77,7 @@ static void mv88w8618_audio_callback(void *opaque, int free_out, int free_in)
if (block_size > 4096) { if (block_size > 4096) {
return; return;
} }
cpu_physical_memory_read(s->target_buffer + s->play_pos, (void *)buf, cpu_physical_memory_read(s->target_buffer + s->play_pos, buf, block_size);
block_size);
mem_buffer = buf; mem_buffer = buf;
if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) { if (s->playback_mode & MP_AUDIO_16BIT_SAMPLE) {
if (s->playback_mode & MP_AUDIO_MONO) { if (s->playback_mode & MP_AUDIO_MONO) {

2
hw/display/pxa2xx_lcd.c
View File

@ -315,7 +315,7 @@ static void pxa2xx_descriptor_load(PXA2xxLCDState *s)
continue; continue;
} }
cpu_physical_memory_read(descptr, (void *)&desc, sizeof(desc)); cpu_physical_memory_read(descptr, &desc, sizeof(desc));
s->dma_ch[i].descriptor = tswap32(desc.fdaddr); s->dma_ch[i].descriptor = tswap32(desc.fdaddr);
s->dma_ch[i].source = tswap32(desc.fsaddr); s->dma_ch[i].source = tswap32(desc.fsaddr);
s->dma_ch[i].id = tswap32(desc.fidr); s->dma_ch[i].id = tswap32(desc.fidr);

2
hw/dma/pxa2xx_dma.c
View File

@ -151,7 +151,7 @@ static inline void pxa2xx_dma_descriptor_fetch(
if ((s->chan[ch].descr & DDADR_BREN) && (s->chan[ch].state & DCSR_CMPST)) if ((s->chan[ch].descr & DDADR_BREN) && (s->chan[ch].state & DCSR_CMPST))
daddr += 32; daddr += 32;
cpu_physical_memory_read(daddr, (uint8_t *) desc, 16); cpu_physical_memory_read(daddr, desc, 16);
s->chan[ch].descr = desc[DDADR]; s->chan[ch].descr = desc[DDADR];
s->chan[ch].src = desc[DSADR]; s->chan[ch].src = desc[DSADR];
s->chan[ch].dest = desc[DTADR]; s->chan[ch].dest = desc[DTADR];

4
hw/dma/xilinx_axidma.c
View File

@ -197,7 +197,7 @@ static void stream_desc_load(struct Stream *s, hwaddr addr)
{ {
struct SDesc *d = &s->desc; struct SDesc *d = &s->desc;
cpu_physical_memory_read(addr, (void *) d, sizeof *d); cpu_physical_memory_read(addr, d, sizeof *d);
/* Convert from LE into host endianness. */ /* Convert from LE into host endianness. */
d->buffer_address = le64_to_cpu(d->buffer_address); d->buffer_address = le64_to_cpu(d->buffer_address);
@ -215,7 +215,7 @@ static void stream_desc_store(struct Stream *s, hwaddr addr)
d->nxtdesc = cpu_to_le64(d->nxtdesc); d->nxtdesc = cpu_to_le64(d->nxtdesc);
d->control = cpu_to_le32(d->control); d->control = cpu_to_le32(d->control);
d->status = cpu_to_le32(d->status); d->status = cpu_to_le32(d->status);
cpu_physical_memory_write(addr, (void *) d, sizeof *d); cpu_physical_memory_write(addr, d, sizeof *d);
} }
static void stream_update_irq(struct Stream *s) static void stream_update_irq(struct Stream *s)

2
hw/gpio/zaurus.c
View File

@ -287,6 +287,6 @@ static struct QEMU_PACKED sl_param_info {
void sl_bootparam_write(hwaddr ptr) void sl_bootparam_write(hwaddr ptr)
{ {
cpu_physical_memory_write(ptr, (void *)&zaurus_bootparam, cpu_physical_memory_write(ptr, &zaurus_bootparam,
sizeof(struct sl_param_info)); sizeof(struct sl_param_info));
} }

2
hw/microblaze/boot.c
View File

@ -80,7 +80,7 @@ static int microblaze_load_dtb(hwaddr addr,
} }
} }
cpu_physical_memory_write(addr, (void *)fdt, fdt_size); cpu_physical_memory_write(addr, fdt, fdt_size);
#else #else
/* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
to the kernel. */ to the kernel. */

8
hw/misc/macio/mac_dbdma.c
View File

@ -192,7 +192,7 @@ static void dbdma_cmdptr_load(DBDMA_channel *ch)
DBDMA_DPRINTF("dbdma_cmdptr_load 0x%08x\n", DBDMA_DPRINTF("dbdma_cmdptr_load 0x%08x\n",
ch->regs[DBDMA_CMDPTR_LO]); ch->regs[DBDMA_CMDPTR_LO]);
cpu_physical_memory_read(ch->regs[DBDMA_CMDPTR_LO], cpu_physical_memory_read(ch->regs[DBDMA_CMDPTR_LO],
(uint8_t*)&ch->current, sizeof(dbdma_cmd)); &ch->current, sizeof(dbdma_cmd));
} }
static void dbdma_cmdptr_save(DBDMA_channel *ch) static void dbdma_cmdptr_save(DBDMA_channel *ch)
@ -203,7 +203,7 @@ static void dbdma_cmdptr_save(DBDMA_channel *ch)
le16_to_cpu(ch->current.xfer_status), le16_to_cpu(ch->current.xfer_status),
le16_to_cpu(ch->current.res_count)); le16_to_cpu(ch->current.res_count));
cpu_physical_memory_write(ch->regs[DBDMA_CMDPTR_LO], cpu_physical_memory_write(ch->regs[DBDMA_CMDPTR_LO],
(uint8_t*)&ch->current, sizeof(dbdma_cmd)); &ch->current, sizeof(dbdma_cmd));
} }
static void kill_channel(DBDMA_channel *ch) static void kill_channel(DBDMA_channel *ch)
@ -454,7 +454,7 @@ static void load_word(DBDMA_channel *ch, int key, uint32_t addr,
return; return;
} }
cpu_physical_memory_read(addr, (uint8_t*)&val, len); cpu_physical_memory_read(addr, &val, len);
if (len == 2) if (len == 2)
val = (val << 16) | (current->cmd_dep & 0x0000ffff); val = (val << 16) | (current->cmd_dep & 0x0000ffff);
@ -499,7 +499,7 @@ static void store_word(DBDMA_channel *ch, int key, uint32_t addr,
else if (len == 1) else if (len == 1)
val >>= 24; val >>= 24;
cpu_physical_memory_write(addr, (uint8_t*)&val, len); cpu_physical_memory_write(addr, &val, len);
if (conditional_wait(ch)) if (conditional_wait(ch))
goto wait; goto wait;

4
hw/misc/milkymist-pfpu.c
View File

@ -228,8 +228,8 @@ static int pfpu_decode_insn(MilkymistPFPUState *s)
hwaddr dma_ptr = hwaddr dma_ptr =
get_dma_address(s->regs[R_MESHBASE], get_dma_address(s->regs[R_MESHBASE],
s->gp_regs[GPR_X], s->gp_regs[GPR_Y]); s->gp_regs[GPR_X], s->gp_regs[GPR_Y]);
cpu_physical_memory_write(dma_ptr, (uint8_t *)&a, 4); cpu_physical_memory_write(dma_ptr, &a, 4);
cpu_physical_memory_write(dma_ptr + 4, (uint8_t *)&b, 4); cpu_physical_memory_write(dma_ptr + 4, &b, 4);
s->regs[R_LASTDMA] = dma_ptr + 4; s->regs[R_LASTDMA] = dma_ptr + 4;
D_EXEC(qemu_log("VECTOUT a=%08x b=%08x dma=%08x\n", a, b, dma_ptr)); D_EXEC(qemu_log("VECTOUT a=%08x b=%08x dma=%08x\n", a, b, dma_ptr));
trace_milkymist_pfpu_vectout(a, b, dma_ptr); trace_milkymist_pfpu_vectout(a, b, dma_ptr);

4
hw/net/mcf_fec.c
View File

@ -108,7 +108,7 @@ typedef struct {
static void mcf_fec_read_bd(mcf_fec_bd *bd, uint32_t addr) static void mcf_fec_read_bd(mcf_fec_bd *bd, uint32_t addr)
{ {
cpu_physical_memory_read(addr, (uint8_t *)bd, sizeof(*bd)); cpu_physical_memory_read(addr, bd, sizeof(*bd));
be16_to_cpus(&bd->flags); be16_to_cpus(&bd->flags);
be16_to_cpus(&bd->length); be16_to_cpus(&bd->length);
be32_to_cpus(&bd->data); be32_to_cpus(&bd->data);
@ -120,7 +120,7 @@ static void mcf_fec_write_bd(mcf_fec_bd *bd, uint32_t addr)
tmp.flags = cpu_to_be16(bd->flags); tmp.flags = cpu_to_be16(bd->flags);
tmp.length = cpu_to_be16(bd->length); tmp.length = cpu_to_be16(bd->length);
tmp.data = cpu_to_be32(bd->data); tmp.data = cpu_to_be32(bd->data);
cpu_physical_memory_write(addr, (uint8_t *)&tmp, sizeof(tmp)); cpu_physical_memory_write(addr, &tmp, sizeof(tmp));
} }
static void mcf_fec_update(mcf_fec_state *s) static void mcf_fec_update(mcf_fec_state *s)

2
hw/ppc/ppc405_boards.c
View File

@ -337,7 +337,7 @@ static void ref405ep_init(QEMUMachineInitArgs *args)
if (kernel_cmdline != NULL) { if (kernel_cmdline != NULL) {
len = strlen(kernel_cmdline); len = strlen(kernel_cmdline);
bdloc -= ((len + 255) & ~255); bdloc -= ((len + 255) & ~255);
cpu_physical_memory_write(bdloc, (void *)kernel_cmdline, len + 1); cpu_physical_memory_write(bdloc, kernel_cmdline, len + 1);
env->gpr[6] = bdloc; env->gpr[6] = bdloc;
env->gpr[7] = bdloc + len; env->gpr[7] = bdloc + len;
} else { } else {

2
hw/ppc/virtex_ml507.c
View File

@ -161,7 +161,7 @@ static int xilinx_load_device_tree(hwaddr addr,
r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
if (r < 0) if (r < 0)
fprintf(stderr, "couldn't set /chosen/bootargs\n"); fprintf(stderr, "couldn't set /chosen/bootargs\n");
cpu_physical_memory_write (addr, (void *)fdt, fdt_size); cpu_physical_memory_write(addr, fdt, fdt_size);
#else #else
/* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
to the kernel. */ to the kernel. */