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hw/arm/virt-acpi-build: Generate GTDT table 

ACPI v5.1 defines GTDT for ARM devices as a place to describe timer
related information in the system. The Arch Timer interrupts must
be provided for GTDT.

Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1432522520-8068-11-git-send-email-zhaoshenglong@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Shannon Zhao 2015-05-29 11:28:56 +01:00 committed by Peter Maydell
parent 982d06c561
commit ee246400c1
4 changed files with 75 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
hw/arm/virt-acpi-build.c
View File

@ -151,6 +151,32 @@ static void acpi_dsdt_add_virtio(Aml *scope,
}
}
/* GTDT */
static void
build_gtdt(GArray *table_data, GArray *linker)
{
int gtdt_start = table_data->len;
AcpiGenericTimerTable *gtdt;
gtdt = acpi_data_push(table_data, sizeof *gtdt);
/* The interrupt values are the same with the device tree when adding 16 */
gtdt->secure_el1_interrupt = ARCH_TIMER_S_EL1_IRQ + 16;
gtdt->secure_el1_flags = ACPI_EDGE_SENSITIVE;
gtdt->non_secure_el1_interrupt = ARCH_TIMER_NS_EL1_IRQ + 16;
gtdt->non_secure_el1_flags = ACPI_EDGE_SENSITIVE;
gtdt->virtual_timer_interrupt = ARCH_TIMER_VIRT_IRQ + 16;
gtdt->virtual_timer_flags = ACPI_EDGE_SENSITIVE;
gtdt->non_secure_el2_interrupt = ARCH_TIMER_NS_EL2_IRQ + 16;
gtdt->non_secure_el2_flags = ACPI_EDGE_SENSITIVE;
build_header(linker, table_data,
(void *)(table_data->data + gtdt_start), "GTDT",
table_data->len - gtdt_start, 5);
}
/* MADT */
static void
build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info,
@ -292,6 +318,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
build_madt(tables_blob, tables->linker, guest_info, &cpuinfo);
acpi_add_table(table_offsets, tables_blob);
build_gtdt(tables_blob, tables->linker);
/* Cleanup memory that's no longer used. */
g_array_free(table_offsets, true);
}

8
hw/arm/virt.c
View File

@ -265,10 +265,10 @@ static void fdt_add_timer_nodes(const VirtBoardInfo *vbi)
"arm,armv7-timer");
}
qemu_fdt_setprop_cells(vbi->fdt, "/timer", "interrupts",
GIC_FDT_IRQ_TYPE_PPI, 13, irqflags,
GIC_FDT_IRQ_TYPE_PPI, 14, irqflags,
GIC_FDT_IRQ_TYPE_PPI, 11, irqflags,
GIC_FDT_IRQ_TYPE_PPI, 10, irqflags);
GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflags,
GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqflags,
GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags,
GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags);
}
static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi)

37
include/hw/acpi/acpi-defs.h
View File

@ -340,6 +340,43 @@ struct AcpiMadtGenericDistributor {
typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
/*
* Generic Timer Description Table (GTDT)
*/
#define ACPI_GTDT_INTERRUPT_MODE (1 << 0)
#define ACPI_GTDT_INTERRUPT_POLARITY (1 << 1)
#define ACPI_GTDT_ALWAYS_ON (1 << 2)
/* Triggering */
#define ACPI_LEVEL_SENSITIVE ((uint8_t) 0x00)
#define ACPI_EDGE_SENSITIVE ((uint8_t) 0x01)
/* Polarity */
#define ACPI_ACTIVE_HIGH ((uint8_t) 0x00)
#define ACPI_ACTIVE_LOW ((uint8_t) 0x01)
#define ACPI_ACTIVE_BOTH ((uint8_t) 0x02)
struct AcpiGenericTimerTable {
ACPI_TABLE_HEADER_DEF
uint64_t counter_block_addresss;
uint32_t reserved;
uint32_t secure_el1_interrupt;
uint32_t secure_el1_flags;
uint32_t non_secure_el1_interrupt;
uint32_t non_secure_el1_flags;
uint32_t virtual_timer_interrupt;
uint32_t virtual_timer_flags;
uint32_t non_secure_el2_interrupt;
uint32_t non_secure_el2_flags;
uint64_t counter_read_block_address;
uint32_t platform_timer_count;
uint32_t platform_timer_offset;
} QEMU_PACKED;
typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
/*
* HPET Description Table
*/

5
include/hw/arm/virt.h
View File

@ -34,6 +34,11 @@
#define NUM_VIRTIO_TRANSPORTS 32
#define ARCH_TIMER_VIRT_IRQ 11
#define ARCH_TIMER_S_EL1_IRQ 13
#define ARCH_TIMER_NS_EL1_IRQ 14
#define ARCH_TIMER_NS_EL2_IRQ 10
enum {
VIRT_FLASH,
VIRT_MEM,