clean build: Fix remaining sh4 warnings
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6668 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
		
							parent
							
								
									8dd640e49d
								
							
						
					
					
						commit
						ef7ec1c16d
					
				
							
								
								
									
										15
									
								
								hw/shix.c
								
								
								
								
							
							
						
						
									
										15
									
								
								hw/shix.c
								
								
								
								
							| 
						 | 
				
			
			@ -45,21 +45,6 @@ void pic_info(void)
 | 
			
		|||
    /* XXXXX */
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void vga_update_display(void)
 | 
			
		||||
{
 | 
			
		||||
    /* XXXXX */
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void vga_invalidate_display(void)
 | 
			
		||||
{
 | 
			
		||||
    /* XXXXX */
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void vga_screen_dump(const char *filename)
 | 
			
		||||
{
 | 
			
		||||
    /* XXXXX */
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
static void shix_init(ram_addr_t ram_size, int vga_ram_size,
 | 
			
		||||
               const char *boot_device,
 | 
			
		||||
	       const char *kernel_filename, const char *kernel_cmdline,
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -165,6 +165,8 @@ static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls)
 | 
			
		|||
  env->gbr = newtls;
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void cpu_load_tlb(CPUSH4State * env);
 | 
			
		||||
 | 
			
		||||
#include "softfloat.h"
 | 
			
		||||
 | 
			
		||||
#define CPUState CPUSH4State
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -53,10 +53,4 @@ static inline void env_to_regs(void)
 | 
			
		|||
    /* XXXXX */
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void cpu_load_tlb(CPUState * env);
 | 
			
		||||
 | 
			
		||||
int find_itlb_entry(CPUState * env, target_ulong address,
 | 
			
		||||
		    int use_asid, int update);
 | 
			
		||||
int find_utlb_entry(CPUState * env, target_ulong address, int use_asid);
 | 
			
		||||
 | 
			
		||||
#endif				/* _EXEC_SH4_H */
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -313,8 +313,8 @@ static void increment_urc(CPUState * env)
 | 
			
		|||
   Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
 | 
			
		||||
   Update the itlb from utlb if update is not 0
 | 
			
		||||
*/
 | 
			
		||||
int find_itlb_entry(CPUState * env, target_ulong address,
 | 
			
		||||
		    int use_asid, int update)
 | 
			
		||||
static int find_itlb_entry(CPUState * env, target_ulong address,
 | 
			
		||||
                           int use_asid, int update)
 | 
			
		||||
{
 | 
			
		||||
    int e, n;
 | 
			
		||||
 | 
			
		||||
| 
						 | 
				
			
			@ -344,7 +344,7 @@ int find_itlb_entry(CPUState * env, target_ulong address,
 | 
			
		|||
 | 
			
		||||
/* Find utlb entry
 | 
			
		||||
   Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
 | 
			
		||||
int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
 | 
			
		||||
static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
 | 
			
		||||
{
 | 
			
		||||
    /* per utlb access */
 | 
			
		||||
    increment_urc(env);
 | 
			
		||||
| 
						 | 
				
			
			@ -418,9 +418,9 @@ static int get_mmu_address(CPUState * env, target_ulong * physical,
 | 
			
		|||
    return n;
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
int get_physical_address(CPUState * env, target_ulong * physical,
 | 
			
		||||
			 int *prot, target_ulong address,
 | 
			
		||||
			 int rw, int access_type)
 | 
			
		||||
static int get_physical_address(CPUState * env, target_ulong * physical,
 | 
			
		||||
                                int *prot, target_ulong address,
 | 
			
		||||
                                int rw, int access_type)
 | 
			
		||||
{
 | 
			
		||||
    /* P1, P2 and P4 areas do not use translation */
 | 
			
		||||
    if ((address >= 0x80000000 && address < 0xc0000000) ||
 | 
			
		||||
| 
						 | 
				
			
			@ -525,7 +525,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
 | 
			
		|||
    return physical;
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void cpu_load_tlb(CPUState * env)
 | 
			
		||||
void cpu_load_tlb(CPUSH4State * env)
 | 
			
		||||
{
 | 
			
		||||
    int n = cpu_mmucr_urc(env->mmucr);
 | 
			
		||||
    tlb_t * entry = &env->utlb[n];
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
		Loading…
	
		Reference in New Issue