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tcg: enable MTTCG by default for PPC64 on x86 

This enables the multi-threaded system emulation by default for PPC64
guests using the x86_64 TCG back-end.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania 2017-04-27 10:48:23 +05:30 committed by David Gibson
parent a3e53273ad
commit f0b0685d66
2 changed files with 4 additions and 0 deletions
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2
configure vendored
View File

@ -6110,12 +6110,14 @@ case "$target_name" in
ppc64) ppc64)
TARGET_BASE_ARCH=ppc TARGET_BASE_ARCH=ppc
TARGET_ABI_DIR=ppc TARGET_ABI_DIR=ppc
mttcg=yes
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml" gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
;; ;;
ppc64le) ppc64le)
TARGET_ARCH=ppc64 TARGET_ARCH=ppc64
TARGET_BASE_ARCH=ppc TARGET_BASE_ARCH=ppc
TARGET_ABI_DIR=ppc TARGET_ABI_DIR=ppc
mttcg=yes
gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml" gdb_xml_files="power64-core.xml power-fpu.xml power-altivec.xml power-spe.xml power-vsx.xml"
;; ;;
ppc64abi32) ppc64abi32)

2
target/ppc/cpu.h
View File

@ -30,6 +30,8 @@
#define TARGET_LONG_BITS 64 #define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12 #define TARGET_PAGE_BITS 12
#define TCG_GUEST_DEFAULT_MO 0
/* Note that the official physical address space bits is 62-M where M /* Note that the official physical address space bits is 62-M where M
is implementation dependent. I've not looked up M for the set of is implementation dependent. I've not looked up M for the set of
cpus we emulate at the system level. */ cpus we emulate at the system level. */