tcg: Transition flat op_defs array to a target callback
This will allow the target to tailor the constraints to the auto-detected ISA extensions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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			@ -1812,6 +1812,18 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(aarch64_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (aarch64_op_defs[i].op == op) {
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            return &aarch64_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
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			@ -1834,8 +1846,6 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_FP);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_X18); /* platform register */
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    tcg_add_target_add_op_defs(aarch64_op_defs);
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}
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/* Saving pairs: (X19, X20) .. (X27, X28), (X29(fp), X30(lr)).  */
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			@ -2008,6 +2008,18 @@ static const TCGTargetOpDef arm_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(arm_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (arm_op_defs[i].op == op) {
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            return &arm_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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    /* Only probe for the platform and capabilities if we havn't already
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			@ -2038,8 +2050,6 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
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    tcg_add_target_add_op_defs(arm_op_defs);
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}
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static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
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			@ -2330,6 +2330,18 @@ static const TCGTargetOpDef x86_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(x86_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (x86_op_defs[i].op == op) {
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            return &x86_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static int tcg_target_callee_save_regs[] = {
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#if TCG_TARGET_REG_BITS == 64
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    TCG_REG_RBP,
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			@ -2471,8 +2483,6 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_clear(s->reserved_regs);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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    tcg_add_target_add_op_defs(x86_op_defs);
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}
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typedef struct {
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			@ -2352,6 +2352,18 @@ static const TCGTargetOpDef ia64_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(ia64_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (ia64_op_defs[i].op == op) {
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            return &ia64_op_defs[i];
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        }
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    }
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    return NULL;
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}
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/* Generate global QEMU prologue and epilogue code */
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static void tcg_target_qemu_prologue(TCGContext *s)
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{
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			@ -2471,6 +2483,4 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R5);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R7);
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    tcg_add_target_add_op_defs(ia64_op_defs);
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}
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			@ -2262,6 +2262,18 @@ static const TCGTargetOpDef mips_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(mips_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (mips_op_defs[i].op == op) {
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            return &mips_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static int tcg_target_callee_save_regs[] = {
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    TCG_REG_S0,       /* used for the global env (TCG_AREG0) */
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    TCG_REG_S1,
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			@ -2563,8 +2575,6 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA);   /* return address */
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);   /* stack pointer */
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_GP);   /* global pointer */
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    tcg_add_target_add_op_defs(mips_op_defs);
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}
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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			@ -2634,6 +2634,18 @@ static const TCGTargetOpDef ppc_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(ppc_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (ppc_op_defs[i].op == op) {
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            return &ppc_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
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			@ -2670,8 +2682,6 @@ static void tcg_target_init(TCGContext *s)
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    if (USE_REG_RA) {
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        tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA);  /* return addr */
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    }
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    tcg_add_target_add_op_defs(ppc_op_defs);
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}
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#ifdef __ELF__
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			@ -2326,6 +2326,18 @@ static const TCGTargetOpDef s390_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(s390_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (s390_op_defs[i].op == op) {
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            return &s390_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static void query_s390_facilities(void)
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{
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    unsigned long hwcap = qemu_getauxval(AT_HWCAP);
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			@ -2368,8 +2380,6 @@ static void tcg_target_init(TCGContext *s)
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    /* XXX many insns can't be used with R0, so we better avoid it for now */
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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    tcg_add_target_add_op_defs(s390_op_defs);
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}
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#define FRAME_SIZE  ((int)(TCG_TARGET_CALL_STACK_OFFSET          \
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			@ -1583,6 +1583,18 @@ static const TCGTargetOpDef sparc_op_defs[] = {
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    { -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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    int i, n = ARRAY_SIZE(sparc_op_defs);
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    for (i = 0; i < n; ++i) {
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        if (sparc_op_defs[i].op == op) {
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            return &sparc_op_defs[i];
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        }
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    }
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    return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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    /* Only probe for the platform and capabilities if we havn't already
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			@ -1622,8 +1634,6 @@ static void tcg_target_init(TCGContext *s)
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); /* stack pointer */
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_T2); /* for internal use */
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    tcg_add_target_add_op_defs(sparc_op_defs);
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}
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#if SPARC64
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						 | 
				
			
			
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		|||
							
								
								
									
										84
									
								
								tcg/tcg.c
								
								
								
								
							
							
						
						
									
										84
									
								
								tcg/tcg.c
								
								
								
								
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			@ -62,6 +62,7 @@
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/* Forward declarations for functions declared in tcg-target.inc.c and
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   used here. */
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static void tcg_target_init(TCGContext *s);
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode);
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static void tcg_target_qemu_prologue(TCGContext *s);
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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                        intptr_t value, intptr_t addend);
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			@ -319,6 +320,7 @@ static const TCGHelperInfo all_helpers[] = {
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};
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static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)];
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static void process_op_defs(TCGContext *s);
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void tcg_context_init(TCGContext *s)
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{
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			@ -362,6 +364,7 @@ void tcg_context_init(TCGContext *s)
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    }
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    tcg_target_init(s);
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    process_op_defs(s);
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    /* Reverse the order of the saved registers, assuming they're all at
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       the start of tcg_target_reg_alloc_order.  */
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			@ -1221,29 +1224,33 @@ static void sort_constraints(TCGOpDef *def, int start, int n)
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    }
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}
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void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
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static void process_op_defs(TCGContext *s)
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{
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    TCGOpcode op;
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    TCGOpDef *def;
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    const char *ct_str;
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    int i, nb_args;
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    for(;;) {
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        if (tdefs->op == (TCGOpcode)-1)
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            break;
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        op = tdefs->op;
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        tcg_debug_assert((unsigned)op < NB_OPS);
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        def = &tcg_op_defs[op];
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#if defined(CONFIG_DEBUG_TCG)
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        /* Duplicate entry in op definitions? */
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        tcg_debug_assert(!def->used);
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        def->used = 1;
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#endif
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    for (op = 0; op < NB_OPS; op++) {
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        TCGOpDef *def = &tcg_op_defs[op];
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        const TCGTargetOpDef *tdefs;
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        int i, nb_args, ok;
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        if (def->flags & TCG_OPF_NOT_PRESENT) {
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            continue;
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        }
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        nb_args = def->nb_iargs + def->nb_oargs;
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        if (nb_args == 0) {
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            continue;
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        }
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        tdefs = tcg_target_op_def(op);
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        /* Missing TCGTargetOpDef entry. */
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        tcg_debug_assert(tdefs != NULL);
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        for (i = 0; i < nb_args; i++) {
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            ct_str = tdefs->args_ct_str[i];
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            /* Incomplete TCGTargetOpDef entry? */
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            const char *ct_str = tdefs->args_ct_str[i];
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            /* Incomplete TCGTargetOpDef entry. */
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            tcg_debug_assert(ct_str != NULL);
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            tcg_regset_clear(def->args_ct[i].u.regs);
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            def->args_ct[i].ct = 0;
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            if (ct_str[0] >= '0' && ct_str[0] <= '9') {
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			@ -1272,11 +1279,9 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
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                        ct_str++;
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                        break;
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                    default:
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                        if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
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                            fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
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                                    ct_str, i, def->name);
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                            exit(1);
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                        }
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                        ok = target_parse_constraint(&def->args_ct[i], &ct_str);
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                        /* Typo in TCGTargetOpDef constraint. */
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                        tcg_debug_assert(ok == 0);
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                    }
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                }
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            }
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			@ -1288,42 +1293,7 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
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        /* sort the constraints (XXX: this is just an heuristic) */
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        sort_constraints(def, 0, def->nb_oargs);
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        sort_constraints(def, def->nb_oargs, def->nb_iargs);
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#if 0
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        {
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		||||
            int i;
 | 
			
		||||
 | 
			
		||||
            printf("%s: sorted=", def->name);
 | 
			
		||||
            for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
 | 
			
		||||
                printf(" %d", def->sorted_args[i]);
 | 
			
		||||
            printf("\n");
 | 
			
		||||
    }
 | 
			
		||||
#endif
 | 
			
		||||
        tdefs++;
 | 
			
		||||
    }
 | 
			
		||||
 | 
			
		||||
#if defined(CONFIG_DEBUG_TCG)
 | 
			
		||||
    i = 0;
 | 
			
		||||
    for (op = 0; op < tcg_op_defs_max; op++) {
 | 
			
		||||
        const TCGOpDef *def = &tcg_op_defs[op];
 | 
			
		||||
        if (def->flags & TCG_OPF_NOT_PRESENT) {
 | 
			
		||||
            /* Wrong entry in op definitions? */
 | 
			
		||||
            if (def->used) {
 | 
			
		||||
                fprintf(stderr, "Invalid op definition for %s\n", def->name);
 | 
			
		||||
                i = 1;
 | 
			
		||||
            }
 | 
			
		||||
        } else {
 | 
			
		||||
            /* Missing entry in op definitions? */
 | 
			
		||||
            if (!def->used) {
 | 
			
		||||
                fprintf(stderr, "Missing op definition for %s\n", def->name);
 | 
			
		||||
                i = 1;
 | 
			
		||||
            }
 | 
			
		||||
        }
 | 
			
		||||
    }
 | 
			
		||||
    if (i == 1) {
 | 
			
		||||
        tcg_abort();
 | 
			
		||||
    }
 | 
			
		||||
#endif
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
void tcg_op_remove(TCGContext *s, TCGOp *op)
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -906,8 +906,6 @@ do {\
 | 
			
		|||
    abort();\
 | 
			
		||||
} while (0)
 | 
			
		||||
 | 
			
		||||
void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 | 
			
		||||
 | 
			
		||||
#if UINTPTR_MAX == UINT32_MAX
 | 
			
		||||
#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 | 
			
		||||
#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -259,6 +259,18 @@ static const TCGTargetOpDef tcg_target_op_defs[] = {
 | 
			
		|||
    { -1 },
 | 
			
		||||
};
 | 
			
		||||
 | 
			
		||||
static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
 | 
			
		||||
{
 | 
			
		||||
    int i, n = ARRAY_SIZE(tcg_target_op_defs);
 | 
			
		||||
 | 
			
		||||
    for (i = 0; i < n; ++i) {
 | 
			
		||||
        if (tcg_target_op_defs[i].op == op) {
 | 
			
		||||
            return &tcg_target_op_defs[i];
 | 
			
		||||
        }
 | 
			
		||||
    }
 | 
			
		||||
    return NULL;
 | 
			
		||||
}
 | 
			
		||||
 | 
			
		||||
static const int tcg_target_reg_alloc_order[] = {
 | 
			
		||||
    TCG_REG_R0,
 | 
			
		||||
    TCG_REG_R1,
 | 
			
		||||
| 
						 | 
				
			
			@ -875,7 +887,6 @@ static void tcg_target_init(TCGContext *s)
 | 
			
		|||
 | 
			
		||||
    tcg_regset_clear(s->reserved_regs);
 | 
			
		||||
    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
 | 
			
		||||
    tcg_add_target_add_op_defs(tcg_target_op_defs);
 | 
			
		||||
 | 
			
		||||
    /* We use negative offsets from "sp" so that we can distinguish
 | 
			
		||||
       stores that might pretend to be call arguments.  */
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
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		Reference in New Issue