Queued TCG patches
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZVqCZAAoJEK0ScMxN0CeboGwIAK5V5z19BGrH/IwG0+9+/pvL E10jfGFOH8ZNEQ+z/ee9U6kjvH+yVNLm5cplZXaw+Clh+brlvEnLCJCyS+eIu9nu czXbKmz37SWd04vLXTCtufHsObqlaqoplShQ21Dn1tipZkRhIjRWdqO0pjDnO+Wa eawF/eJgwwtqiOhvVGgOjATo5qT4W8GzyYHv/V7YRdBt28JVwNW9xwCXi8fUH3Od IFrMI6JF6+YlWDq+BhGlE2vroKiv4Xsjxd9RyLbxo+jT/o8YMZqXpRzS0Ud4VMaM QFsU76YGBnDsQYnJ9mpYsWjBnyc60aiXUlKKM5DhUKPEkAmttcH2WhxrjvVeITk= =myti -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170603' into staging Queued TCG patches # gpg: Signature made Fri 30 Jun 2017 20:03:53 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170603: tcg: consistently access cpu->tb_jmp_cache atomically gen-icount: use tcg_ctx.tcg_env instead of cpu_env gen-icount: add missing inline to gen_tb_end Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
fd479c60f5
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@ -118,7 +118,7 @@ static void tlb_flush_nocheck(CPUState *cpu)
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memset(env->tlb_table, -1, sizeof(env->tlb_table));
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memset(env->tlb_table, -1, sizeof(env->tlb_table));
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memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table));
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memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table));
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memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));
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cpu_tb_jmp_cache_clear(cpu);
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env->vtlb_index = 0;
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env->vtlb_index = 0;
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env->tlb_flush_addr = -1;
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env->tlb_flush_addr = -1;
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@ -183,7 +183,7 @@ static void tlb_flush_by_mmuidx_async_work(CPUState *cpu, run_on_cpu_data data)
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}
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}
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}
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}
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memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache));
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cpu_tb_jmp_cache_clear(cpu);
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tlb_debug("done\n");
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tlb_debug("done\n");
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@ -928,11 +928,7 @@ static void do_tb_flush(CPUState *cpu, run_on_cpu_data tb_flush_count)
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}
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}
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CPU_FOREACH(cpu) {
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CPU_FOREACH(cpu) {
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int i;
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cpu_tb_jmp_cache_clear(cpu);
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for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
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atomic_set(&cpu->tb_jmp_cache[i], NULL);
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}
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}
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}
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tcg_ctx.tb_ctx.nb_tbs = 0;
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tcg_ctx.tb_ctx.nb_tbs = 0;
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@ -1813,19 +1809,21 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
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cpu_loop_exit_noexc(cpu);
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cpu_loop_exit_noexc(cpu);
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}
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}
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static void tb_jmp_cache_clear_page(CPUState *cpu, target_ulong page_addr)
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{
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unsigned int i, i0 = tb_jmp_cache_hash_page(page_addr);
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for (i = 0; i < TB_JMP_PAGE_SIZE; i++) {
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atomic_set(&cpu->tb_jmp_cache[i0 + i], NULL);
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}
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}
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void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
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void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
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{
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{
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unsigned int i;
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/* Discard jump cache entries for any tb which might potentially
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/* Discard jump cache entries for any tb which might potentially
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overlap the flushed page. */
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overlap the flushed page. */
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i = tb_jmp_cache_hash_page(addr - TARGET_PAGE_SIZE);
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tb_jmp_cache_clear_page(cpu, addr - TARGET_PAGE_SIZE);
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memset(&cpu->tb_jmp_cache[i], 0,
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tb_jmp_cache_clear_page(cpu, addr);
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TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
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i = tb_jmp_cache_hash_page(addr);
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memset(&cpu->tb_jmp_cache[i], 0,
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TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
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}
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}
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static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf,
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static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf,
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@ -19,7 +19,7 @@ static inline void gen_tb_start(TranslationBlock *tb)
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count = tcg_temp_new_i32();
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count = tcg_temp_new_i32();
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}
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}
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tcg_gen_ld_i32(count, cpu_env,
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tcg_gen_ld_i32(count, tcg_ctx.tcg_env,
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u32));
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u32));
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if (tb->cflags & CF_USE_ICOUNT) {
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if (tb->cflags & CF_USE_ICOUNT) {
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@ -37,14 +37,14 @@ static inline void gen_tb_start(TranslationBlock *tb)
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tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, exitreq_label);
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tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, exitreq_label);
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if (tb->cflags & CF_USE_ICOUNT) {
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if (tb->cflags & CF_USE_ICOUNT) {
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tcg_gen_st16_i32(count, cpu_env,
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tcg_gen_st16_i32(count, tcg_ctx.tcg_env,
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low));
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-ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low));
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}
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}
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tcg_temp_free_i32(count);
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tcg_temp_free_i32(count);
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}
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}
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static void gen_tb_end(TranslationBlock *tb, int num_insns)
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static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
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{
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{
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if (tb->cflags & CF_USE_ICOUNT) {
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if (tb->cflags & CF_USE_ICOUNT) {
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/* Update the num_insn immediate parameter now that we know
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/* Update the num_insn immediate parameter now that we know
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@ -62,14 +62,16 @@ static void gen_tb_end(TranslationBlock *tb, int num_insns)
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static inline void gen_io_start(void)
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static inline void gen_io_start(void)
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{
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{
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TCGv_i32 tmp = tcg_const_i32(1);
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TCGv_i32 tmp = tcg_const_i32(1);
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tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
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tcg_gen_st_i32(tmp, tcg_ctx.tcg_env,
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-ENV_OFFSET + offsetof(CPUState, can_do_io));
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tcg_temp_free_i32(tmp);
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tcg_temp_free_i32(tmp);
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}
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}
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static inline void gen_io_end(void)
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static inline void gen_io_end(void)
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{
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{
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TCGv_i32 tmp = tcg_const_i32(0);
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TCGv_i32 tmp = tcg_const_i32(0);
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tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
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tcg_gen_st_i32(tmp, tcg_ctx.tcg_env,
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-ENV_OFFSET + offsetof(CPUState, can_do_io));
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tcg_temp_free_i32(tmp);
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tcg_temp_free_i32(tmp);
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}
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}
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@ -346,7 +346,7 @@ struct CPUState {
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void *env_ptr; /* CPUArchState */
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void *env_ptr; /* CPUArchState */
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/* Writes protected by tb_lock, reads not thread-safe */
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/* Accessed in parallel; all accesses must be atomic */
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struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
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struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
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struct GDBRegisterState *gdb_regs;
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struct GDBRegisterState *gdb_regs;
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@ -422,6 +422,15 @@ extern struct CPUTailQ cpus;
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extern __thread CPUState *current_cpu;
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extern __thread CPUState *current_cpu;
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static inline void cpu_tb_jmp_cache_clear(CPUState *cpu)
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{
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unsigned int i;
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for (i = 0; i < TB_JMP_CACHE_SIZE; i++) {
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atomic_set(&cpu->tb_jmp_cache[i], NULL);
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}
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}
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/**
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/**
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* qemu_tcg_mttcg_enabled:
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* qemu_tcg_mttcg_enabled:
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* Check whether we are running MultiThread TCG or not.
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* Check whether we are running MultiThread TCG or not.
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@ -274,7 +274,6 @@ void cpu_reset(CPUState *cpu)
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static void cpu_common_reset(CPUState *cpu)
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static void cpu_common_reset(CPUState *cpu)
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{
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUClass *cc = CPU_GET_CLASS(cpu);
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int i;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
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qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
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@ -292,9 +291,7 @@ static void cpu_common_reset(CPUState *cpu)
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cpu->crash_occurred = false;
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cpu->crash_occurred = false;
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if (tcg_enabled()) {
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if (tcg_enabled()) {
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for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
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cpu_tb_jmp_cache_clear(cpu);
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atomic_set(&cpu->tb_jmp_cache[i], NULL);
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}
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#ifdef CONFIG_SOFTMMU
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#ifdef CONFIG_SOFTMMU
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tlb_flush(cpu, 0);
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tlb_flush(cpu, 0);
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