2 Commits

Author	SHA1	Message	Date
bellard	3f33731662	pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags ... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162	2003-08-20 23:02:09 +00:00
bellard	ab93bbe2ae	soft mmu support ... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@349 c046a42c-6fe2-441c-8c8c-71466251a162	2003-08-10 21:35:13 +00:00