8393617c1a
Use dynamical computation for condition codes
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:11 +00:00
719f66a770
Optimize cmp x, 0 case
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:27 +00:00
dc1a6971e3
Reindent
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:22 +00:00
b89e94af1d
Improve instruction name comments for easier searching
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 20:19:46 +00:00
41d728522b
Optimize operations with immediate parameters
2009-05-02 19:14:05 +00:00
67526b2056
Fix Sparc64 sign extension problems
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 18:58:57 +00:00
1b530a6dfc
Add new command line option -singlestep for tcg single stepping.
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This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
d78f399542
Delete some unused macros detected with -Wp,-Wunused-macros use
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-16 16:33:01 +00:00
8fec2b8c45
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
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These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
93fcfe39a0
Convert references to logfile/loglevel to use qemu_log*() macros
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This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
fad6cb1a56
Update FSF address in GPL/LGPL boilerplate
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The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
c0ce998e94
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
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This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
a1d1bb3101
Refactor and enhance break/watchpoint API (Jan Kiszka)
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This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.
Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
a7812ae412
TCG variable type checking.
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Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
2576d836af
Use TCG not op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5663 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:52:36 +00:00
81b5b816e2
Use andc, orc, nor and nand
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Also fix which argument gets negated in fandnot[12] and fornot[12]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:50:37 +00:00
527067d892
Fix TCGv size mismatches
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5593 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 13:44:52 +00:00
b158a785d2
Implement UA2005 hypervisor traps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:05:23 +00:00
9d92659858
Add software and timer interrupt support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 19:50:28 +00:00
ab508019a1
Use the new concat_tl_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 18:43:17 +00:00
a7ec422912
Use the new concat_i32_i64 op for std and stda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 14:49:09 +00:00
72ccba795b
Fix mulscc with high bits set in either src1 or src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 17:20:52 +00:00
5068cbd9e9
Write zeros to high bits of y, based on patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-11 16:01:02 +00:00
d84763bc17
Convert rest of ops using float32 to TCG, remove FT0 and FT1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:09:22 +00:00
c5d04e99f3
Partially convert float128 conversion ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:00:18 +00:00
e2ea21b396
Convert basic 64 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:35 +00:00
1d01299d29
Convert basic 32 bit VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:13 +00:00
714547bbc7
Convert basic float32 ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:54:51 +00:00
3a3b925d47
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 19:02:49 +00:00
510aba20f0
Fix a typo in fpsub32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:54:01 +00:00
255e1fcb5a
Convert most env fields to TCG registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:51:43 +00:00
47ad35f16a
Silence gcc warning about constant overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:50:16 +00:00
b991c38519
Fix sign extension problems with smul and umul (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
105a1f04b5
Fix y register loads and stores
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
ba6a9d8cda
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
c93e7817ee
Fix wrwim masking (Luis Pureza)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:34:42 +00:00
5578ceab94
Use initial CPU definition structure for some CPU fields instead of copying
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them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:33:42 +00:00
2ae72bce02
Correct 32bit carry flag for add instruction (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 08:33:47 +00:00
01b1fa6d16
Fix Sparc64 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:13:54 +00:00
95f9397c75
Fix offset handling for ASI loads and stores (Vince Weaver)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 15:28:20 +00:00
dd5e6304aa
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 18:11:20 +00:00
fb79ceb91a
Make UA200x features selectable, add MMU types
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:22:16 +00:00
db166940e2
Implement nucleus quad ldda
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-19 13:25:28 +00:00
2cfc5f17d3
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
8d7d8c4bb1
wrhpr hstick_cmpr is a store, not a load
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4887 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 10:26:07 +00:00
2cade6a3f6
Support for address masking
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 12:53:05 +00:00
c5f2f66835
Flushw can generate exceptions, so save PC & NPC
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4876 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-16 11:51:15 +00:00
71817e4898
Really fix cas
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-15 14:52:09 +00:00
2e70f6efa8
Add instruction counter.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
d987963aa9
Eliminate cpu_T[0]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 10:58:57 +00:00
3f0436fe85
Eliminate cpu_T[1]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-22 08:52:58 +00:00
ece43b8d06
Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:50:10 +00:00
5c6a0628b7
Avoid brcond problems, use temps for cpu_src1 & cpu_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-21 19:46:48 +00:00
07bf2857b8
Avoid temporary variable use across basic blocks for udivx
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4744 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-15 18:06:39 +00:00
1a14026e11
Allow NWINDOWS selection (CPU feature with model specific defaults)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 08:07:37 +00:00
e30b467893
MicroSparc I didn't have fsmuld op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 18:20:36 +00:00
2ea815cac7
Free temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4591 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 19:39:12 +00:00
8d96d20941
More TCG type fixes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4589 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 19:42:42 +00:00
ef28fd8673
Fix cas on i386
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4587 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 17:53:41 +00:00
4f7de37327
remove absolete function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4579 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:01:40 +00:00
a8c768c069
Nicer debug output
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4573 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 11:17:46 +00:00
bcb0126ff4
More TCGv type fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:24:25 +00:00
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
455f900486
Fix helper operand type mismatch.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4551 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:12:32 +00:00
c9e03d8f68
Register op helpers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4534 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 18:16:25 +00:00
e35298cd1f
Generate better code for Sparc32 shifts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 09:43:12 +00:00
77f193daa8
Wrap long lines
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:13:33 +00:00
c2bc0e3880
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 19:24:10 +00:00
0dcda9be6b
Add a TODO file
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4410 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:09:24 +00:00
7c60cc4bca
suppressed fixed registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:58:20 +00:00
22548760ca
Fix compiler warnings
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:12:00 +00:00
64a88d5d3a
CPU feature selection support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:13:43 +00:00
9c6c6662d1
Simplify some constant loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4383 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:04:29 +00:00
ba28189bac
Fix potential condition code problems
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4382 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 18:03:02 +00:00
7fa76c0bf3
Complete the TCG conversion
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 11:58:45 +00:00
653ccb8099
Avoid some brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 08:06:33 +00:00
6f551262b3
Use memory based registers in functions containing brconds
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4311 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 20:51:00 +00:00
d2856f1ad4
Factorize code in translate.c
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(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
4b8b8b76d4
Document the shift values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-23 17:12:35 +00:00
2a39bc41cb
Remove incorrect discards and old unused defines (blueswir1).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4137 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-30 19:47:23 +00:00
a49d9390d4
Change handling of source 2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4135 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:39:41 +00:00
9322a4bf0b
Change handling of source register 1
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4134 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 20:38:35 +00:00
c48fcb4751
Move CPU stuff unrelated to translation to helper.c
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 15:46:56 +00:00
6ae20372d4
Rename T[012] according to their roles
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4131 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:09:25 +00:00
32b6c8125c
Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4130 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 09:03:48 +00:00
31741a27fa
Accidentally dropped one change from previous commit
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4129 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-29 08:59:48 +00:00
4af984a76a
Concentrate cpu_T[012] use to one function
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:47:52 +00:00
ce5b3c3d46
Split icc and xcc flag calculations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:56 +00:00
2f5680ee33
Remove some legacy definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4108 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-26 20:45:06 +00:00
bdf46ea256
Fix a sign extension problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4105 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-24 17:47:03 +00:00
7127fe84e7
Fix mulscc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4103 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-23 11:50:28 +00:00
ce8536e23f
Convert ldf/ldfsr and stf/stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4101 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:47:14 +00:00
8911f5019c
Fix i32/i64/TL mismatches
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4100 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:40:28 +00:00
2b29924f8c
Convert align checks to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:08:59 +00:00
06b3e1b3a9
Convert jumps to labels to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4094 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:59:39 +00:00
72a9747b79
Convert save, restore, saved, restored, and flushw to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:57:29 +00:00
44e7757c2a
Convert other float and VIS ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:56:02 +00:00
ff07ec8309
Convert float move ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4090 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:53:56 +00:00
3b89f26c11
Convert udiv and sdiv ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:10:42 +00:00
2483386a6e
Use ext_i32_i64 instead of ext32s_i64
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4087 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:09:27 +00:00
d35527d9f9
Convert CCR and CWP ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:08:25 +00:00
1f5063fb97
Convert array8/16/32 and alignaddr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:06:54 +00:00
8879d139bb
Convert umul and smul to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4077 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:24:42 +00:00
48d5c82bcc
Use a TCG global for pc and npc
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4076 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:23:31 +00:00
d9bdab86e8
Convert mulscc to TCG, add cc_src2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:22:18 +00:00
0425bee563
Discard unused data, use less temps
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4073 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:18:54 +00:00
87e92502c6
Use a TCG global for fsr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4068 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:12:11 +00:00
bb5529bb62
Convert ldfsr and stfsr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:11:06 +00:00
748b9d8ef0
Eliminate some uses of T2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4065 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 21:09:15 +00:00
1a7b60e727
Convert udivx and sdivx to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4064 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 19:42:42 +00:00
f5069b26a4
Use memory globals for G registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4062 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 17:35:02 +00:00
1ec6d2ea99
Use tcg_const_tl for zero constant
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4054 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:47:53 +00:00
dc99a3f2e8
Convert condition code changing versions of add, sub, logic, and div to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:45:31 +00:00
db4a4ea4ee
Use a TCG global for regwptr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-11 20:59:02 +00:00
56ec06bb8e
Convert andn, orn and xnor to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4030 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-09 20:46:51 +00:00
19f329ad7b
Convert branches and conditional moves to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4028 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-08 21:36:50 +00:00
134d77a14b
Convert exception ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 20:09:54 +00:00
a3ffaf3060
Fix microSPARC II SFSR mask (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4021 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 16:13:51 +00:00
375ee38b4b
Convert Sparc64 trap state ops to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 17:59:48 +00:00
7e8c2b6ca8
Convert float helpers to TCG, fix fabsq in the process
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 20:00:18 +00:00
dcf2490568
Convert fmovr to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4013 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 19:56:06 +00:00
ccd4a21937
Convert tick operations to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:28:06 +00:00
00f219bf50
Convert movr and (partially) movcc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4010 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:25:27 +00:00
38bc628b08
Convert addx, subx, next_insn and mov_pc_npc to TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:22:19 +00:00
b25deda7ca
Temporary fix for i386 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-27 17:44:03 +00:00
1a2fb1c009
Modify Sparc32/64 to use TCG
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 14:10:06 +00:00
9e31b9e28a
Fix remote debugger memory access problems reported by Matthias Stein
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-14 17:46:44 +00:00
3deaeab717
Sparc32 MMU register fixes (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 18:27:33 +00:00
57fec1fee9
use the TCG code generator
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
01ba98161f
Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09 02:22:57 +00:00
2382dc6b9b
Fix floating point register decoding
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3742 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 20:27:35 +00:00
1f58732916
128-bit float support for user mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
aaed909a49
added cpu_model parameter to cpu_init()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 15:15:54 +00:00
7d77bf2006
More Sparc64 CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3561 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10 09:32:02 +00:00
406f82e833
More CPU definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3559 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09 19:08:43 +00:00
6d5f237a59
CPU specific boot mode (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
8f577d3d29
Enable all alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:34:57 +00:00
6f27aba62e
Sparc64 hypervisor mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 17:07:21 +00:00
952a328ff5
SuperSparc MXCC support (Robert Reif)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 16:29:21 +00:00
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
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allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
90251fb96e
Fix taddcctv and tsubcctv (David Matthews)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3379 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-10 19:11:54 +00:00
0387d92875
Fix Sparc64 ldfa/stfa and float ops with fpr >= 32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03 17:46:29 +00:00
3391c81801
Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 19:38:12 +00:00
ee0b03fd85
Fix Sparc64 wrasr instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3297 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 16:37:00 +00:00
40ce0a9a8f
CPU boot mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 19:44:09 +00:00
81ad8ba242
Rework ASI instructions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21 19:10:53 +00:00
0f8a249a0b
Detabify
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 14:54:22 +00:00
5fafdf24ef
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16 21:08:06 +00:00
ce62e5ba09
Fix tb->size mishandling, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-11 10:04:58 +00:00
6ea4a6c875
More alignment checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3060 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11 16:43:30 +00:00
1ad21e6969
Save state in Sparc64 return op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3054 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-08 19:48:40 +00:00
dc011987f2
Use unsigned 32-bit load for ld/lduw
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3051 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:50:33 +00:00
6ef905f69c
Fix wrong number of clean/saveable windows, match Linux startup register values
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 20:48:42 +00:00
46d38ba89d
Fix Sparc64 movr
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3045 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-04 20:22:35 +00:00
46525e1fbe
Drop unused parameters
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3022 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-25 19:52:58 +00:00
2f2ecb83d7
Fix Sparc64 prefetcha op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2978 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-10 20:26:38 +00:00
20c9f095c4
Implement Sparc64 CPU timers using ptimers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-25 18:50:28 +00:00
6c36d3fa86
Enable faults for unassigned memory accesses and unimplemented ASIs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-17 19:30:10 +00:00
2371aaa295
Fix pc/npc for unaligned load/stores, maybe other exceptions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2780 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 17:01:15 +00:00
5ef62c5c42
More Sparc32 CPUs
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2744 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:54:32 +00:00
32af58f95f
Fix CPU type zapped by system_reset
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2743 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 19:49:15 +00:00
e9ebed4d41
Sparc64 update: more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 19:14:52 +00:00
a68156d016
Constification
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2711 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22 12:45:28 +00:00
3299908c83
Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2656 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:49:56 +00:00
d2889a3efc
Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 15:46:16 +00:00
9b3c35e0e6
cpu_get_phys_page_debug should return target_phys_addr_t
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instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
417454b032
Full implementation of IEEE exceptions (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 20:03:29 +00:00
c185970a0e
Enforce even float register pair for double register ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 20:02:09 +00:00
9143e59842
Fix stdfq op (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2604 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 18:12:08 +00:00
a4d17f1992
Fix co-processor branch and store ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2603 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 18:09:15 +00:00
4f14e88c59
Fix off-by-one error
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2573 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 16:23:36 +00:00
e0353fe250
Add SparcStation-10 machine
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2571 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:55:28 +00:00
8a08f9a809
Fix Sparc shift ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2569 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:38:17 +00:00
d4218d996d
Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ldd/std and illegal cwp on wrpsr (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2568 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:15:36 +00:00
fcc72045e8
Fix Sparc co-processor ops (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2567 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:08:21 +00:00
65fe7b09a5
Fix Sparc ASR handling (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2566 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 15:05:09 +00:00
62724a3773
Sparc32/64 CPU selection
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2534 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-25 07:55:52 +00:00
3e736bf4b4
Upgrade Sparc FPU version (based on patch by Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2532 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-24 13:24:09 +00:00
e32f879d1b
Sparc tagged operations (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2531 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23 20:01:20 +00:00
9bad0425a0
Fix Sparc branches, original patch by Aurelien Jarno
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2523 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-21 19:45:50 +00:00
c688a6eb18
wrwim insn fix (Paul Robinson)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2200 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-23 21:37:34 +00:00
5ef54116ea
Sparc64 user emulator fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2063 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-18 21:14:09 +00:00
725cb90bf7
sparc64 fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2062 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-18 21:12:17 +00:00
a80dde0837
SPARC FPU optimization (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2023 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26 19:53:29 +00:00
6b1575b746
cpu_get_phys_page_debug fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2010 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25 15:33:53 +00:00
13846e700f
Sparc64 BPr branch target fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2003 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-23 21:01:56 +00:00
ee6c0b51e9
sparc branch fix (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1999 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21 18:26:15 +00:00
ded3ab80dd
Sparc64 insn fixes (Blue Swirl).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1993 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-18 19:36:58 +00:00
55e4f6644e
FPU fix (Joerg Platte)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1962 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 12:37:58 +00:00
c68ea7043f
cpu_single_env usage fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1644 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21 23:33:12 +00:00
6e256c935c
use direct jump only for jumps in the same page
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:05 +00:00
9e61bde56a
sparc merge (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1620 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-11 00:24:58 +00:00
8346901560
sparc64 fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-23 14:27:54 +00:00
3475187dd8
sparc64 marge (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:31:34 +00:00
d39c0b990a
fixed MMU bug on code page boundary
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1362 c046a42c-6fe2-441c-8c8c-71466251a162
2005-04-10 14:40:58 +00:00
c3278b7bf0
sparc exception fix (we go up to the shell prompt)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1343 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-20 12:43:29 +00:00
d785e6be4d
x86_64 support
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1320 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-01 22:33:42 +00:00
0bee699e1d
fixed jmpl, rett and call
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1292 c046a42c-6fe2-441c-8c8c-71466251a162
2005-02-13 20:11:30 +00:00
af7bf89b1f
initial sparc64 support - sparc fixes (Blue Swirl)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1251 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-30 22:39:04 +00:00
bb05683b12
flush TLBs at cpu reset
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1248 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-28 00:01:00 +00:00
Blue Swirl