qemu-irix/target-mips
Leon Alrae 00fd8904f6 target-mips: fix broken snapshotting
Recently added CP0.BadInstr and CP0.BadInstrP registers ended up in cpu_load()
under different offset than in cpu_save(). These and all registers between were
incorrectly restored.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
(cherry picked from commit b40a1530f2)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2015-03-01 18:09:42 -06:00
..
Makefile.objs target-mips: add msa_helper.c 2014-11-03 11:48:35 +00:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
cpu-qom.h target-mips: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h mips: Add macros for CP0.Config3 and CP0.Config4 bits 2014-11-07 14:15:28 +00:00
dsp_helper.c target-mips/dsp_helper.c: Add ifdef guards around various functions 2014-10-14 13:29:14 +01:00
gdbstub.c target-mips: remove duplicated mips/ieee mapping function 2014-11-03 11:48:35 +00:00
helper.c target-mips: add MSA exceptions 2014-11-03 11:48:35 +00:00
helper.h target-mips: add MSA MI10 format instructions 2014-11-03 11:48:35 +00:00
kvm.c mips/kvm: Disable FPU on reset with KVM 2014-07-09 18:17:04 +02:00
kvm_mips.h target-mips: kvm: Add main KVM support for MIPS 2014-06-18 16:58:52 +02:00
lmi_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
machine.c target-mips: fix broken snapshotting 2015-03-01 18:09:42 -06:00
mips-defs.h target-mips: add MSA defines and data structure 2014-11-03 11:48:35 +00:00
msa_helper.c target-mips: add MSA 2RF format instructions 2014-11-03 11:48:35 +00:00
op_helper.c target-mips: add MSA MI10 format instructions 2014-11-03 11:48:35 +00:00
translate.c target-mips: fix multiple TCG registers covering same data 2014-11-07 14:15:28 +00:00
translate_init.c mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits 2014-11-07 14:15:28 +00:00