qemu-irix/target-arm
Peter Maydell cab1cc7245 target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF
The v8 ARM ARM defines that unused spaces in the ID_AA64* system
register ranges are Reserved and must RAZ, rather than being UNDEF.
Implement this.

In particular, ARM v8.2 adds a new feature register ID_AA64MMFR2,
and newer versions of the Linux kernel will attempt to read this,
which causes them not to boot up on versions of QEMU missing this fix.

Since the encoding .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 6
is actually defined in ARMv8 (as ID_MMFR4), we give it an entry in
the ARMCPU struct so CPUs can override it, though since none do
this too will just RAZ.

Cc: qemu-stable@nongnu.org
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1455890863-11203-1-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
(cherry picked from commit e20d84c140)

Conflicts:
	target-arm/helper.c

* remove context dep on 4054bfa9

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2016-03-17 17:48:45 -05:00
..
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
arm-semi.c target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block 2015-09-07 10:39:28 +01:00
arm_ldst.h
cpu-qom.h target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2016-03-17 17:48:45 -05:00
cpu.c qdev: Protect device-list-properties against broken devices 2015-10-09 15:25:57 +02:00
cpu.h target-arm: Add HPFAR_EL2 2015-10-27 15:59:46 +00:00
cpu64.c target-arm: Fix REVIDR reset value 2015-06-15 18:06:08 +01:00
crypto_helper.c crypto: move built-in AES implementation into crypto/ 2015-07-07 12:04:13 +02:00
gdbstub.c
gdbstub64.c
helper-a64.c target-arm: Use new revbit functions 2015-09-15 07:45:33 -07:00
helper-a64.h
helper.c target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2016-03-17 17:48:45 -05:00
helper.h target-arm: Fix CPU breakpoint handling 2015-10-16 14:48:56 +01:00
internals.h target-arm: Add and use symbolic names for register banks 2015-11-03 13:49:41 +00:00
iwmmxt_helper.c
kvm-consts.h target-arm/kvm64: Add cortex-a53 cpu support 2015-06-15 18:06:08 +01:00
kvm-stub.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
kvm.c kvm: Pass PCI device pointer to MSI routing functions 2015-10-19 10:13:07 +02:00
kvm32.c target-arm: Add and use symbolic names for register banks 2015-11-03 13:49:41 +00:00
kvm64.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm_arm.h hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
machine.c hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
neon_helper.c
op_addsub.h
op_helper.c target-arm: Fix gdb singlestep handling in arm_debug_excp_handler() 2015-11-10 13:37:32 +00:00
psci.c target-arm: Use the kernel's idea of MPIDR if we're using KVM 2015-06-15 18:06:09 +01:00
translate-a64.c target-arm/translate-a64.c: Correct unallocated checks for ldst_excl 2015-11-24 14:12:15 +00:00
translate.c target-arm: Update condexec before arch BP check in AA32 translation 2015-11-19 12:51:08 +00:00
translate.h tcg: Remove gen_intermediate_code_pc 2015-10-07 20:36:52 +11:00