678 lines
18 KiB
C
678 lines
18 KiB
C
/*
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* M68K helper routines
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*
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* Copyright (c) 2007 CodeSourcery
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "exec/semihost.h"
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#if defined(CONFIG_USER_ONLY)
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void m68k_cpu_do_interrupt(CPUState *cs)
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{
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cs->exception_index = -1;
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}
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static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
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{
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}
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#else
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (unlikely(ret)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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cpu_restore_state(cs, retaddr);
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}
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cpu_loop_exit(cs);
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}
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}
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static void do_rte(CPUM68KState *env)
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{
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uint32_t sp;
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uint32_t fmt;
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sp = env->aregs[7];
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fmt = cpu_ldl_kernel(env, sp);
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env->pc = cpu_ldl_kernel(env, sp + 4);
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sp |= (fmt >> 28) & 3;
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env->aregs[7] = sp + 8;
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helper_set_sr(env, fmt);
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}
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static void do_interrupt_all(CPUM68KState *env, int is_hw)
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{
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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uint32_t sp;
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uint32_t fmt;
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uint32_t retaddr;
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uint32_t vector;
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fmt = 0;
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retaddr = env->pc;
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if (!is_hw) {
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switch (cs->exception_index) {
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case EXCP_RTE:
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/* Return from an exception. */
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do_rte(env);
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return;
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case EXCP_HALT_INSN:
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if (semihosting_enabled()
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&& (env->sr & SR_S) != 0
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&& (env->pc & 3) == 0
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&& cpu_lduw_code(env, env->pc - 4) == 0x4e71
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&& cpu_ldl_code(env, env->pc) == 0x4e7bf000) {
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env->pc += 4;
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do_m68k_semihosting(env, env->dregs[0]);
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return;
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}
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cs->halted = 1;
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cs->exception_index = EXCP_HLT;
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cpu_loop_exit(cs);
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return;
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}
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if (cs->exception_index >= EXCP_TRAP0
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&& cs->exception_index <= EXCP_TRAP15) {
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/* Move the PC after the trap instruction. */
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retaddr += 2;
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}
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}
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vector = cs->exception_index << 2;
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fmt |= 0x40000000;
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fmt |= vector << 16;
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fmt |= env->sr;
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fmt |= cpu_m68k_get_ccr(env);
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env->sr |= SR_S;
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if (is_hw) {
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env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
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env->sr &= ~SR_M;
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}
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m68k_switch_sp(env);
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sp = env->aregs[7];
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fmt |= (sp & 3) << 28;
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/* ??? This could cause MMU faults. */
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sp &= ~3;
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sp -= 4;
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cpu_stl_kernel(env, sp, retaddr);
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sp -= 4;
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cpu_stl_kernel(env, sp, fmt);
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env->aregs[7] = sp;
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/* Jump to vector. */
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env->pc = cpu_ldl_kernel(env, env->vbr + vector);
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}
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void m68k_cpu_do_interrupt(CPUState *cs)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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CPUM68KState *env = &cpu->env;
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do_interrupt_all(env, 0);
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}
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static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
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{
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do_interrupt_all(env, 1);
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}
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#endif
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bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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{
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M68kCPU *cpu = M68K_CPU(cs);
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CPUM68KState *env = &cpu->env;
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if (interrupt_request & CPU_INTERRUPT_HARD
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&& ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
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/* Real hardware gets the interrupt vector via an IACK cycle
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at this point. Current emulated hardware doesn't rely on
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this, so we provide/save the vector when the interrupt is
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first signalled. */
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cs->exception_index = env->pending_vector;
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do_interrupt_m68k_hardirq(env);
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return true;
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}
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return false;
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}
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static void raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr)
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{
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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cs->exception_index = tt;
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cpu_loop_exit_restore(cs, raddr);
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}
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static void raise_exception(CPUM68KState *env, int tt)
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{
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raise_exception_ra(env, tt, 0);
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}
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void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
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{
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raise_exception(env, tt);
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}
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void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den)
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{
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uint32_t num = env->dregs[destr];
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uint32_t quot, rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0; /* always cleared, even if overflow */
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if (quot > 0xffff) {
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env->cc_v = -1;
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/* real 68040 keeps N and unset Z on overflow,
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* whereas documentation says "undefined"
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*/
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env->cc_z = 1;
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return;
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}
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env->dregs[destr] = deposit32(quot, 16, 16, rem);
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env->cc_z = (int16_t)quot;
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env->cc_n = (int16_t)quot;
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env->cc_v = 0;
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}
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void HELPER(divsw)(CPUM68KState *env, int destr, int32_t den)
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{
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int32_t num = env->dregs[destr];
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uint32_t quot, rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0; /* always cleared, even if overflow */
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if (quot != (int16_t)quot) {
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env->cc_v = -1;
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/* nothing else is modified */
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/* real 68040 keeps N and unset Z on overflow,
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* whereas documentation says "undefined"
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*/
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env->cc_z = 1;
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return;
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}
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env->dregs[destr] = deposit32(quot, 16, 16, rem);
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env->cc_z = (int16_t)quot;
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env->cc_n = (int16_t)quot;
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env->cc_v = 0;
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}
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void HELPER(divul)(CPUM68KState *env, int numr, int regr, uint32_t den)
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{
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uint32_t num = env->dregs[numr];
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uint32_t quot, rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0;
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env->cc_z = quot;
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env->cc_n = quot;
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env->cc_v = 0;
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if (m68k_feature(env, M68K_FEATURE_CF_ISA_A)) {
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if (numr == regr) {
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env->dregs[numr] = quot;
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} else {
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env->dregs[regr] = rem;
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}
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} else {
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env->dregs[regr] = rem;
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env->dregs[numr] = quot;
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}
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}
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void HELPER(divsl)(CPUM68KState *env, int numr, int regr, int32_t den)
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{
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int32_t num = env->dregs[numr];
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int32_t quot, rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0;
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env->cc_z = quot;
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env->cc_n = quot;
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env->cc_v = 0;
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if (m68k_feature(env, M68K_FEATURE_CF_ISA_A)) {
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if (numr == regr) {
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env->dregs[numr] = quot;
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} else {
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env->dregs[regr] = rem;
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}
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} else {
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env->dregs[regr] = rem;
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env->dregs[numr] = quot;
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}
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}
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void HELPER(divull)(CPUM68KState *env, int numr, int regr, uint32_t den)
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{
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uint64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]);
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uint64_t quot;
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uint32_t rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0; /* always cleared, even if overflow */
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if (quot > 0xffffffffULL) {
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env->cc_v = -1;
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/* real 68040 keeps N and unset Z on overflow,
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* whereas documentation says "undefined"
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*/
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env->cc_z = 1;
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return;
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}
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env->cc_z = quot;
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env->cc_n = quot;
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env->cc_v = 0;
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/*
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* If Dq and Dr are the same, the quotient is returned.
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* therefore we set Dq last.
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*/
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env->dregs[regr] = rem;
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env->dregs[numr] = quot;
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}
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void HELPER(divsll)(CPUM68KState *env, int numr, int regr, int32_t den)
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{
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int64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]);
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int64_t quot;
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int32_t rem;
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if (den == 0) {
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raise_exception_ra(env, EXCP_DIV0, GETPC());
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}
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quot = num / den;
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rem = num % den;
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env->cc_c = 0; /* always cleared, even if overflow */
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if (quot != (int32_t)quot) {
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env->cc_v = -1;
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/* real 68040 keeps N and unset Z on overflow,
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* whereas documentation says "undefined"
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*/
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env->cc_z = 1;
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return;
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}
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env->cc_z = quot;
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env->cc_n = quot;
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env->cc_v = 0;
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/*
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* If Dq and Dr are the same, the quotient is returned.
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* therefore we set Dq last.
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*/
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env->dregs[regr] = rem;
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env->dregs[numr] = quot;
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}
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void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
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{
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uint32_t Dc1 = extract32(regs, 9, 3);
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uint32_t Dc2 = extract32(regs, 6, 3);
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uint32_t Du1 = extract32(regs, 3, 3);
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uint32_t Du2 = extract32(regs, 0, 3);
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int16_t c1 = env->dregs[Dc1];
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int16_t c2 = env->dregs[Dc2];
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int16_t u1 = env->dregs[Du1];
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int16_t u2 = env->dregs[Du2];
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int16_t l1, l2;
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uintptr_t ra = GETPC();
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if (parallel_cpus) {
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/* Tell the main loop we need to serialize this insn. */
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cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
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} else {
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/* We're executing in a serial context -- no need to be atomic. */
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l1 = cpu_lduw_data_ra(env, a1, ra);
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l2 = cpu_lduw_data_ra(env, a2, ra);
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if (l1 == c1 && l2 == c2) {
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cpu_stw_data_ra(env, a1, u1, ra);
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cpu_stw_data_ra(env, a2, u2, ra);
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}
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}
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if (c1 != l1) {
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env->cc_n = l1;
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env->cc_v = c1;
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} else {
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env->cc_n = l2;
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env->cc_v = c2;
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}
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env->cc_op = CC_OP_CMPW;
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env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1);
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env->dregs[Dc2] = deposit32(env->dregs[Dc2], 0, 16, l2);
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}
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void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
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{
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uint32_t Dc1 = extract32(regs, 9, 3);
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uint32_t Dc2 = extract32(regs, 6, 3);
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uint32_t Du1 = extract32(regs, 3, 3);
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uint32_t Du2 = extract32(regs, 0, 3);
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uint32_t c1 = env->dregs[Dc1];
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uint32_t c2 = env->dregs[Dc2];
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uint32_t u1 = env->dregs[Du1];
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uint32_t u2 = env->dregs[Du2];
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uint32_t l1, l2;
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uintptr_t ra = GETPC();
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#if defined(CONFIG_ATOMIC64) && !defined(CONFIG_USER_ONLY)
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int mmu_idx = cpu_mmu_index(env, 0);
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TCGMemOpIdx oi;
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#endif
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if (parallel_cpus) {
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/* We're executing in a parallel context -- must be atomic. */
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#ifdef CONFIG_ATOMIC64
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uint64_t c, u, l;
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if ((a1 & 7) == 0 && a2 == a1 + 4) {
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c = deposit64(c2, 32, 32, c1);
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u = deposit64(u2, 32, 32, u1);
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#ifdef CONFIG_USER_ONLY
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l = helper_atomic_cmpxchgq_be(env, a1, c, u);
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#else
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oi = make_memop_idx(MO_BEQ, mmu_idx);
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l = helper_atomic_cmpxchgq_be_mmu(env, a1, c, u, oi, ra);
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#endif
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l1 = l >> 32;
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l2 = l;
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} else if ((a2 & 7) == 0 && a1 == a2 + 4) {
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c = deposit64(c1, 32, 32, c2);
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u = deposit64(u1, 32, 32, u2);
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#ifdef CONFIG_USER_ONLY
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l = helper_atomic_cmpxchgq_be(env, a2, c, u);
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#else
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oi = make_memop_idx(MO_BEQ, mmu_idx);
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l = helper_atomic_cmpxchgq_be_mmu(env, a2, c, u, oi, ra);
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#endif
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l2 = l >> 32;
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l1 = l;
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} else
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#endif
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{
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/* Tell the main loop we need to serialize this insn. */
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cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
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}
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} else {
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/* We're executing in a serial context -- no need to be atomic. */
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l1 = cpu_ldl_data_ra(env, a1, ra);
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l2 = cpu_ldl_data_ra(env, a2, ra);
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if (l1 == c1 && l2 == c2) {
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cpu_stl_data_ra(env, a1, u1, ra);
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cpu_stl_data_ra(env, a2, u2, ra);
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}
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}
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if (c1 != l1) {
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env->cc_n = l1;
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env->cc_v = c1;
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} else {
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env->cc_n = l2;
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env->cc_v = c2;
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}
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env->cc_op = CC_OP_CMPL;
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env->dregs[Dc1] = l1;
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env->dregs[Dc2] = l2;
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}
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struct bf_data {
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uint32_t addr;
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uint32_t bofs;
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uint32_t blen;
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uint32_t len;
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};
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static struct bf_data bf_prep(uint32_t addr, int32_t ofs, uint32_t len)
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{
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int bofs, blen;
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/* Bound length; map 0 to 32. */
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len = ((len - 1) & 31) + 1;
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/* Note that ofs is signed. */
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addr += ofs / 8;
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bofs = ofs % 8;
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if (bofs < 0) {
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bofs += 8;
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addr -= 1;
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}
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/* Compute the number of bytes required (minus one) to
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satisfy the bitfield. */
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blen = (bofs + len - 1) / 8;
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/* Canonicalize the bit offset for data loaded into a 64-bit big-endian
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word. For the cases where BLEN is not a power of 2, adjust ADDR so
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that we can use the next power of two sized load without crossing a
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page boundary, unless the field itself crosses the boundary. */
|
|
switch (blen) {
|
|
case 0:
|
|
bofs += 56;
|
|
break;
|
|
case 1:
|
|
bofs += 48;
|
|
break;
|
|
case 2:
|
|
if (addr & 1) {
|
|
bofs += 8;
|
|
addr -= 1;
|
|
}
|
|
/* fallthru */
|
|
case 3:
|
|
bofs += 32;
|
|
break;
|
|
case 4:
|
|
if (addr & 3) {
|
|
bofs += 8 * (addr & 3);
|
|
addr &= -4;
|
|
}
|
|
break;
|
|
default:
|
|
g_assert_not_reached();
|
|
}
|
|
|
|
return (struct bf_data){
|
|
.addr = addr,
|
|
.bofs = bofs,
|
|
.blen = blen,
|
|
.len = len,
|
|
};
|
|
}
|
|
|
|
static uint64_t bf_load(CPUM68KState *env, uint32_t addr, int blen,
|
|
uintptr_t ra)
|
|
{
|
|
switch (blen) {
|
|
case 0:
|
|
return cpu_ldub_data_ra(env, addr, ra);
|
|
case 1:
|
|
return cpu_lduw_data_ra(env, addr, ra);
|
|
case 2:
|
|
case 3:
|
|
return cpu_ldl_data_ra(env, addr, ra);
|
|
case 4:
|
|
return cpu_ldq_data_ra(env, addr, ra);
|
|
default:
|
|
g_assert_not_reached();
|
|
}
|
|
}
|
|
|
|
static void bf_store(CPUM68KState *env, uint32_t addr, int blen,
|
|
uint64_t data, uintptr_t ra)
|
|
{
|
|
switch (blen) {
|
|
case 0:
|
|
cpu_stb_data_ra(env, addr, data, ra);
|
|
break;
|
|
case 1:
|
|
cpu_stw_data_ra(env, addr, data, ra);
|
|
break;
|
|
case 2:
|
|
case 3:
|
|
cpu_stl_data_ra(env, addr, data, ra);
|
|
break;
|
|
case 4:
|
|
cpu_stq_data_ra(env, addr, data, ra);
|
|
break;
|
|
default:
|
|
g_assert_not_reached();
|
|
}
|
|
}
|
|
|
|
uint32_t HELPER(bfexts_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
|
|
return (int64_t)(data << d.bofs) >> (64 - d.len);
|
|
}
|
|
|
|
uint64_t HELPER(bfextu_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
|
|
/* Put CC_N at the top of the high word; put the zero-extended value
|
|
at the bottom of the low word. */
|
|
data <<= d.bofs;
|
|
data >>= 64 - d.len;
|
|
data |= data << (64 - d.len);
|
|
|
|
return data;
|
|
}
|
|
|
|
uint32_t HELPER(bfins_mem)(CPUM68KState *env, uint32_t addr, uint32_t val,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
uint64_t mask = -1ull << (64 - d.len) >> d.bofs;
|
|
|
|
data = (data & ~mask) | (((uint64_t)val << (64 - d.len)) >> d.bofs);
|
|
|
|
bf_store(env, d.addr, d.blen, data, ra);
|
|
|
|
/* The field at the top of the word is also CC_N for CC_OP_LOGIC. */
|
|
return val << (32 - d.len);
|
|
}
|
|
|
|
uint32_t HELPER(bfchg_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
uint64_t mask = -1ull << (64 - d.len) >> d.bofs;
|
|
|
|
bf_store(env, d.addr, d.blen, data ^ mask, ra);
|
|
|
|
return ((data & mask) << d.bofs) >> 32;
|
|
}
|
|
|
|
uint32_t HELPER(bfclr_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
uint64_t mask = -1ull << (64 - d.len) >> d.bofs;
|
|
|
|
bf_store(env, d.addr, d.blen, data & ~mask, ra);
|
|
|
|
return ((data & mask) << d.bofs) >> 32;
|
|
}
|
|
|
|
uint32_t HELPER(bfset_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
uint64_t mask = -1ull << (64 - d.len) >> d.bofs;
|
|
|
|
bf_store(env, d.addr, d.blen, data | mask, ra);
|
|
|
|
return ((data & mask) << d.bofs) >> 32;
|
|
}
|
|
|
|
uint32_t HELPER(bfffo_reg)(uint32_t n, uint32_t ofs, uint32_t len)
|
|
{
|
|
return (n ? clz32(n) : len) + ofs;
|
|
}
|
|
|
|
uint64_t HELPER(bfffo_mem)(CPUM68KState *env, uint32_t addr,
|
|
int32_t ofs, uint32_t len)
|
|
{
|
|
uintptr_t ra = GETPC();
|
|
struct bf_data d = bf_prep(addr, ofs, len);
|
|
uint64_t data = bf_load(env, d.addr, d.blen, ra);
|
|
uint64_t mask = -1ull << (64 - d.len) >> d.bofs;
|
|
uint64_t n = (data & mask) << d.bofs;
|
|
uint32_t ffo = helper_bfffo_reg(n >> 32, ofs, d.len);
|
|
|
|
/* Return FFO in the low word and N in the high word.
|
|
Note that because of MASK and the shift, the low word
|
|
is already zero. */
|
|
return n | ffo;
|
|
}
|