Cédric Le Goater a03cb1daf1 aspeed: add support for the SMC segment registers ... The SMC controller on the Aspeed SoC has a set of registers to configure the mapping of each flash module in the SoC address space. Writing to these registers triggers a remap of the memory region and the spec requires a certain number of checks before doing so. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1474977462-28032-7-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2016-10-17 19:22:17 +01:00
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Makefile.objs	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
aspeed_smc.c	aspeed: add support for the SMC segment registers	2016-10-17 19:22:17 +01:00
imx_spi.c	imx: Use 'const char', not 'char const'	2016-09-22 18:13:09 +01:00
omap_spi.c	…
pl022.c	hw: explicitly include qemu/log.h	2016-05-19 16:42:29 +02:00
ssi.c	ssi: change ssi_slave_init to be a realize ops	2016-07-04 13:15:22 +01:00
stm32f2xx_spi.c	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
xilinx_spi.c	…
xilinx_spips.c	…