28 lines
		
	
	
		
			712 B
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			28 lines
		
	
	
		
			712 B
		
	
	
	
		
			C
		
	
	
	
| #if !defined (__QEMU_MIPS_DEFS_H__)
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| #define __QEMU_MIPS_DEFS_H__
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| 
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| /* If we want to use 64 bits host regs... */
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| //#define USE_64BITS_REGS
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| /* If we want to use host float regs... */
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| //#define USE_HOST_FLOAT_REGS
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| 
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| /* real pages are variable size... */
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| #define TARGET_PAGE_BITS 12
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| /* Uses MIPS R4Kc TLB model */
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| #define MIPS_USES_R4K_TLB
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| #define MIPS_TLB_NB 16
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| #define MIPS_TLB_MAX 128
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| 
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| #ifdef TARGET_MIPS64
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| #define TARGET_LONG_BITS 64
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| #else
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| #define TARGET_LONG_BITS 32
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| #endif
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| 
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| /* Strictly follow the architecture standard: Disallow "special"
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|    instruction handling for PMON/SPIM, force cycle-dependent
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|    Count/Compare maintenance. */
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| //#define MIPS_STRICT_STANDARD 1
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| 
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| #endif /* !defined (__QEMU_MIPS_DEFS_H__) */
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