176 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			176 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  *  QEMU model of the Milkymist High Performance Dynamic Memory Controller.
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|  *
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|  *  Copyright (c) 2010 Michael Walle <michael@walle.cc>
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|  *
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|  * This library is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2 of the License, or (at your option) any later version.
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|  *
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|  * This library is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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|  *
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|  *
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|  * Specification available at:
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|  *   http://milkymist.walle.cc/socdoc/hpdmc.pdf
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|  */
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| 
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| #include "qemu/osdep.h"
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| #include "hw/hw.h"
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| #include "hw/sysbus.h"
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| #include "trace.h"
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| #include "qemu/error-report.h"
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| 
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| enum {
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|     R_SYSTEM = 0,
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|     R_BYPASS,
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|     R_TIMING,
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|     R_IODELAY,
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|     R_MAX
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| };
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| 
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| enum {
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|     IODELAY_DQSDELAY_RDY = (1<<5),
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|     IODELAY_PLL1_LOCKED  = (1<<6),
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|     IODELAY_PLL2_LOCKED  = (1<<7),
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| };
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| 
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| #define TYPE_MILKYMIST_HPDMC "milkymist-hpdmc"
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| #define MILKYMIST_HPDMC(obj) \
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|     OBJECT_CHECK(MilkymistHpdmcState, (obj), TYPE_MILKYMIST_HPDMC)
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| 
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| struct MilkymistHpdmcState {
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|     SysBusDevice parent_obj;
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| 
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|     MemoryRegion regs_region;
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| 
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|     uint32_t regs[R_MAX];
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| };
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| typedef struct MilkymistHpdmcState MilkymistHpdmcState;
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| 
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| static uint64_t hpdmc_read(void *opaque, hwaddr addr,
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|                            unsigned size)
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| {
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|     MilkymistHpdmcState *s = opaque;
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|     uint32_t r = 0;
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| 
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|     addr >>= 2;
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|     switch (addr) {
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|     case R_SYSTEM:
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|     case R_BYPASS:
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|     case R_TIMING:
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|     case R_IODELAY:
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|         r = s->regs[addr];
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|         break;
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| 
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|     default:
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|         error_report("milkymist_hpdmc: read access to unknown register 0x"
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|                 TARGET_FMT_plx, addr << 2);
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|         break;
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|     }
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| 
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|     trace_milkymist_hpdmc_memory_read(addr << 2, r);
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| 
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|     return r;
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| }
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| 
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| static void hpdmc_write(void *opaque, hwaddr addr, uint64_t value,
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|                         unsigned size)
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| {
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|     MilkymistHpdmcState *s = opaque;
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| 
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|     trace_milkymist_hpdmc_memory_write(addr, value);
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| 
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|     addr >>= 2;
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|     switch (addr) {
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|     case R_SYSTEM:
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|     case R_BYPASS:
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|     case R_TIMING:
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|         s->regs[addr] = value;
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|         break;
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|     case R_IODELAY:
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|         /* ignore writes */
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|         break;
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| 
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|     default:
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|         error_report("milkymist_hpdmc: write access to unknown register 0x"
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|                 TARGET_FMT_plx, addr << 2);
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|         break;
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|     }
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| }
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| 
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| static const MemoryRegionOps hpdmc_mmio_ops = {
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|     .read = hpdmc_read,
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|     .write = hpdmc_write,
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|     .valid = {
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|         .min_access_size = 4,
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|         .max_access_size = 4,
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|     },
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|     .endianness = DEVICE_NATIVE_ENDIAN,
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| };
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| 
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| static void milkymist_hpdmc_reset(DeviceState *d)
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| {
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|     MilkymistHpdmcState *s = MILKYMIST_HPDMC(d);
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|     int i;
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| 
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|     for (i = 0; i < R_MAX; i++) {
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|         s->regs[i] = 0;
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|     }
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| 
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|     /* defaults */
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|     s->regs[R_IODELAY] = IODELAY_DQSDELAY_RDY | IODELAY_PLL1_LOCKED
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|                          | IODELAY_PLL2_LOCKED;
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| }
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| 
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| static int milkymist_hpdmc_init(SysBusDevice *dev)
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| {
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|     MilkymistHpdmcState *s = MILKYMIST_HPDMC(dev);
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| 
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|     memory_region_init_io(&s->regs_region, OBJECT(dev), &hpdmc_mmio_ops, s,
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|             "milkymist-hpdmc", R_MAX * 4);
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|     sysbus_init_mmio(dev, &s->regs_region);
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| 
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|     return 0;
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| }
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| 
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| static const VMStateDescription vmstate_milkymist_hpdmc = {
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|     .name = "milkymist-hpdmc",
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|     .version_id = 1,
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|     .minimum_version_id = 1,
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|     .fields = (VMStateField[]) {
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|         VMSTATE_UINT32_ARRAY(regs, MilkymistHpdmcState, R_MAX),
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|         VMSTATE_END_OF_LIST()
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|     }
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| };
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| 
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| static void milkymist_hpdmc_class_init(ObjectClass *klass, void *data)
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| {
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|     DeviceClass *dc = DEVICE_CLASS(klass);
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|     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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| 
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|     k->init = milkymist_hpdmc_init;
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|     dc->reset = milkymist_hpdmc_reset;
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|     dc->vmsd = &vmstate_milkymist_hpdmc;
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| }
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| 
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| static const TypeInfo milkymist_hpdmc_info = {
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|     .name          = TYPE_MILKYMIST_HPDMC,
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|     .parent        = TYPE_SYS_BUS_DEVICE,
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|     .instance_size = sizeof(MilkymistHpdmcState),
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|     .class_init    = milkymist_hpdmc_class_init,
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| };
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| 
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| static void milkymist_hpdmc_register_types(void)
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| {
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|     type_register_static(&milkymist_hpdmc_info);
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| }
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| 
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| type_init(milkymist_hpdmc_register_types)
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