184 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			184 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
| #include "hw.h"
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| #include "sh.h"
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| #include "sysemu.h"
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| #include "loader.h"
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| 
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| #define CE1  0x0100
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| #define CE2  0x0200
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| #define RE   0x0400
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| #define WE   0x0800
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| #define ALE  0x1000
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| #define CLE  0x2000
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| #define RDY1 0x4000
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| #define RDY2 0x8000
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| #define RDY(n) ((n) == 0 ? RDY1 : RDY2)
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| 
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| typedef enum { WAIT, READ1, READ2, READ3 } state_t;
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| 
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| typedef struct {
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|     uint8_t *flash_contents;
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|     state_t state;
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|     uint32_t address;
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|     uint8_t address_cycle;
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| } tc58128_dev;
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| 
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| static tc58128_dev tc58128_devs[2];
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| 
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| #define FLASH_SIZE (16*1024*1024)
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| 
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| static void init_dev(tc58128_dev * dev, const char *filename)
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| {
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|     int ret, blocks;
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| 
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|     dev->state = WAIT;
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|     dev->flash_contents = qemu_mallocz(FLASH_SIZE);
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|     memset(dev->flash_contents, 0xff, FLASH_SIZE);
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|     if (!dev->flash_contents) {
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| 	fprintf(stderr, "could not alloc memory for flash\n");
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| 	exit(1);
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|     }
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|     if (filename) {
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| 	/* Load flash image skipping the first block */
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| 	ret = load_image(filename, dev->flash_contents + 528 * 32);
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| 	if (ret < 0) {
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| 	    fprintf(stderr, "ret=%d\n", ret);
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| 	    fprintf(stderr, "qemu: could not load flash image %s\n",
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| 		    filename);
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| 	    exit(1);
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| 	} else {
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| 	    /* Build first block with number of blocks */
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| 	    blocks = (ret + 528 * 32 - 1) / (528 * 32);
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| 	    dev->flash_contents[0] = blocks & 0xff;
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| 	    dev->flash_contents[1] = (blocks >> 8) & 0xff;
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| 	    dev->flash_contents[2] = (blocks >> 16) & 0xff;
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| 	    dev->flash_contents[3] = (blocks >> 24) & 0xff;
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| 	    fprintf(stderr, "loaded %d bytes for %s into flash\n", ret,
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| 		    filename);
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| 	}
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|     }
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| }
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| 
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| static void handle_command(tc58128_dev * dev, uint8_t command)
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| {
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|     switch (command) {
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|     case 0xff:
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| 	fprintf(stderr, "reset flash device\n");
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| 	dev->state = WAIT;
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| 	break;
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|     case 0x00:
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| 	fprintf(stderr, "read mode 1\n");
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| 	dev->state = READ1;
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| 	dev->address_cycle = 0;
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| 	break;
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|     case 0x01:
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| 	fprintf(stderr, "read mode 2\n");
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| 	dev->state = READ2;
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| 	dev->address_cycle = 0;
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| 	break;
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|     case 0x50:
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| 	fprintf(stderr, "read mode 3\n");
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| 	dev->state = READ3;
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| 	dev->address_cycle = 0;
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| 	break;
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|     default:
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| 	fprintf(stderr, "unknown flash command 0x%02x\n", command);
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| 	assert(0);
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|     }
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| }
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| 
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| static void handle_address(tc58128_dev * dev, uint8_t data)
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| {
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|     switch (dev->state) {
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|     case READ1:
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|     case READ2:
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|     case READ3:
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| 	switch (dev->address_cycle) {
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| 	case 0:
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| 	    dev->address = data;
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| 	    if (dev->state == READ2)
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| 		dev->address |= 0x100;
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| 	    else if (dev->state == READ3)
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| 		dev->address |= 0x200;
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| 	    break;
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| 	case 1:
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| 	    dev->address += data * 528 * 0x100;
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| 	    break;
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| 	case 2:
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| 	    dev->address += data * 528;
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| 	    fprintf(stderr, "address pointer in flash: 0x%08x\n",
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| 		    dev->address);
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| 	    break;
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| 	default:
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| 	    /* Invalid data */
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| 	    assert(0);
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| 	}
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| 	dev->address_cycle++;
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| 	break;
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|     default:
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| 	assert(0);
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|     }
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| }
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| 
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| static uint8_t handle_read(tc58128_dev * dev)
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| {
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| #if 0
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|     if (dev->address % 0x100000 == 0)
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| 	fprintf(stderr, "reading flash at address 0x%08x\n", dev->address);
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| #endif
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|     return dev->flash_contents[dev->address++];
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| }
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| 
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| /* We never mark the device as busy, so interrupts cannot be triggered
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|    XXXXX */
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| 
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| static int tc58128_cb(uint16_t porta, uint16_t portb,
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|                       uint16_t * periph_pdtra, uint16_t * periph_portadir,
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|                       uint16_t * periph_pdtrb, uint16_t * periph_portbdir)
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| {
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|     int dev;
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| 
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|     if ((porta & CE1) == 0)
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| 	dev = 0;
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|     else if ((porta & CE2) == 0)
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| 	dev = 1;
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|     else
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| 	return 0;		/* No device selected */
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| 
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|     if ((porta & RE) && (porta & WE)) {
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| 	/* Nothing to do, assert ready and return to input state */
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| 	*periph_portadir &= 0xff00;
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| 	*periph_portadir |= RDY(dev);
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| 	*periph_pdtra |= RDY(dev);
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| 	return 1;
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|     }
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| 
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|     if (porta & CLE) {
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| 	/* Command */
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| 	assert((porta & WE) == 0);
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| 	handle_command(&tc58128_devs[dev], porta & 0x00ff);
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|     } else if (porta & ALE) {
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| 	assert((porta & WE) == 0);
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| 	handle_address(&tc58128_devs[dev], porta & 0x00ff);
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|     } else if ((porta & RE) == 0) {
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| 	*periph_portadir |= 0x00ff;
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| 	*periph_pdtra &= 0xff00;
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| 	*periph_pdtra |= handle_read(&tc58128_devs[dev]);
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|     } else {
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| 	assert(0);
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|     }
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|     return 1;
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| }
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| 
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| static sh7750_io_device tc58128 = {
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|     RE | WE,			/* Port A triggers */
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|     0,				/* Port B triggers */
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|     tc58128_cb			/* Callback */
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| };
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| 
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| int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2)
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| {
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|     init_dev(&tc58128_devs[0], zone1);
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|     init_dev(&tc58128_devs[1], zone2);
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|     return sh7750_register_io_device(s, &tc58128);
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| }
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