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Peter Maydell f1a4694078 target/arm: Migrate MPU_RNR register state for M profile cores 
The PMSAv7 region number register is migrated for R profile
cores using the cpreg scheme, but M profile doesn't use
cpregs, and so we weren't migrating the MPU_RNR register state
at all. Fix that by adding a migration subsection for the
M profile case.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1501153150-19984-6-git-send-email-peter.maydell@linaro.org
 		2017-07-31 13:09:52 +01:00
..
alpha tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
arm target/arm: Migrate MPU_RNR register state for M profile cores 2017-07-31 13:09:52 +01:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
i386 docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k m68k/translate: fix incorrect copy/paste 2017-07-31 13:06:39 +03:00
microblaze tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
mips docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
s390x docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore qemu-system-tricore: segfault when entering "x 0" on the monitor 2017-07-31 13:06:38 +03:00
unicore32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00