qemu-irix/target
Richard Henderson 4bfa602bc2 target/sh4: Handle user-space atomics
For uniprocessors, SH4 uses optimistic restartable atomic sequences.
Upon an interrupt, a real kernel would simply notice magic values in
the registers and reset the PC to the start of the sequence.

For QEMU, we cannot do this in quite the same way.  Instead, we notice
the normal start of such a sequence (mov #-x,r15), and start a new TB
that can be executed under cpu_exec_step_atomic.

Reported-by: Bruno Haible  <bruno@clisp.org>
LP: https://bugs.launchpad.net/bugs/1701971
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170718200255.31647-7-rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2017-07-18 23:39:16 +02:00
..
alpha target/alpha: Use tcg_gen_lookup_and_goto_ptr 2017-06-19 11:11:25 -07:00
arm target/arm: use DISAS_EXIT for eret handling 2017-07-17 13:36:07 +01:00
cris
hppa target/hppa: Use tcg_gen_lookup_and_goto_ptr 2017-06-05 09:25:42 -07:00
i386 i386: add Skylake-Server cpu model 2017-07-17 15:41:30 -03:00
lm32
m68k target/m68k: add fmovem 2017-06-29 20:29:57 +02:00
microblaze target-microblaze: Add CPU version 10.0 2017-07-04 09:22:20 +02:00
mips target/mips: optimize WSBH, DSBH and DSHD 2017-07-17 16:48:21 +02:00
moxie
nios2 target/nios2: Fix 64-bit ilp32 compilation 2017-06-05 09:25:42 -07:00
openrisc
ppc target/ppc: fix CPU hotplug when radix is enabled (TCG) 2017-07-17 15:07:05 +10:00
s390x s390: add z14 cpu model 2017-07-18 21:13:48 +01:00
sh4 target/sh4: Handle user-space atomics 2017-07-18 23:39:16 +02:00
sparc
tilegx migration: Remove unneeded includes of migration/vmstate.h 2017-06-01 18:49:22 +02:00
tricore
unicore32
xtensa char: add backend hotswap handler 2017-07-14 11:04:33 +02:00