qemu-irix/include/exec
Peter Maydell ae49fbbcd8 TCG patch queue
-----BEGIN PGP SIGNATURE-----
 
 iQEcBAABAgAGBQJZ8FmqAAoJEGTfOOivfiFf/78IALolAxDqnbfN5moh76OEy7++
 somg/CahMYl3rIR93bN8QMrNn72evPxdr9OVAjTXy/QTDbK8WDZ6xQ0yzhiNaD5+
 swYuhffcAq4djw6kVkuGB0fDpjF6tRvVP955JYsUp49u06uqKiWYTbwCSAlHKfvP
 yIIn/yOgDwaLFs10fTo+WrxEuSpRKxOGrrYIX3h+zX+cdlOifPAG8SxxKSJKL6OG
 wcKKQjLFpNmRbhqaoUMqD5Q5LebCvdl7Z0HSUakAgp8NVqART7Ix5BzweCP8GL5z
 9qO8Phrgeu9Uz0dTxC+7WTrYDrWvxWmxlbOIy79fVUIt2Z5kHNj7SEWj60cDM8Q=
 =PYec
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171025' into staging

TCG patch queue

# gpg: Signature made Wed 25 Oct 2017 10:30:18 BST
# gpg:                using RSA key 0x64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20171025: (51 commits)
  translate-all: exit from tb_phys_invalidate if qht_remove fails
  tcg: Initialize cpu_env generically
  tcg: enable multiple TCG contexts in softmmu
  tcg: introduce regions to split code_gen_buffer
  translate-all: use qemu_protect_rwx/none helpers
  osdep: introduce qemu_mprotect_rwx/none
  tcg: allocate optimizer temps with tcg_malloc
  tcg: distribute profiling counters across TCGContext's
  tcg: introduce **tcg_ctxs to keep track of all TCGContext's
  gen-icount: fold exitreq_label into TCGContext
  tcg: define tcg_init_ctx and make tcg_ctx a pointer
  tcg: take tb_ctx out of TCGContext
  translate-all: report correct avg host TB size
  exec-all: rename tb_free to tb_remove
  translate-all: use a binary search tree to track TBs in TBContext
  tcg: Remove CF_IGNORE_ICOUNT
  tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK
  cpu-exec: lookup/generate TB outside exclusive region during step_atomic
  tcg: check CF_PARALLEL instead of parallel_cpus
  target/sparc: check CF_PARALLEL instead of parallel_cpus
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-25 16:38:57 +01:00
..
user
address-spaces.h
cpu-all.h accel/tcg: allow to invalidate a write TLB entry immediately 2017-10-20 13:32:10 +02:00
cpu-common.h
cpu-defs.h cputlb: bring back tlb_flush_count under !TLB_DEBUG 2017-10-10 07:37:10 -07:00
cpu_ldst.h
cpu_ldst_template.h
cpu_ldst_useronly_template.h
cputlb.h cputlb: bring back tlb_flush_count under !TLB_DEBUG 2017-10-10 07:37:10 -07:00
exec-all.h exec-all: rename tb_free to tb_remove 2017-10-24 13:53:42 -07:00
gdbstub.h
gen-icount.h tcg: Initialize cpu_env generically 2017-10-24 13:53:42 -07:00
helper-gen.h tcg: Introduce tcgv_{i32,i64,ptr}_{arg,temp} 2017-10-24 21:47:46 +02:00
helper-head.h tcg: Remove GET_TCGV_* and MAKE_TCGV_* 2017-10-24 21:49:30 +02:00
helper-proto.h
helper-tcg.h
hwaddr.h
ioport.h
log.h
memattrs.h memory.h: Move MemTxResult type to memattrs.h 2017-09-04 15:21:54 +01:00
memory-internal.h memory: Rework "info mtree" to print flat views and dispatch trees 2017-09-21 23:19:38 +02:00
memory.h memory: trace FlatView creation and destruction 2017-09-22 01:06:51 +02:00
poison.h
ram_addr.h migration: add bitmap for received page 2017-10-23 18:03:41 +02:00
ramlist.h
semihost.h
softmmu-semi.h
target_page.h
tb-context.h tcg: take tb_ctx out of TCGContext 2017-10-24 13:53:42 -07:00
tb-hash-xx.h tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK 2017-10-24 13:53:41 -07:00
tb-hash.h tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK 2017-10-24 13:53:41 -07:00
tb-lookup.h tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK 2017-10-24 13:53:41 -07:00
translator.h tcg: Add generic translation framework 2017-09-06 08:06:47 -07:00