76 lines
1.9 KiB
C
76 lines
1.9 KiB
C
/*
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* ARM RealView Emulation Baseboard Interrupt Controller
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the GPL.
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*/
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#include "sysbus.h"
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#define GIC_NIRQ 96
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#define NCPU 1
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/* Only a single "CPU" interface is present. */
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static inline int
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gic_get_current_cpu(void)
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{
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return 0;
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}
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#include "arm_gic.c"
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typedef struct {
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gic_state gic;
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MemoryRegion iomem;
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MemoryRegion container;
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} RealViewGICState;
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static uint64_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset,
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unsigned size)
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{
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gic_state *s = (gic_state *)opaque;
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return gic_cpu_read(s, gic_get_current_cpu(), offset);
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}
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static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,
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uint64_t value, unsigned size)
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{
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gic_state *s = (gic_state *)opaque;
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gic_cpu_write(s, gic_get_current_cpu(), offset, value);
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}
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static const MemoryRegionOps realview_gic_cpu_ops = {
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.read = realview_gic_cpu_read,
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.write = realview_gic_cpu_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void realview_gic_map_setup(RealViewGICState *s)
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{
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memory_region_init(&s->container, "realview-gic-container", 0x2000);
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memory_region_init_io(&s->iomem, &realview_gic_cpu_ops, &s->gic,
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"realview-gic", 0x1000);
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memory_region_add_subregion(&s->container, 0, &s->iomem);
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memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
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}
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static int realview_gic_init(SysBusDevice *dev)
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{
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RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
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gic_init(&s->gic);
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realview_gic_map_setup(s);
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sysbus_init_mmio_region(dev, &s->container);
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return 0;
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}
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static void realview_gic_register_devices(void)
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{
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sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
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realview_gic_init);
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}
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device_init(realview_gic_register_devices)
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