404 lines
11 KiB
C
404 lines
11 KiB
C
/*
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* PowerMac MacIO device emulation
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*
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* Copyright (c) 2005-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw/hw.h"
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#include "hw/ppc/mac.h"
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#include "hw/pci/pci.h"
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#include "hw/ppc/mac_dbdma.h"
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#include "hw/char/escc.h"
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#define TYPE_MACIO "macio"
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#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
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typedef struct MacIOState
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{
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/*< private >*/
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PCIDevice parent;
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/*< public >*/
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MemoryRegion bar;
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CUDAState cuda;
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void *dbdma;
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MemoryRegion *pic_mem;
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MemoryRegion *escc_mem;
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} MacIOState;
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#define OLDWORLD_MACIO(obj) \
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OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
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typedef struct OldWorldMacIOState {
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[5];
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MacIONVRAMState nvram;
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MACIOIDEState ide[2];
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} OldWorldMacIOState;
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#define NEWWORLD_MACIO(obj) \
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OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
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typedef struct NewWorldMacIOState {
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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qemu_irq irqs[5];
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MACIOIDEState ide[2];
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} NewWorldMacIOState;
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/*
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* The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
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* while the other one is the normal, current ESCC interface.
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*
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* The magic below creates memory aliases to spawn the escc-legacy device
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* purely by rerouting the respective registers to our escc region. This
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* works because the only difference between the two memory regions is the
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* register layout, not their semantics.
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*
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* Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
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*/
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static void macio_escc_legacy_setup(MacIOState *macio_state)
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{
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MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
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MemoryRegion *bar = &macio_state->bar;
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int i;
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static const int maps[] = {
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0x00, 0x00,
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0x02, 0x20,
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0x04, 0x10,
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0x06, 0x30,
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0x08, 0x40,
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0x0A, 0x50,
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0x60, 0x60,
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0x70, 0x70,
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0x80, 0x70,
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0x90, 0x80,
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0xA0, 0x90,
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0xB0, 0xA0,
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0xC0, 0xB0,
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0xD0, 0xC0,
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0xE0, 0xD0,
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0xF0, 0xE0,
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};
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memory_region_init(escc_legacy, NULL, "escc-legacy", 256);
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for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
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MemoryRegion *port = g_new(MemoryRegion, 1);
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memory_region_init_alias(port, NULL, "escc-legacy-port",
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macio_state->escc_mem, maps[i+1], 0x2);
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memory_region_add_subregion(escc_legacy, maps[i], port);
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}
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memory_region_add_subregion(bar, 0x12000, escc_legacy);
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}
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static void macio_bar_setup(MacIOState *macio_state)
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{
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MemoryRegion *bar = &macio_state->bar;
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if (macio_state->escc_mem) {
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memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
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macio_escc_legacy_setup(macio_state);
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}
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}
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static int macio_common_initfn(PCIDevice *d)
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{
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MacIOState *s = MACIO(d);
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SysBusDevice *sysbus_dev;
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int ret;
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d->config[0x3d] = 0x01; // interrupt on pin 1
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ret = qdev_init(DEVICE(&s->cuda));
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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memory_region_add_subregion(&s->bar, 0x16000,
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sysbus_mmio_get_region(sysbus_dev, 0));
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macio_bar_setup(s);
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pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
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return 0;
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}
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static int macio_initfn_ide(MacIOState *s, MACIOIDEState *ide, qemu_irq irq0,
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qemu_irq irq1, int dmaid)
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{
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SysBusDevice *sysbus_dev;
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sysbus_dev = SYS_BUS_DEVICE(ide);
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sysbus_connect_irq(sysbus_dev, 0, irq0);
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sysbus_connect_irq(sysbus_dev, 1, irq1);
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macio_ide_register_dma(ide, s->dbdma, dmaid);
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return qdev_init(DEVICE(ide));
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}
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static int macio_oldworld_initfn(PCIDevice *d)
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{
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MacIOState *s = MACIO(d);
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OldWorldMacIOState *os = OLDWORLD_MACIO(d);
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SysBusDevice *sysbus_dev;
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int i;
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int cur_irq = 0;
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int ret = macio_common_initfn(d);
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
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ret = qdev_init(DEVICE(&os->nvram));
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
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memory_region_add_subregion(&s->bar, 0x60000,
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sysbus_mmio_get_region(sysbus_dev, 0));
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pmac_format_nvram_partition(&os->nvram, os->nvram.size);
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if (s->pic_mem) {
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/* Heathrow PIC */
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memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
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}
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/* IDE buses */
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for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
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qemu_irq irq0 = os->irqs[cur_irq++];
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qemu_irq irq1 = os->irqs[cur_irq++];
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ret = macio_initfn_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4));
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if (ret < 0) {
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return ret;
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}
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}
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return 0;
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}
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static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
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int index)
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{
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gchar *name;
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object_initialize(ide, ide_size, TYPE_MACIO_IDE);
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qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
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memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
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&ide->mem);
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name = g_strdup_printf("ide[%i]", index);
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object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
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g_free(name);
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}
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static void macio_oldworld_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
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DeviceState *dev;
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int i;
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qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
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object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
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dev = DEVICE(&os->nvram);
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qdev_prop_set_uint32(dev, "size", 0x2000);
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qdev_prop_set_uint32(dev, "it_shift", 4);
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for (i = 0; i < 2; i++) {
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macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
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}
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}
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static void timer_write(void *opaque, hwaddr addr, uint64_t value,
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unsigned size)
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{
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}
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static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
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{
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uint32_t value = 0;
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switch (addr) {
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case 0x38:
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value = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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break;
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case 0x3c:
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value = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 32;
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break;
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}
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return value;
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}
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static const MemoryRegionOps timer_ops = {
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.read = timer_read,
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.write = timer_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static int macio_newworld_initfn(PCIDevice *d)
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{
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MacIOState *s = MACIO(d);
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NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
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SysBusDevice *sysbus_dev;
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MemoryRegion *timer_memory = g_new(MemoryRegion, 1);
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int i;
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int cur_irq = 0;
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int ret = macio_common_initfn(d);
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if (ret < 0) {
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return ret;
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}
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sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
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sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
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if (s->pic_mem) {
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/* OpenPIC */
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memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
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}
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/* IDE buses */
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for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
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qemu_irq irq0 = ns->irqs[cur_irq++];
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qemu_irq irq1 = ns->irqs[cur_irq++];
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ret = macio_initfn_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4));
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if (ret < 0) {
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return ret;
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}
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}
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/* Timer */
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memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
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0x1000);
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memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
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return 0;
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}
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static void macio_newworld_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
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int i;
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qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
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for (i = 0; i < 2; i++) {
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macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
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}
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}
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static void macio_instance_init(Object *obj)
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{
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MacIOState *s = MACIO(obj);
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MemoryRegion *dbdma_mem;
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memory_region_init(&s->bar, NULL, "macio", 0x80000);
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object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
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qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
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object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
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s->dbdma = DBDMA_init(&dbdma_mem);
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memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
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}
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static void macio_oldworld_class_init(ObjectClass *oc, void *data)
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{
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PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
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pdc->init = macio_oldworld_initfn;
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pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
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}
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static void macio_newworld_class_init(ObjectClass *oc, void *data)
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{
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PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
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pdc->init = macio_newworld_initfn;
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pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
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}
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static void macio_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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k->vendor_id = PCI_VENDOR_ID_APPLE;
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k->class_id = PCI_CLASS_OTHERS << 8;
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}
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static const TypeInfo macio_oldworld_type_info = {
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.name = TYPE_OLDWORLD_MACIO,
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.parent = TYPE_MACIO,
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.instance_size = sizeof(OldWorldMacIOState),
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.instance_init = macio_oldworld_init,
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.class_init = macio_oldworld_class_init,
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};
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static const TypeInfo macio_newworld_type_info = {
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.name = TYPE_NEWWORLD_MACIO,
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.parent = TYPE_MACIO,
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.instance_size = sizeof(NewWorldMacIOState),
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.instance_init = macio_newworld_init,
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.class_init = macio_newworld_class_init,
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};
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static const TypeInfo macio_type_info = {
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.name = TYPE_MACIO,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(MacIOState),
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.instance_init = macio_instance_init,
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.abstract = true,
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.class_init = macio_class_init,
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};
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static void macio_register_types(void)
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{
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type_register_static(&macio_type_info);
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type_register_static(&macio_oldworld_type_info);
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type_register_static(&macio_newworld_type_info);
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}
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type_init(macio_register_types)
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void macio_init(PCIDevice *d,
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MemoryRegion *pic_mem,
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MemoryRegion *escc_mem)
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{
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MacIOState *macio_state = MACIO(d);
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macio_state->pic_mem = pic_mem;
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macio_state->escc_mem = escc_mem;
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/* Note: this code is strongly inspirated from the corresponding code
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in PearPC */
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qdev_init_nofail(DEVICE(d));
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}
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