86 lines
2.3 KiB
C
86 lines
2.3 KiB
C
/*
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* QEMU SPARC CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_SPARC_CPU_QOM_H
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#define QEMU_SPARC_CPU_QOM_H
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#include "qom/cpu.h"
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#include "cpu.h"
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#ifdef TARGET_SPARC64
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#define TYPE_SPARC_CPU "sparc64-cpu"
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#else
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#define TYPE_SPARC_CPU "sparc-cpu"
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#endif
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#define SPARC_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(SPARCCPUClass, (klass), TYPE_SPARC_CPU)
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#define SPARC_CPU(obj) \
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OBJECT_CHECK(SPARCCPU, (obj), TYPE_SPARC_CPU)
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#define SPARC_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU)
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/**
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* SPARCCPUClass:
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* @parent_realize: The parent class' realize handler.
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* @parent_reset: The parent class' reset handler.
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*
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* A SPARC CPU model.
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*/
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typedef struct SPARCCPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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DeviceRealize parent_realize;
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void (*parent_reset)(CPUState *cpu);
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} SPARCCPUClass;
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/**
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* SPARCCPU:
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* @env: #CPUSPARCState
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*
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* A SPARC CPU.
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*/
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typedef struct SPARCCPU {
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/*< private >*/
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CPUState parent_obj;
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/*< public >*/
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CPUSPARCState env;
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} SPARCCPU;
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static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env)
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{
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return container_of(env, SPARCCPU, env);
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}
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#define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e))
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#define ENV_OFFSET offsetof(SPARCCPU, env)
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void sparc_cpu_do_interrupt(CPUState *cpu);
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void sparc_cpu_dump_state(CPUState *cpu, FILE *f,
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fprintf_function cpu_fprintf, int flags);
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hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
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int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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#endif
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