261 lines
7.6 KiB
C
261 lines
7.6 KiB
C
/*
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* QEMU/MIPS pseudo-board
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*
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* emulates a simple machine with ISA-like bus.
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* ISA IO space mapped to the 0x14000000 (PHYS) and
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* ISA memory at the 0x10000000 (PHYS, 16Mb in size).
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* All peripherial devices are attached to this "bus" with
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* the standard PC ISA addresses.
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*/
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#include "hw.h"
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#include "mips.h"
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#include "pc.h"
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#include "isa.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#ifdef TARGET_WORDS_BIGENDIAN
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#define BIOS_FILENAME "mips_bios.bin"
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#else
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#define BIOS_FILENAME "mipsel_bios.bin"
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#endif
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#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
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#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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static const int ide_iobase2[2] = { 0x3f6, 0x376 };
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static const int ide_irq[2] = { 14, 15 };
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static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
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static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
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extern FILE *logfile;
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static PITState *pit; /* PIT i8254 */
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/*i8254 PIT is attached to the IRQ0 at PIC i8259 */
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static struct _loaderparams {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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} loaderparams;
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static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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if ((addr & 0xffff) == 0 && val == 42)
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qemu_system_reset_request ();
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else if ((addr & 0xffff) == 4 && val == 42)
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qemu_system_shutdown_request ();
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}
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static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
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{
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return 0;
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}
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static CPUWriteMemoryFunc *mips_qemu_write[] = {
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&mips_qemu_writel,
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&mips_qemu_writel,
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&mips_qemu_writel,
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};
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static CPUReadMemoryFunc *mips_qemu_read[] = {
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&mips_qemu_readl,
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&mips_qemu_readl,
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&mips_qemu_readl,
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};
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static int mips_qemu_iomemtype = 0;
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static void load_kernel (CPUState *env)
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{
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int64_t entry, kernel_low, kernel_high;
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long kernel_size, initrd_size;
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ram_addr_t initrd_offset;
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kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
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&entry, &kernel_low, &kernel_high);
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if (kernel_size >= 0) {
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if ((entry & ~0x7fffffffULL) == 0x80000000)
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entry = (int32_t)entry;
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env->PC[env->current_tc] = entry;
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} else {
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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loaderparams.kernel_filename);
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exit(1);
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}
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/* load initrd */
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initrd_size = 0;
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initrd_offset = 0;
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if (loaderparams.initrd_filename) {
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initrd_size = get_image_size (loaderparams.initrd_filename);
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if (initrd_size > 0) {
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initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
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if (initrd_offset + initrd_size > ram_size) {
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fprintf(stderr,
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"qemu: memory too small for initial ram disk '%s'\n",
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loaderparams.initrd_filename);
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exit(1);
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}
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initrd_size = load_image(loaderparams.initrd_filename,
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phys_ram_base + initrd_offset);
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}
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if (initrd_size == (target_ulong) -1) {
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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loaderparams.initrd_filename);
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exit(1);
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}
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}
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/* Store command line. */
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if (initrd_size > 0) {
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int ret;
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ret = sprintf(phys_ram_base + (16 << 20) - 256,
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"rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
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PHYS_TO_VIRT((uint32_t)initrd_offset),
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initrd_size);
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strcpy (phys_ram_base + (16 << 20) - 256 + ret,
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loaderparams.kernel_cmdline);
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}
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else {
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strcpy (phys_ram_base + (16 << 20) - 256,
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loaderparams.kernel_cmdline);
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}
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*(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
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*(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
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}
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static void main_cpu_reset(void *opaque)
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{
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CPUState *env = opaque;
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cpu_reset(env);
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if (loaderparams.kernel_filename)
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load_kernel (env);
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}
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static
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void mips_r4k_init (int ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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char buf[1024];
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unsigned long bios_offset;
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int bios_size;
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CPUState *env;
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RTCState *rtc_state;
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int i;
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qemu_irq *i8259;
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/* init CPUs */
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if (cpu_model == NULL) {
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#ifdef TARGET_MIPS64
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cpu_model = "R4000";
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#else
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cpu_model = "24Kf";
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#endif
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}
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env = cpu_init(cpu_model);
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if (!env) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
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qemu_register_reset(main_cpu_reset, env);
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/* allocate RAM */
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cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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if (!mips_qemu_iomemtype) {
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mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
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mips_qemu_write, NULL);
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}
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cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
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/* Try to load a BIOS image. If this fails, we continue regardless,
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but initialize the hardware ourselves. When a kernel gets
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preloaded we also initialize the hardware, since the BIOS wasn't
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run. */
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bios_offset = ram_size + vga_ram_size;
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if (bios_name == NULL)
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bios_name = BIOS_FILENAME;
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snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
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bios_size = load_image(buf, phys_ram_base + bios_offset);
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if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
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cpu_register_physical_memory(0x1fc00000,
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BIOS_SIZE, bios_offset | IO_MEM_ROM);
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} else {
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/* not fatal */
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fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
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buf);
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}
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if (kernel_filename) {
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loaderparams.ram_size = ram_size;
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loaderparams.kernel_filename = kernel_filename;
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loaderparams.kernel_cmdline = kernel_cmdline;
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loaderparams.initrd_filename = initrd_filename;
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load_kernel (env);
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}
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/* Init CPU internal devices */
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cpu_mips_irq_init_cpu(env);
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cpu_mips_clock_init(env);
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cpu_mips_irqctrl_init();
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/* The PIC is attached to the MIPS CPU INT0 pin */
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i8259 = i8259_init(env->irq[2]);
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rtc_state = rtc_init(0x70, i8259[8]);
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/* Register 64 KB of ISA IO space at 0x14000000 */
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isa_mmio_init(0x14000000, 0x00010000);
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isa_mem_base = 0x10000000;
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pit = pit_init(0x40, i8259[0]);
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for(i = 0; i < MAX_SERIAL_PORTS; i++) {
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if (serial_hds[i]) {
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serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
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}
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}
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isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size);
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if (nd_table[0].vlan) {
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if (nd_table[0].model == NULL
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|| strcmp(nd_table[0].model, "ne2k_isa") == 0) {
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isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
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} else if (strcmp(nd_table[0].model, "?") == 0) {
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fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");
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exit (1);
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} else {
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fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
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exit (1);
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}
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}
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for(i = 0; i < 2; i++)
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isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
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bs_table[2 * i], bs_table[2 * i + 1]);
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i8042_init(i8259[1], i8259[12], 0x60);
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ds1225y_init(0x9000, "nvram");
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}
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QEMUMachine mips_machine = {
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"mips",
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"mips r4k platform",
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mips_r4k_init,
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};
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