1162 lines
38 KiB
C
1162 lines
38 KiB
C
/*
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* QEMU float support
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*
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* Derived from SoftFloat.
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*/
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/*============================================================================
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This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
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Arithmetic Package, Release 2b.
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Written by John R. Hauser. This work was made possible in part by the
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International Computer Science Institute, located at Suite 600, 1947 Center
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Street, Berkeley, California 94704. Funding was partially provided by the
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National Science Foundation under grant MIP-9311980. The original version
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of this code was written as part of a project to build a fixed-point vector
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processor in collaboration with the University of California at Berkeley,
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overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
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arithmetic/SoftFloat.html'.
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THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
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been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
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RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
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AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
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COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
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EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
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INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
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OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
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Derivative works are acceptable, even for commercial purposes, so long as
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(1) the source code for the derivative work includes prominent notice that
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the work is derivative, and (2) the source code includes prominent notice with
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these four paragraphs for those parts of this code that are retained.
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=============================================================================*/
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#if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
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#define SNAN_BIT_IS_ONE 1
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#else
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#define SNAN_BIT_IS_ONE 0
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#endif
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#if defined(TARGET_XTENSA)
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/* Define for architectures which deviate from IEEE in not supporting
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* signaling NaNs (so all NaNs are treated as quiet).
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*/
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#define NO_SIGNALING_NANS 1
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#endif
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/*----------------------------------------------------------------------------
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| The pattern for a default generated half-precision NaN.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_ARM)
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const float16 float16_default_nan = const_float16(0x7E00);
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#elif SNAN_BIT_IS_ONE
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const float16 float16_default_nan = const_float16(0x7DFF);
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#else
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const float16 float16_default_nan = const_float16(0xFE00);
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#endif
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/*----------------------------------------------------------------------------
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| The pattern for a default generated single-precision NaN.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_SPARC)
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const float32 float32_default_nan = const_float32(0x7FFFFFFF);
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#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
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defined(TARGET_XTENSA)
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const float32 float32_default_nan = const_float32(0x7FC00000);
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#elif SNAN_BIT_IS_ONE
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const float32 float32_default_nan = const_float32(0x7FBFFFFF);
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#else
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const float32 float32_default_nan = const_float32(0xFFC00000);
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#endif
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/*----------------------------------------------------------------------------
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| The pattern for a default generated double-precision NaN.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_SPARC)
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const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
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#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
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const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
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#elif SNAN_BIT_IS_ONE
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const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
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#else
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const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
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#endif
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/*----------------------------------------------------------------------------
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| The pattern for a default generated extended double-precision NaN.
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*----------------------------------------------------------------------------*/
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#if SNAN_BIT_IS_ONE
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#define floatx80_default_nan_high 0x7FFF
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#define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF )
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#else
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#define floatx80_default_nan_high 0xFFFF
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#define floatx80_default_nan_low LIT64( 0xC000000000000000 )
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#endif
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const floatx80 floatx80_default_nan
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= make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
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/*----------------------------------------------------------------------------
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| The pattern for a default generated quadruple-precision NaN. The `high' and
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| `low' values hold the most- and least-significant bits, respectively.
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*----------------------------------------------------------------------------*/
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#if SNAN_BIT_IS_ONE
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#define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF )
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#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
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#else
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#define float128_default_nan_high LIT64( 0xFFFF800000000000 )
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#define float128_default_nan_low LIT64( 0x0000000000000000 )
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#endif
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const float128 float128_default_nan
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= make_float128_init(float128_default_nan_high, float128_default_nan_low);
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/*----------------------------------------------------------------------------
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| Raises the exceptions specified by `flags'. Floating-point traps can be
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| defined here if desired. It is currently not possible for such a trap
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| to substitute a result value. If traps are not implemented, this routine
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| should be simply `float_exception_flags |= flags;'.
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*----------------------------------------------------------------------------*/
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void float_raise( int8 flags STATUS_PARAM )
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{
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STATUS(float_exception_flags) |= flags;
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}
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/*----------------------------------------------------------------------------
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| Internal canonical NaN format.
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*----------------------------------------------------------------------------*/
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typedef struct {
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flag sign;
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uint64_t high, low;
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} commonNaNT;
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#ifdef NO_SIGNALING_NANS
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int float16_is_quiet_nan(float16 a_)
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{
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return float16_is_any_nan(a_);
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}
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int float16_is_signaling_nan(float16 a_)
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{
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return 0;
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}
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#else
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/*----------------------------------------------------------------------------
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| Returns 1 if the half-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float16_is_quiet_nan(float16 a_)
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{
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uint16_t a = float16_val(a_);
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#if SNAN_BIT_IS_ONE
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return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
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#else
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return ((a & ~0x8000) >= 0x7c80);
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#endif
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the half-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float16_is_signaling_nan(float16 a_)
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{
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uint16_t a = float16_val(a_);
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#if SNAN_BIT_IS_ONE
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return ((a & ~0x8000) >= 0x7c80);
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#else
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return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
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#endif
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}
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#endif
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN if the half-precision floating point value `a' is a
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| signaling NaN; otherwise returns `a'.
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*----------------------------------------------------------------------------*/
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float16 float16_maybe_silence_nan(float16 a_)
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{
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if (float16_is_signaling_nan(a_)) {
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#if SNAN_BIT_IS_ONE
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# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
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return float16_default_nan;
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# else
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# error Rules for silencing a signaling NaN are target-specific
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# endif
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#else
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uint16_t a = float16_val(a_);
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a |= (1 << 9);
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return make_float16(a);
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#endif
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}
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return a_;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the half-precision floating-point NaN
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| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
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| exception is raised.
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*----------------------------------------------------------------------------*/
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static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
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{
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commonNaNT z;
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if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
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z.sign = float16_val(a) >> 15;
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z.low = 0;
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z.high = ((uint64_t) float16_val(a))<<54;
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return z;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the canonical NaN `a' to the half-
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| precision floating-point format.
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*----------------------------------------------------------------------------*/
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static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
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{
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uint16_t mantissa = a.high>>54;
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if (STATUS(default_nan_mode)) {
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return float16_default_nan;
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}
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if (mantissa) {
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return make_float16(((((uint16_t) a.sign) << 15)
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| (0x1F << 10) | mantissa));
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} else {
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return float16_default_nan;
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}
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}
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#ifdef NO_SIGNALING_NANS
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int float32_is_quiet_nan(float32 a_)
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{
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return float32_is_any_nan(a_);
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}
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int float32_is_signaling_nan(float32 a_)
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{
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return 0;
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}
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#else
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float32_is_quiet_nan( float32 a_ )
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{
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uint32_t a = float32_val(a_);
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#if SNAN_BIT_IS_ONE
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
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#else
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return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
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#endif
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}
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/*----------------------------------------------------------------------------
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| Returns 1 if the single-precision floating-point value `a' is a signaling
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| NaN; otherwise returns 0.
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*----------------------------------------------------------------------------*/
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int float32_is_signaling_nan( float32 a_ )
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{
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uint32_t a = float32_val(a_);
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#if SNAN_BIT_IS_ONE
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return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
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#else
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return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
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#endif
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}
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#endif
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/*----------------------------------------------------------------------------
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| Returns a quiet NaN if the single-precision floating point value `a' is a
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| signaling NaN; otherwise returns `a'.
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*----------------------------------------------------------------------------*/
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float32 float32_maybe_silence_nan( float32 a_ )
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{
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if (float32_is_signaling_nan(a_)) {
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#if SNAN_BIT_IS_ONE
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# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
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return float32_default_nan;
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# else
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# error Rules for silencing a signaling NaN are target-specific
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# endif
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#else
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uint32_t a = float32_val(a_);
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a |= (1 << 22);
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return make_float32(a);
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#endif
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}
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return a_;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the single-precision floating-point NaN
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| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
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| exception is raised.
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*----------------------------------------------------------------------------*/
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static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
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{
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commonNaNT z;
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if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
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z.sign = float32_val(a)>>31;
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z.low = 0;
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z.high = ( (uint64_t) float32_val(a) )<<41;
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return z;
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the canonical NaN `a' to the single-
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| precision floating-point format.
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*----------------------------------------------------------------------------*/
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static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
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{
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uint32_t mantissa = a.high>>41;
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if ( STATUS(default_nan_mode) ) {
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return float32_default_nan;
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}
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if ( mantissa )
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return make_float32(
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( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
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else
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return float32_default_nan;
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}
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/*----------------------------------------------------------------------------
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| Select which NaN to propagate for a two-input operation.
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| IEEE754 doesn't specify all the details of this, so the
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| algorithm is target-specific.
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| The routine is passed various bits of information about the
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| two NaNs and should return 0 to select NaN a and 1 for NaN b.
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| Note that signalling NaNs are always squashed to quiet NaNs
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| by the caller, by calling floatXX_maybe_silence_nan() before
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| returning them.
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|
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| aIsLargerSignificand is only valid if both a and b are NaNs
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| of some kind, and is true if a has the larger significand,
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| or if both a and b have the same significand but a is
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| positive but b is negative. It is only needed for the x87
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| tie-break rule.
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*----------------------------------------------------------------------------*/
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#if defined(TARGET_ARM)
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag aIsLargerSignificand)
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{
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/* ARM mandated NaN propagation rules: take the first of:
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* 1. A if it is signaling
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* 2. B if it is signaling
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* 3. A (quiet)
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* 4. B (quiet)
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* A signaling NaN is always quietened before returning it.
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*/
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if (aIsSNaN) {
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return 0;
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} else if (bIsSNaN) {
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return 1;
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} else if (aIsQNaN) {
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return 0;
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} else {
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return 1;
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}
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}
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#elif defined(TARGET_MIPS)
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
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flag aIsLargerSignificand)
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{
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/* According to MIPS specifications, if one of the two operands is
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* a sNaN, a new qNaN has to be generated. This is done in
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* floatXX_maybe_silence_nan(). For qNaN inputs the specifications
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* says: "When possible, this QNaN result is one of the operand QNaN
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* values." In practice it seems that most implementations choose
|
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* the first operand if both operands are qNaN. In short this gives
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* the following rules:
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* 1. A if it is signaling
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* 2. B if it is signaling
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* 3. A (quiet)
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* 4. B (quiet)
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* A signaling NaN is always silenced before returning it.
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*/
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if (aIsSNaN) {
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return 0;
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} else if (bIsSNaN) {
|
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return 1;
|
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} else if (aIsQNaN) {
|
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return 0;
|
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} else {
|
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return 1;
|
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}
|
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}
|
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#elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
|
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
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flag aIsLargerSignificand)
|
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{
|
|
/* PowerPC propagation rules:
|
|
* 1. A if it sNaN or qNaN
|
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* 2. B if it sNaN or qNaN
|
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* A signaling NaN is always silenced before returning it.
|
|
*/
|
|
if (aIsSNaN || aIsQNaN) {
|
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return 0;
|
|
} else {
|
|
return 1;
|
|
}
|
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}
|
|
#else
|
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static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
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flag aIsLargerSignificand)
|
|
{
|
|
/* This implements x87 NaN propagation rules:
|
|
* SNaN + QNaN => return the QNaN
|
|
* two SNaNs => return the one with the larger significand, silenced
|
|
* two QNaNs => return the one with the larger significand
|
|
* SNaN and a non-NaN => return the SNaN, silenced
|
|
* QNaN and a non-NaN => return the QNaN
|
|
*
|
|
* If we get down to comparing significands and they are the same,
|
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* return the NaN with the positive sign bit (if any).
|
|
*/
|
|
if (aIsSNaN) {
|
|
if (bIsSNaN) {
|
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return aIsLargerSignificand ? 0 : 1;
|
|
}
|
|
return bIsQNaN ? 1 : 0;
|
|
}
|
|
else if (aIsQNaN) {
|
|
if (bIsSNaN || !bIsQNaN)
|
|
return 0;
|
|
else {
|
|
return aIsLargerSignificand ? 0 : 1;
|
|
}
|
|
} else {
|
|
return 1;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Select which NaN to propagate for a three-input operation.
|
|
| For the moment we assume that no CPU needs the 'larger significand'
|
|
| information.
|
|
| Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
|
|
*----------------------------------------------------------------------------*/
|
|
#if defined(TARGET_ARM)
|
|
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
|
flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
|
|
{
|
|
/* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
|
|
* the default NaN
|
|
*/
|
|
if (infzero && cIsQNaN) {
|
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float_raise(float_flag_invalid STATUS_VAR);
|
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return 3;
|
|
}
|
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|
|
/* This looks different from the ARM ARM pseudocode, because the ARM ARM
|
|
* puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
|
|
*/
|
|
if (cIsSNaN) {
|
|
return 2;
|
|
} else if (aIsSNaN) {
|
|
return 0;
|
|
} else if (bIsSNaN) {
|
|
return 1;
|
|
} else if (cIsQNaN) {
|
|
return 2;
|
|
} else if (aIsQNaN) {
|
|
return 0;
|
|
} else {
|
|
return 1;
|
|
}
|
|
}
|
|
#elif defined(TARGET_MIPS)
|
|
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
|
flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
|
|
{
|
|
/* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
|
|
* the default NaN
|
|
*/
|
|
if (infzero) {
|
|
float_raise(float_flag_invalid STATUS_VAR);
|
|
return 3;
|
|
}
|
|
|
|
/* Prefer sNaN over qNaN, in the a, b, c order. */
|
|
if (aIsSNaN) {
|
|
return 0;
|
|
} else if (bIsSNaN) {
|
|
return 1;
|
|
} else if (cIsSNaN) {
|
|
return 2;
|
|
} else if (aIsQNaN) {
|
|
return 0;
|
|
} else if (bIsQNaN) {
|
|
return 1;
|
|
} else {
|
|
return 2;
|
|
}
|
|
}
|
|
#elif defined(TARGET_PPC)
|
|
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
|
flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
|
|
{
|
|
/* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
|
|
* to return an input NaN if we have one (ie c) rather than generating
|
|
* a default NaN
|
|
*/
|
|
if (infzero) {
|
|
float_raise(float_flag_invalid STATUS_VAR);
|
|
return 2;
|
|
}
|
|
|
|
/* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
|
|
* otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
|
|
*/
|
|
if (aIsSNaN || aIsQNaN) {
|
|
return 0;
|
|
} else if (cIsSNaN || cIsQNaN) {
|
|
return 2;
|
|
} else {
|
|
return 1;
|
|
}
|
|
}
|
|
#else
|
|
/* A default implementation: prefer a to b to c.
|
|
* This is unlikely to actually match any real implementation.
|
|
*/
|
|
static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
|
|
flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
|
|
{
|
|
if (aIsSNaN || aIsQNaN) {
|
|
return 0;
|
|
} else if (bIsSNaN || bIsQNaN) {
|
|
return 1;
|
|
} else {
|
|
return 2;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes two single-precision floating-point values `a' and `b', one of which
|
|
| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
|
|
| signaling NaN, the invalid exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
|
|
flag aIsLargerSignificand;
|
|
uint32_t av, bv;
|
|
|
|
aIsQuietNaN = float32_is_quiet_nan( a );
|
|
aIsSignalingNaN = float32_is_signaling_nan( a );
|
|
bIsQuietNaN = float32_is_quiet_nan( b );
|
|
bIsSignalingNaN = float32_is_signaling_nan( b );
|
|
av = float32_val(a);
|
|
bv = float32_val(b);
|
|
|
|
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
|
|
|
if ( STATUS(default_nan_mode) )
|
|
return float32_default_nan;
|
|
|
|
if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
|
|
aIsLargerSignificand = 0;
|
|
} else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
|
|
aIsLargerSignificand = 1;
|
|
} else {
|
|
aIsLargerSignificand = (av < bv) ? 1 : 0;
|
|
}
|
|
|
|
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
aIsLargerSignificand)) {
|
|
return float32_maybe_silence_nan(b);
|
|
} else {
|
|
return float32_maybe_silence_nan(a);
|
|
}
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes three single-precision floating-point values `a', `b' and `c', one of
|
|
| which is a NaN, and returns the appropriate NaN result. If any of `a',
|
|
| `b' or `c' is a signaling NaN, the invalid exception is raised.
|
|
| The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
|
|
| obviously c is a NaN, and whether to propagate c or some other NaN is
|
|
| implementation defined).
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
|
|
float32 c, flag infzero STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
cIsQuietNaN, cIsSignalingNaN;
|
|
int which;
|
|
|
|
aIsQuietNaN = float32_is_quiet_nan(a);
|
|
aIsSignalingNaN = float32_is_signaling_nan(a);
|
|
bIsQuietNaN = float32_is_quiet_nan(b);
|
|
bIsSignalingNaN = float32_is_signaling_nan(b);
|
|
cIsQuietNaN = float32_is_quiet_nan(c);
|
|
cIsSignalingNaN = float32_is_signaling_nan(c);
|
|
|
|
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
|
|
float_raise(float_flag_invalid STATUS_VAR);
|
|
}
|
|
|
|
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
|
|
bIsQuietNaN, bIsSignalingNaN,
|
|
cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
|
|
|
|
if (STATUS(default_nan_mode)) {
|
|
/* Note that this check is after pickNaNMulAdd so that function
|
|
* has an opportunity to set the Invalid flag.
|
|
*/
|
|
return float32_default_nan;
|
|
}
|
|
|
|
switch (which) {
|
|
case 0:
|
|
return float32_maybe_silence_nan(a);
|
|
case 1:
|
|
return float32_maybe_silence_nan(b);
|
|
case 2:
|
|
return float32_maybe_silence_nan(c);
|
|
case 3:
|
|
default:
|
|
return float32_default_nan;
|
|
}
|
|
}
|
|
|
|
#ifdef NO_SIGNALING_NANS
|
|
int float64_is_quiet_nan(float64 a_)
|
|
{
|
|
return float64_is_any_nan(a_);
|
|
}
|
|
|
|
int float64_is_signaling_nan(float64 a_)
|
|
{
|
|
return 0;
|
|
}
|
|
#else
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the double-precision floating-point value `a' is a quiet
|
|
| NaN; otherwise returns 0.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int float64_is_quiet_nan( float64 a_ )
|
|
{
|
|
uint64_t a = float64_val(a_);
|
|
#if SNAN_BIT_IS_ONE
|
|
return
|
|
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
|
|
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
|
|
#else
|
|
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
|
|
#endif
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the double-precision floating-point value `a' is a signaling
|
|
| NaN; otherwise returns 0.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int float64_is_signaling_nan( float64 a_ )
|
|
{
|
|
uint64_t a = float64_val(a_);
|
|
#if SNAN_BIT_IS_ONE
|
|
return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
|
|
#else
|
|
return
|
|
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
|
|
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns a quiet NaN if the double-precision floating point value `a' is a
|
|
| signaling NaN; otherwise returns `a'.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
float64 float64_maybe_silence_nan( float64 a_ )
|
|
{
|
|
if (float64_is_signaling_nan(a_)) {
|
|
#if SNAN_BIT_IS_ONE
|
|
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
|
|
return float64_default_nan;
|
|
# else
|
|
# error Rules for silencing a signaling NaN are target-specific
|
|
# endif
|
|
#else
|
|
uint64_t a = float64_val(a_);
|
|
a |= LIT64( 0x0008000000000000 );
|
|
return make_float64(a);
|
|
#endif
|
|
}
|
|
return a_;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the double-precision floating-point NaN
|
|
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
|
| exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
|
|
{
|
|
commonNaNT z;
|
|
|
|
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
|
|
z.sign = float64_val(a)>>63;
|
|
z.low = 0;
|
|
z.high = float64_val(a)<<12;
|
|
return z;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the canonical NaN `a' to the double-
|
|
| precision floating-point format.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
|
|
{
|
|
uint64_t mantissa = a.high>>12;
|
|
|
|
if ( STATUS(default_nan_mode) ) {
|
|
return float64_default_nan;
|
|
}
|
|
|
|
if ( mantissa )
|
|
return make_float64(
|
|
( ( (uint64_t) a.sign )<<63 )
|
|
| LIT64( 0x7FF0000000000000 )
|
|
| ( a.high>>12 ));
|
|
else
|
|
return float64_default_nan;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes two double-precision floating-point values `a' and `b', one of which
|
|
| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
|
|
| signaling NaN, the invalid exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
|
|
flag aIsLargerSignificand;
|
|
uint64_t av, bv;
|
|
|
|
aIsQuietNaN = float64_is_quiet_nan( a );
|
|
aIsSignalingNaN = float64_is_signaling_nan( a );
|
|
bIsQuietNaN = float64_is_quiet_nan( b );
|
|
bIsSignalingNaN = float64_is_signaling_nan( b );
|
|
av = float64_val(a);
|
|
bv = float64_val(b);
|
|
|
|
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
|
|
|
if ( STATUS(default_nan_mode) )
|
|
return float64_default_nan;
|
|
|
|
if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
|
|
aIsLargerSignificand = 0;
|
|
} else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
|
|
aIsLargerSignificand = 1;
|
|
} else {
|
|
aIsLargerSignificand = (av < bv) ? 1 : 0;
|
|
}
|
|
|
|
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
aIsLargerSignificand)) {
|
|
return float64_maybe_silence_nan(b);
|
|
} else {
|
|
return float64_maybe_silence_nan(a);
|
|
}
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes three double-precision floating-point values `a', `b' and `c', one of
|
|
| which is a NaN, and returns the appropriate NaN result. If any of `a',
|
|
| `b' or `c' is a signaling NaN, the invalid exception is raised.
|
|
| The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
|
|
| obviously c is a NaN, and whether to propagate c or some other NaN is
|
|
| implementation defined).
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
|
|
float64 c, flag infzero STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
cIsQuietNaN, cIsSignalingNaN;
|
|
int which;
|
|
|
|
aIsQuietNaN = float64_is_quiet_nan(a);
|
|
aIsSignalingNaN = float64_is_signaling_nan(a);
|
|
bIsQuietNaN = float64_is_quiet_nan(b);
|
|
bIsSignalingNaN = float64_is_signaling_nan(b);
|
|
cIsQuietNaN = float64_is_quiet_nan(c);
|
|
cIsSignalingNaN = float64_is_signaling_nan(c);
|
|
|
|
if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
|
|
float_raise(float_flag_invalid STATUS_VAR);
|
|
}
|
|
|
|
which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
|
|
bIsQuietNaN, bIsSignalingNaN,
|
|
cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
|
|
|
|
if (STATUS(default_nan_mode)) {
|
|
/* Note that this check is after pickNaNMulAdd so that function
|
|
* has an opportunity to set the Invalid flag.
|
|
*/
|
|
return float64_default_nan;
|
|
}
|
|
|
|
switch (which) {
|
|
case 0:
|
|
return float64_maybe_silence_nan(a);
|
|
case 1:
|
|
return float64_maybe_silence_nan(b);
|
|
case 2:
|
|
return float64_maybe_silence_nan(c);
|
|
case 3:
|
|
default:
|
|
return float64_default_nan;
|
|
}
|
|
}
|
|
|
|
#ifdef NO_SIGNALING_NANS
|
|
int floatx80_is_quiet_nan(floatx80 a_)
|
|
{
|
|
return floatx80_is_any_nan(a_);
|
|
}
|
|
|
|
int floatx80_is_signaling_nan(floatx80 a_)
|
|
{
|
|
return 0;
|
|
}
|
|
#else
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the extended double-precision floating-point value `a' is a
|
|
| quiet NaN; otherwise returns 0. This slightly differs from the same
|
|
| function for other types as floatx80 has an explicit bit.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int floatx80_is_quiet_nan( floatx80 a )
|
|
{
|
|
#if SNAN_BIT_IS_ONE
|
|
uint64_t aLow;
|
|
|
|
aLow = a.low & ~ LIT64( 0x4000000000000000 );
|
|
return
|
|
( ( a.high & 0x7FFF ) == 0x7FFF )
|
|
&& (uint64_t) ( aLow<<1 )
|
|
&& ( a.low == aLow );
|
|
#else
|
|
return ( ( a.high & 0x7FFF ) == 0x7FFF )
|
|
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
|
|
#endif
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the extended double-precision floating-point value `a' is a
|
|
| signaling NaN; otherwise returns 0. This slightly differs from the same
|
|
| function for other types as floatx80 has an explicit bit.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int floatx80_is_signaling_nan( floatx80 a )
|
|
{
|
|
#if SNAN_BIT_IS_ONE
|
|
return ( ( a.high & 0x7FFF ) == 0x7FFF )
|
|
&& (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
|
|
#else
|
|
uint64_t aLow;
|
|
|
|
aLow = a.low & ~ LIT64( 0x4000000000000000 );
|
|
return
|
|
( ( a.high & 0x7FFF ) == 0x7FFF )
|
|
&& (uint64_t) ( aLow<<1 )
|
|
&& ( a.low == aLow );
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns a quiet NaN if the extended double-precision floating point value
|
|
| `a' is a signaling NaN; otherwise returns `a'.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
floatx80 floatx80_maybe_silence_nan( floatx80 a )
|
|
{
|
|
if (floatx80_is_signaling_nan(a)) {
|
|
#if SNAN_BIT_IS_ONE
|
|
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
|
|
a.low = floatx80_default_nan_low;
|
|
a.high = floatx80_default_nan_high;
|
|
# else
|
|
# error Rules for silencing a signaling NaN are target-specific
|
|
# endif
|
|
#else
|
|
a.low |= LIT64( 0xC000000000000000 );
|
|
return a;
|
|
#endif
|
|
}
|
|
return a;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the extended double-precision floating-
|
|
| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
|
|
| invalid exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
|
|
{
|
|
commonNaNT z;
|
|
|
|
if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
|
|
if ( a.low >> 63 ) {
|
|
z.sign = a.high >> 15;
|
|
z.low = 0;
|
|
z.high = a.low << 1;
|
|
} else {
|
|
z.sign = floatx80_default_nan_high >> 15;
|
|
z.low = 0;
|
|
z.high = floatx80_default_nan_low << 1;
|
|
}
|
|
return z;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the canonical NaN `a' to the extended
|
|
| double-precision floating-point format.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
|
|
{
|
|
floatx80 z;
|
|
|
|
if ( STATUS(default_nan_mode) ) {
|
|
z.low = floatx80_default_nan_low;
|
|
z.high = floatx80_default_nan_high;
|
|
return z;
|
|
}
|
|
|
|
if (a.high >> 1) {
|
|
z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
|
|
z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
|
|
} else {
|
|
z.low = floatx80_default_nan_low;
|
|
z.high = floatx80_default_nan_high;
|
|
}
|
|
|
|
return z;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes two extended double-precision floating-point values `a' and `b', one
|
|
| of which is a NaN, and returns the appropriate NaN result. If either `a' or
|
|
| `b' is a signaling NaN, the invalid exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
|
|
flag aIsLargerSignificand;
|
|
|
|
aIsQuietNaN = floatx80_is_quiet_nan( a );
|
|
aIsSignalingNaN = floatx80_is_signaling_nan( a );
|
|
bIsQuietNaN = floatx80_is_quiet_nan( b );
|
|
bIsSignalingNaN = floatx80_is_signaling_nan( b );
|
|
|
|
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
|
|
|
if ( STATUS(default_nan_mode) ) {
|
|
a.low = floatx80_default_nan_low;
|
|
a.high = floatx80_default_nan_high;
|
|
return a;
|
|
}
|
|
|
|
if (a.low < b.low) {
|
|
aIsLargerSignificand = 0;
|
|
} else if (b.low < a.low) {
|
|
aIsLargerSignificand = 1;
|
|
} else {
|
|
aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
|
|
}
|
|
|
|
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
aIsLargerSignificand)) {
|
|
return floatx80_maybe_silence_nan(b);
|
|
} else {
|
|
return floatx80_maybe_silence_nan(a);
|
|
}
|
|
}
|
|
|
|
#ifdef NO_SIGNALING_NANS
|
|
int float128_is_quiet_nan(float128 a_)
|
|
{
|
|
return float128_is_any_nan(a_);
|
|
}
|
|
|
|
int float128_is_signaling_nan(float128 a_)
|
|
{
|
|
return 0;
|
|
}
|
|
#else
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the quadruple-precision floating-point value `a' is a quiet
|
|
| NaN; otherwise returns 0.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int float128_is_quiet_nan( float128 a )
|
|
{
|
|
#if SNAN_BIT_IS_ONE
|
|
return
|
|
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
|
|
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
|
|
#else
|
|
return
|
|
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
|
|
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
|
|
#endif
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns 1 if the quadruple-precision floating-point value `a' is a
|
|
| signaling NaN; otherwise returns 0.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
int float128_is_signaling_nan( float128 a )
|
|
{
|
|
#if SNAN_BIT_IS_ONE
|
|
return
|
|
( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
|
|
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
|
|
#else
|
|
return
|
|
( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
|
|
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns a quiet NaN if the quadruple-precision floating point value `a' is
|
|
| a signaling NaN; otherwise returns `a'.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
float128 float128_maybe_silence_nan( float128 a )
|
|
{
|
|
if (float128_is_signaling_nan(a)) {
|
|
#if SNAN_BIT_IS_ONE
|
|
# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
|
|
a.low = float128_default_nan_low;
|
|
a.high = float128_default_nan_high;
|
|
# else
|
|
# error Rules for silencing a signaling NaN are target-specific
|
|
# endif
|
|
#else
|
|
a.high |= LIT64( 0x0000800000000000 );
|
|
return a;
|
|
#endif
|
|
}
|
|
return a;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the quadruple-precision floating-point NaN
|
|
| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
|
|
| exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
|
|
{
|
|
commonNaNT z;
|
|
|
|
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
|
|
z.sign = a.high>>63;
|
|
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
|
|
return z;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Returns the result of converting the canonical NaN `a' to the quadruple-
|
|
| precision floating-point format.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
|
|
{
|
|
float128 z;
|
|
|
|
if ( STATUS(default_nan_mode) ) {
|
|
z.low = float128_default_nan_low;
|
|
z.high = float128_default_nan_high;
|
|
return z;
|
|
}
|
|
|
|
shift128Right( a.high, a.low, 16, &z.high, &z.low );
|
|
z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
|
|
return z;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
| Takes two quadruple-precision floating-point values `a' and `b', one of
|
|
| which is a NaN, and returns the appropriate NaN result. If either `a' or
|
|
| `b' is a signaling NaN, the invalid exception is raised.
|
|
*----------------------------------------------------------------------------*/
|
|
|
|
static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
|
|
{
|
|
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
|
|
flag aIsLargerSignificand;
|
|
|
|
aIsQuietNaN = float128_is_quiet_nan( a );
|
|
aIsSignalingNaN = float128_is_signaling_nan( a );
|
|
bIsQuietNaN = float128_is_quiet_nan( b );
|
|
bIsSignalingNaN = float128_is_signaling_nan( b );
|
|
|
|
if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
|
|
|
|
if ( STATUS(default_nan_mode) ) {
|
|
a.low = float128_default_nan_low;
|
|
a.high = float128_default_nan_high;
|
|
return a;
|
|
}
|
|
|
|
if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
|
|
aIsLargerSignificand = 0;
|
|
} else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
|
|
aIsLargerSignificand = 1;
|
|
} else {
|
|
aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
|
|
}
|
|
|
|
if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
|
|
aIsLargerSignificand)) {
|
|
return float128_maybe_silence_nan(b);
|
|
} else {
|
|
return float128_maybe_silence_nan(a);
|
|
}
|
|
}
|
|
|