341 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			341 lines
		
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * QEMU PCI test device
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 *
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 * Copyright (c) 2012 Red Hat Inc.
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 * Author: Michael S. Tsirkin <mst@redhat.com>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License along
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 * with this program; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/pci/pci.h"
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#include "qemu/event_notifier.h"
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#include "sysemu/kvm.h"
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typedef struct PCITestDevHdr {
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    uint8_t test;
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    uint8_t width;
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    uint8_t pad0[2];
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    uint32_t offset;
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    uint8_t data;
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    uint8_t pad1[3];
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    uint32_t count;
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    uint8_t name[];
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} PCITestDevHdr;
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typedef struct IOTest {
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    MemoryRegion *mr;
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    EventNotifier notifier;
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    bool hasnotifier;
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    unsigned size;
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    bool match_data;
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    PCITestDevHdr *hdr;
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    unsigned bufsize;
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} IOTest;
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#define IOTEST_DATAMATCH 0xFA
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#define IOTEST_NOMATCH   0xCE
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#define IOTEST_IOSIZE 128
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#define IOTEST_MEMSIZE 2048
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static const char *iotest_test[] = {
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    "no-eventfd",
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    "wildcard-eventfd",
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    "datamatch-eventfd"
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};
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static const char *iotest_type[] = {
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    "mmio",
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    "portio"
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};
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#define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
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#define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
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#define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
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#define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
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#define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
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enum {
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    IOTEST_ACCESS_NAME,
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    IOTEST_ACCESS_DATA,
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    IOTEST_ACCESS_MAX,
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};
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#define IOTEST_ACCESS_TYPE uint8_t
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#define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
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typedef struct PCITestDevState {
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    /*< private >*/
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    PCIDevice parent_obj;
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    /*< public >*/
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    MemoryRegion mmio;
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    MemoryRegion portio;
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    IOTest *tests;
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    int current;
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} PCITestDevState;
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#define TYPE_PCI_TEST_DEV "pci-testdev"
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#define PCI_TEST_DEV(obj) \
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    OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
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#define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
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#define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ?  &(d)->mmio : &(d)->portio)
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#define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
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#define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
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                           PCI_BASE_ADDRESS_SPACE_IO)
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static int pci_testdev_start(IOTest *test)
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{
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    test->hdr->count = 0;
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    if (!test->hasnotifier) {
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        return 0;
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    }
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    event_notifier_test_and_clear(&test->notifier);
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    memory_region_add_eventfd(test->mr,
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                              le32_to_cpu(test->hdr->offset),
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                              test->size,
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                              test->match_data,
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                              test->hdr->data,
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                              &test->notifier);
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    return 0;
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}
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static void pci_testdev_stop(IOTest *test)
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{
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    if (!test->hasnotifier) {
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        return;
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    }
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    memory_region_del_eventfd(test->mr,
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                              le32_to_cpu(test->hdr->offset),
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                              test->size,
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                              test->match_data,
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                              test->hdr->data,
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                              &test->notifier);
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}
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static void
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pci_testdev_reset(PCITestDevState *d)
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{
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    if (d->current == -1) {
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        return;
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    }
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    pci_testdev_stop(&d->tests[d->current]);
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    d->current = -1;
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}
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static void pci_testdev_inc(IOTest *test, unsigned inc)
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{
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    uint32_t c = le32_to_cpu(test->hdr->count);
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    test->hdr->count = cpu_to_le32(c + inc);
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}
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static void
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pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
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                  unsigned size, int type)
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{
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    PCITestDevState *d = opaque;
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    IOTest *test;
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    int t, r;
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    if (addr == offsetof(PCITestDevHdr, test)) {
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        pci_testdev_reset(d);
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        if (val >= IOTEST_MAX_TEST) {
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            return;
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        }
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        t = type * IOTEST_MAX_TEST + val;
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        r = pci_testdev_start(&d->tests[t]);
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        if (r < 0) {
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            return;
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        }
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        d->current = t;
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        return;
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    }
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    if (d->current < 0) {
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        return;
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    }
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    test = &d->tests[d->current];
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    if (addr != le32_to_cpu(test->hdr->offset)) {
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        return;
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    }
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    if (test->match_data && test->size != size) {
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        return;
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    }
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    if (test->match_data && val != test->hdr->data) {
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        return;
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    }
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    pci_testdev_inc(test, 1);
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}
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static uint64_t
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pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
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{
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    PCITestDevState *d = opaque;
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    const char *buf;
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    IOTest *test;
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    if (d->current < 0) {
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        return 0;
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    }
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    test = &d->tests[d->current];
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    buf = (const char *)test->hdr;
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    if (addr + size >= test->bufsize) {
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        return 0;
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    }
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    if (test->hasnotifier) {
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        event_notifier_test_and_clear(&test->notifier);
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    }
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    return buf[addr];
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}
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static void
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pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
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                       unsigned size)
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{
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    pci_testdev_write(opaque, addr, val, size, 0);
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}
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static void
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pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
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                       unsigned size)
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{
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    pci_testdev_write(opaque, addr, val, size, 1);
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}
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static const MemoryRegionOps pci_testdev_mmio_ops = {
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    .read = pci_testdev_read,
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    .write = pci_testdev_mmio_write,
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    .endianness = DEVICE_LITTLE_ENDIAN,
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    .impl = {
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        .min_access_size = 1,
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        .max_access_size = 1,
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    },
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};
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static const MemoryRegionOps pci_testdev_pio_ops = {
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    .read = pci_testdev_read,
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    .write = pci_testdev_pio_write,
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    .endianness = DEVICE_LITTLE_ENDIAN,
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    .impl = {
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        .min_access_size = 1,
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        .max_access_size = 1,
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    },
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};
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static void pci_testdev_realize(PCIDevice *pci_dev, Error **errp)
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{
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    PCITestDevState *d = PCI_TEST_DEV(pci_dev);
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    uint8_t *pci_conf;
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    char *name;
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    int r, i;
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    bool fastmmio = kvm_ioeventfd_any_length_enabled();
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    pci_conf = pci_dev->config;
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    pci_conf[PCI_INTERRUPT_PIN] = 0; /* no interrupt pin */
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    memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
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                          "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
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    memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
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                          "pci-testdev-portio", IOTEST_IOSIZE * 2);
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    pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
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    pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
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    d->current = -1;
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    d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
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    for (i = 0; i < IOTEST_MAX; ++i) {
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        IOTest *test = &d->tests[i];
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        name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
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        test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
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        test->hdr = g_malloc0(test->bufsize);
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        memcpy(test->hdr->name, name, strlen(name) + 1);
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        g_free(name);
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        test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
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        test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
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        if (fastmmio && IOTEST_IS_MEM(i) && !test->match_data) {
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            test->size = 0;
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        } else {
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            test->size = IOTEST_ACCESS_WIDTH;
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        }
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        test->hdr->test = i;
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        test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
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        test->hdr->width = IOTEST_ACCESS_WIDTH;
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        test->mr = IOTEST_REGION(d, i);
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        if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
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            test->hasnotifier = false;
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            continue;
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        }
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        r = event_notifier_init(&test->notifier, 0);
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        assert(r >= 0);
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        test->hasnotifier = true;
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    }
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}
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static void
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pci_testdev_uninit(PCIDevice *dev)
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{
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    PCITestDevState *d = PCI_TEST_DEV(dev);
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    int i;
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    pci_testdev_reset(d);
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    for (i = 0; i < IOTEST_MAX; ++i) {
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        if (d->tests[i].hasnotifier) {
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            event_notifier_cleanup(&d->tests[i].notifier);
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        }
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        g_free(d->tests[i].hdr);
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    }
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    g_free(d->tests);
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}
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static void qdev_pci_testdev_reset(DeviceState *dev)
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{
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    PCITestDevState *d = PCI_TEST_DEV(dev);
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    pci_testdev_reset(d);
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}
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static void pci_testdev_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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    k->realize = pci_testdev_realize;
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    k->exit = pci_testdev_uninit;
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    k->vendor_id = PCI_VENDOR_ID_REDHAT;
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    k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
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    k->revision = 0x00;
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    k->class_id = PCI_CLASS_OTHERS;
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    dc->desc = "PCI Test Device";
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    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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    dc->reset = qdev_pci_testdev_reset;
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}
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static const TypeInfo pci_testdev_info = {
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    .name          = TYPE_PCI_TEST_DEV,
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    .parent        = TYPE_PCI_DEVICE,
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    .instance_size = sizeof(PCITestDevState),
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    .class_init    = pci_testdev_class_init,
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    .interfaces = (InterfaceInfo[]) {
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        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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        { },
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    },
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};
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static void pci_testdev_register_types(void)
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{
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    type_register_static(&pci_testdev_info);
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}
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type_init(pci_testdev_register_types)
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