qemu-irix/target-mips
Petar Jovanovic b9cabc36a2 target-mips: fix 64-bit FPU config for user-mode emulation
FR bit should be initialized to 1 for MIPS64, under condition that this
bit is writable and that CPU has an FPU unit. It should be initialized to
zero for MIPS32.
This fixes different MIPS32 issues with FPU instructions whose behaviour
defaulted to 64-bit FPU mode.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit 4d66261f71)

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2014-02-20 21:59:18 -06:00
..
Makefile.objs
TODO
cpu-qom.h
cpu.c cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" 2013-07-29 15:29:15 +02:00
cpu.h
dsp_helper.c
gdbstub.c
helper.c target-mips: fix get_physical_address() #if 0 build error 2013-08-28 19:28:02 +02:00
helper.h tcg: Remove stray semi-colons from target-*/helper.h 2013-10-10 11:43:37 -07:00
lmi_helper.c
machine.c
mips-defs.h
op_helper.c cpu: Use QTAILQ for CPU list 2013-09-03 12:25:55 +02:00
translate.c target-mips: fix 64-bit FPU config for user-mode emulation 2014-02-20 21:59:18 -06:00
translate_init.c target-mips: fix 34Kf configuration for DSP ASE 2013-08-03 23:33:17 +02:00